Patents by Inventor Hiromi Shimazu

Hiromi Shimazu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967584
    Abstract: A power semiconductor device includes an insulating substrate on which a first conductor layer is arranged on one surface, a first conductor that is connected to the first conductor layer via a first connecting material, and a semiconductor element that is connected to the first conductor via a first connecting material. When viewed from a direction perpendicular to an electrode surface of the semiconductor element, the first conductor includes a peripheral portion formed larger than the semiconductor element. A first recess is formed in the peripheral portion so that a thickness of the first connecting material becomes thicker than other portions.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: April 23, 2024
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Hiromi Shimazu, Yujiro Kaneko, Toru Kato, Akira Matsushita, Eiichi Ide
  • Publication number: 20240096727
    Abstract: A first power semiconductor element and a second power semiconductor element of a power semiconductor device are such that, when heat generated by the first power semiconductor element is larger than heat generated by the second power semiconductor element, a first distance from an end of the first power semiconductor element to an end of the conductor plate is larger than a second distance from an end of the second power semiconductor element to an end, connected to the second power semiconductor element, of a second conductor plate.
    Type: Application
    Filed: December 24, 2021
    Publication date: March 21, 2024
    Inventors: Hiromi SHIMAZU, Yujiro KANEKO, Yusuke TAKAGI
  • Publication number: 20230187305
    Abstract: A power module includes a first conductor plate to which a first power semiconductor element is bonded, a second conductor plate to which a second power semiconductor element is bonded, the second conductor plate being disposed adjacent to the first conductor plate, a first heat-dissipating member disposed counter to the first conductor plate and the second conductor plate, and a first insulating sheet member disposed between the first heat-dissipating member and the first conductor plate. The first power semiconductor element is disposed at a position at which a first length from an end of the first conductor plate, the end being closer to the second conductor plate, to the first power semiconductor element is larger than a second length from an end of the first conductor plate, the end being far from the second conductor plate, to the first power semiconductor element, and the second length is larger than the thickness of the first conductor plate.
    Type: Application
    Filed: January 22, 2021
    Publication date: June 15, 2023
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Hiromi SHIMAZU, Yujiro KANEKO, Yusuke TAKAGI
  • Publication number: 20230142877
    Abstract: An accelerated test for applying a high voltage is performed without reducing a manufacturing yield of a semiconductor device using a wide gap semiconductor material. The technical idea in the embodiment is, for example, an idea of performing the accelerated test in the state of a semiconductor wafer to distinguish a latent defect as illustrated in FIG. 4. That is, the technical idea in the embodiment is to perform the accelerated test on a semiconductor chip containing a wide bandgap semiconductor material as a main component not in the state of a semiconductor chip but in the state of the semiconductor wafer.
    Type: Application
    Filed: February 8, 2021
    Publication date: May 11, 2023
    Inventors: Haruka SHIMIZU, Hiromi SHIMAZU
  • Publication number: 20220375820
    Abstract: A problem is that close contact with a heat dissipation surface of a power semiconductor device is not sufficient, and thus heat dissipation performance is low. A thermally conductive layer 5 abuts on a heat dissipation surface 4a of a circuit body 100, and a heat dissipation member 7 abuts on the outside of the thermally conductive layer 5, which is a side of the heat dissipation surface 4a of the circuit body 100. A fixing member 8 abuts on a side of the circuit body 100 opposite to the heat dissipation surface 4a. A connection member 9 is penetrated at the respective end portions of the heat dissipation member 7 and the fixing member 8. FIG. 3 illustrates a state before a bolt and a nut of the connection member 9 are tightened. The heat dissipation member 7 holds a curved shape such that the central portion of the heat dissipation member 7 protrudes toward the circuit body 100.
    Type: Application
    Filed: September 29, 2020
    Publication date: November 24, 2022
    Applicant: HITACHI ASTEMO, LTD.
    Inventors: Hiromi SHIMAZU, Yujiro KANEKO, Eiichi IDE, Yusuke TAKAGI, Hisashi TANIE
  • Patent number: 11232994
    Abstract: A power semiconductor device includes a circuit body, first and second insulations, first and second bases, a case, and a distance regulation portion. The circuit body incudes a semiconductor element and a conductive portion. The first insulation and the second insulation oppose each other. The first base and second base also oppose each other. The case has a first opening portion covered with the first base and a second opening portion covered with the second base. The distance regulation portion has a first end that contacts the first base and a second end, that is opposite to the first end, and that contacts the second base. The distance regulation portion regulates a distance between the first base and the second base.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: January 25, 2022
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Nobutake Tsuyuno, Hiromi Shimazu, Akihiro Namba, Akira Matsushita, Hiroshi Houzouji, Atsuo Nishihara, Toshiaki Ishii, Takashi Hirao
  • Publication number: 20220013432
    Abstract: A power semiconductor device includes an insulating substrate on which a first conductor layer is arranged on one surface, a first conductor that is connected to the first conductor layer via a first connecting material, and a semiconductor element that is connected to the first conductor via a first connecting material. When viewed from a direction perpendicular to an electrode surface of the semiconductor element, the first conductor includes a peripheral portion formed larger than the semiconductor element. A first recess is formed in the peripheral portion so that a thickness of the first connecting material becomes thicker than other portions.
    Type: Application
    Filed: November 5, 2019
    Publication date: January 13, 2022
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Hiromi SHIMAZU, Yujiro KANEKO, Toru KATO, Akira MATSUSHITA, Eiichi IDE
  • Patent number: 11088042
    Abstract: The objective of the present invention is to provide a technique that ensures conduction between a gate terminal of a semiconductor switching element and a wiring layer in a semiconductor device formed with a wiring layer inside a ceramic layer. This semiconductor device comprises: a wiring layer that is inside a ceramic layer formed above an insulation layer; and a metal layer for connecting terminals from the semiconductor switching element other than the gate terminal. The wiring layer and the gate terminal from the semiconductor switching element are connected electrically via a connection part formed from a conductive material. The connection part protrudes more than the metal layer toward the semiconductor switching element.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: August 10, 2021
    Assignee: HITACHI METALS, LTD.
    Inventors: Hisashi Tanie, Hiromi Shimazu, Hiroyuki Ito
  • Publication number: 20200296828
    Abstract: A ceramic substrate capable of suppressing the reduced reliability caused by via misalignment during manufacturing, and capable of suppressing the reduced reliability caused by thermal stress between the ceramic substrate and a mounting board is provided. The ceramic substrate includes an electrode and a via connected to the electrode. The ceramic substrate includes a plurality of vias provided to a center portion in a first direction of the electrode along a second direction. The first direction is parallel to a surface on which the electrode is disposed. The first direction is a direction connecting a center of the surface to a center of the electrode. The second direction is parallel to the surface and perpendicular to the first direction.
    Type: Application
    Filed: January 16, 2020
    Publication date: September 17, 2020
    Applicant: HITACHI METALS, LTD.
    Inventors: Hisashi TANIE, Kenji HAYASHI, Hiromi SHIMAZU
  • Publication number: 20200227333
    Abstract: An object of the present invention is to provide a power semiconductor device enabling maintenance in reliability and improvement in productivity. According to the present invention, provided are: a circuit body including a semiconductor element and a conductive portion; a first insulation and a second insulation opposed to each other, the circuit body being interposed between the first insulation and the second insulation; a first base and a second base opposed to each other, the circuit body, the first insulation, and the second insulation being interposed between the first base and the second base; a case having a first opening portion covered with the first base and a second opening portion covered with the second base; and a distance regulation portion provided in space between the first base and the second base, the distance regulation portion regulating a distance between the first base and the second base in contact with the first base and the second base.
    Type: Application
    Filed: May 22, 2018
    Publication date: July 16, 2020
    Inventors: Nobutake TSUYUNO, Hiromi SHIMAZU, Akihiro NAMBA, Akira MATSUSHITA, Hiroshi HOUZOUJI, Atsuo NISHIHARA, Toshiaki ISHII, Takashi HIRAO
  • Publication number: 20200203241
    Abstract: The objective of the present invention is to provide a technique that ensures conduction between a gate terminal of a semiconductor switching element and a wiring layer in a semiconductor device formed with a wiring layer inside a ceramic layer. This semiconductor device comprises: a wiring layer that is inside a ceramic layer formed above an insulation layer; and a metal layer for connecting terminals from the semiconductor switching element other than the gate terminal. The wiring layer and the gate terminal from the semiconductor switching element are connected electrically via a connection part formed from a conductive material. The connection part protrudes more than the metal layer toward the semiconductor switching element.
    Type: Application
    Filed: July 2, 2018
    Publication date: June 25, 2020
    Applicant: HITACHI METALS, LTD.
    Inventors: Hisashi TANIE, Hiromi SHIMAZU, Hiroyuki ITO
  • Patent number: 9912248
    Abstract: An object of the present invention is to provide a power module having high reliability. The power module according to the present invention, includes a circuit body and a case housing the circuit body. The case has a first case member including a first base plate and a second case member including a second base plate. The first case member has a first side wall portion formed in an arrangement direction of the first base plate and the second base plate. The second case member has a second side wall portion formed in the arrangement direction, the second side wall portion coupling to the first side wall portion. The first side wall portion and the second side wall portion are formed so as to have the sum of lengths of the first side wall portion and the second side wall portion in the arrangement direction smaller than the thickness of the circuit body. The first case member has a deforming portion smaller than the first base plate and the second base plate in rigidity.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: March 6, 2018
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Hiromi Shimazu, Kinya Nakatsu, Kouji Sasaki, Takahiro Shimura, Hisashi Tanie
  • Publication number: 20170187300
    Abstract: An object of the present invention is to provide a power module having high reliability. The power module according to the present invention, includes a circuit body and a case housing the circuit body. The case has a first case member including a first base plate and a second case member including a second base plate. The first case member has a first side wall portion formed in an arrangement direction of the first base plate and the second base plate. The second case member has a second side wall portion formed in the arrangement direction, the second side wall portion coupling to the first side wall portion. The first side wall portion and the second side wall portion are formed so as to have the sum of lengths of the first side wall portion and the second side wall portion in the arrangement direction smaller than the thickness of the circuit body. The first case member has a deforming portion smaller than the first base plate and the second base plate in rigidity.
    Type: Application
    Filed: July 1, 2015
    Publication date: June 29, 2017
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Hiromi SHIMAZU, Kinya NAKATSU, Kouji SASAKI, Takahiro SHIMURA, Hisashi TANIE
  • Patent number: 9634316
    Abstract: A lithium ion secondary battery includes a positive electrode capable of occluding and discharging lithium ions, a negative electrode capable of occluding and discharging the lithium ions, and a nonaqueous electrolyte including a lithium salt, and being reversively charged/discharged. The positive electrode includes a metal plate, a metal film formed on a surface of the metal plate, and a positive electrode active material layer, the metal film includes one or more metals selected from the group consisting of ruthenium, osmium, palladium, and platinum having a orientation, the positive electrode active material layer is a compound expressed by the following expression: LiCoxNi1-xO2, (where 0?x?1) and is epitaxially grown and formed on a surface of the metal film, and the positive electrode active material is formed such that a c axis of a crystal structure of the positive electrode active material is perpendicular to the metal film.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: April 25, 2017
    Assignee: HITACHI, LTD.
    Inventors: Hiromi Shimazu, Tomio Iwasaki
  • Publication number: 20150276517
    Abstract: A load cell including sensor chip (1) on which plural resistive elements rectangular in a plan view are formed, and a member (2) is provided on a front surface side of a semiconductor substrate made of silicon single crystal. The member (2) includes a load portion (3), a fixed pedestal portion (4), and a strain generation portion (5) that is spaced apart from the load portion (3) and the fixed pedestal portion (4), and arranged between the load portion (3) and the fixed pedestal portion (4). The sensor chip (1) is attached onto a front side surface (2a) of the strain generation portion (5) of the member (2) so that a <100> direction of the silicon single crystal in the semiconductor substrate is parallel to a load direction, and a longitudinal direction of the plural resistive elements has an angle of 45° with respect to a load direction.
    Type: Application
    Filed: May 25, 2012
    Publication date: October 1, 2015
    Applicant: Hitachi, Ltd.
    Inventors: Kisho Ashida, Hiroyuki Ohta, Hiromi Shimazu, Kenichi Kasai
  • Publication number: 20140315090
    Abstract: A lithium ion secondary battery includes a positive electrode capable of occluding and discharging lithium ions, a negative electrode capable of occluding and discharging the lithium ions, and a nonaqueous electrolyte including a lithium salt, and being reversively charged/discharged. The positive electrode includes a metal plate, a metal film formed on a surface of the metal plate, and a positive electrode active material layer, the metal film includes one or more metals selected from the group consisting of ruthenium, osmium, palladium, and platinum having a orientation, the positive electrode active material layer is a compound expressed by the following expression: LiCoxNi1-xO2, (where 0?x?1) and is epitaxially grown and formed on a surface of the metal film, and the positive electrode active material is formed such that a c axis of a crystal structure of the positive electrode active material is perpendicular to the metal film.
    Type: Application
    Filed: October 31, 2011
    Publication date: October 23, 2014
    Applicant: HITACHI, LTD.
    Inventors: Hiromi Shimazu, Tomio Iwasaki
  • Patent number: 8695433
    Abstract: A mechanical-quantity measuring device capable of measuring a strain component in a specific direction with high precision is provided. At least two or more pairs of bridge circuits are formed inside a semiconductor monocrystal substrate and a semiconductor chip, and one of these bridge circuits forms a n-type diffusion resistor in which a direction of a current flow and measuring variation of a resistor value are in parallel with a <100> direction of the semiconductor monocryastal silicon substrate, and an another bridge circuit is composed of combination of p-type diffusion resistors in parallel with a <110> direction.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: April 15, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno
  • Patent number: 8365609
    Abstract: A mechanical-quantity measuring device capable of measuring a strain component in a specific direction with high precision is provided. At least two or more pairs of bridge circuits are formed inside a semiconductor monocrystal substrate and a semiconductor chip, and one of these bridge circuits forms a n-type diffusion resistor in which a direction of a current flow and measuring variation of a resistor value are in parallel with a <100> direction of the semiconductor monocryastal silicon substrate, and an another bridge circuit is composed of combination of p-type diffusion resistors in parallel with a <110> direction.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: February 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno
  • Patent number: 8186228
    Abstract: A strain measuring device includes a bridge circuit comprising a p-type impurity diffused resistor as a strain detecting portion and a bridge circuit comprising an n-type impurity diffused resistor as a strain detecting portion in a semiconductor single crystalline substrate, Sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, the impurity diffused resistor is configured to be a meander shape including strip lines and connecting portions.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: May 29, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Ohta, Hiromi Shimazu, Yohei Tanno
  • Publication number: 20110259112
    Abstract: A mechanical-quantity measuring device capable of measuring a strain component in a specific direction with high precision is provided. At least two or more pairs of bridge circuits are formed inside a semiconductor monocrystal substrate and a semiconductor chip, and one of these bridge circuits forms a n-type diffusion resistor in which a direction of a current flow and measuring variation of a resistor value are in parallel with a <100> direction of the semiconductor monocryastal silicon substrate, and an another bridge circuit is composed of combination of p-type diffusion resistors in parallel with a <110> direction.
    Type: Application
    Filed: July 6, 2011
    Publication date: October 27, 2011
    Applicant: Hitachi Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno