Patents by Inventor Hiromi Shimazu

Hiromi Shimazu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7992448
    Abstract: A mechanical-quantity measuring device capable of measuring a strain component in a specific direction with high precision is provided. At least two or more pairs of bridge circuits are formed inside a semiconductor monocrystal substrate and a semiconductor chip, and one of these bridge circuits forms a n-type diffusion resistor in which a direction of a current flow and measuring variation of a resistor value are in parallel with a <100> direction of the semiconductor monocrystal silicon substrate, and an another bridge circuit is composed of combination of p-type diffusion resistors in parallel with a <110> direction.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: August 9, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno
  • Publication number: 20110128113
    Abstract: A strain measuring device includes a bridge circuit comprising a p-type impurity diffused resistor as a strain detecting portion and a bridge circuit comprising an n-type impurity diffused resistor as a strain detecting portion in a semiconductor single crystalline substrate, Sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, the impurity diffused resistor is configured to be a meander shape including strip lines and connecting portions.
    Type: Application
    Filed: February 10, 2011
    Publication date: June 2, 2011
    Inventors: Hiroyuki OHTA, Hiromi Shimazu, Yohei Tanno
  • Patent number: 7893810
    Abstract: A strain measuring device according to the present invention includes a bridged circuit comprising a p-type impurity diffused resistor as a strain detective portion and a bridged circuit comprising an n-type impurity diffused resistor as a strain detective portion in a semiconductor single crystalline substrate, and sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, it is preferable that the impurity diffused resistor be configured to be a meander shape comprising strip lines and connecting portions. Moreover, it is preferable that the number of strip lines in the p-type impurity diffused resistor be smaller than that in the n-type impurity diffused resistor.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: February 22, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Ohta, Hiromi Shimazu, Yohei Tanno
  • Patent number: 7836755
    Abstract: In a solidification sensor for measuring a solidification state of a liquid with a high degree of accuracy in real time, and for making the sensor small-sized with a reduced power consumption, the solidification sensor comprises a liquid absorbing portion formed of a liquid absorbable material, a substrate coupled to the liquid absorbing portion and a strain sensor for measuring strain exerted to the substrate due to a volumetric change upon solidification of a liquid absorbed in the liquid absorbing portion.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: November 23, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno, Mari Uchida, Naoto Saito
  • Patent number: 7793551
    Abstract: The invention provides a load sensor which is driven by a low electric power consumption, can measure at a high precision, and has a high reliability without being broken. The load sensor is structured such that a detection rod for detecting a strain is provided in an inner portion of a hole formed near a center of a pin via a shock relaxation material and a semiconductor strain sensor is provided in the detection rod, in a load sensor detecting a load applied to the pin from a strain generated in an inner portion of the pin.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: September 14, 2010
    Assignee: Hitachi Construction Machinery Co., Ltd.
    Inventors: Hiromi Shimazu, Yohei Tanno, Hiroyuki Ohta, Ryuji Takada, Takayuki Shimodaira
  • Patent number: 7584668
    Abstract: A monitoring system for valve device according to the present invention comprises a semiconductor single crystalline substrate including a bridged circuit and the bridged circuit comprising impurity-diffused resistors. The semiconductor single crystalline substrate is mounted to any of a valve device's valve stem, valve yoke, drive shaft, or elastic body disposed at the end of the drive shaft. Thrust and torque of the valve device are measured by the semiconductor single crystalline substrate and then the measured values are used for monitoring the valve device.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: September 8, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Ohta, Hiromi Shimazu, Yohei Tanno, Yoshihisa Kiyotoki, Kenji Onodera, Kenji Araki
  • Publication number: 20090199650
    Abstract: It is an object to prevent breakage of a mechanical quantity measuring apparatus made of a monocrystalline silicon substrate due to a large distortion. A mounting board for measuring distortion is provided on a rear surface of a sensor chip made of a semiconductor monocrystalline substrate having a distortion detecting unit. Even when a large distortion occurs in an object to be measured, a distortion occurring in the semiconductor monocrystalline substrate can be controlled by the mounting board. Therefore, the semiconductor monocrystalline substrate is not broken, and a highly reliable mechanical quantity measuring apparatus can be provided.
    Type: Application
    Filed: April 23, 2009
    Publication date: August 13, 2009
    Applicant: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta
  • Publication number: 20090031819
    Abstract: The invention provides a load sensor which is driven by a low electric power consumption, can measure at a high precision, and has a high reliability without being broken. The load sensor is structured such that a detection rod for detecting a strain is provided in an inner portion of a hole formed near a center of a pin via a shock relaxation material and a semiconductor strain sensor is provided in the detection rod, in a load sensor detecting a load applied to the pin from a strain generated in an inner portion of the pin.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 5, 2009
    Inventors: Hiromi Shimazu, Yohei Tanno, Hiroyuki Ohta, Ryuji Takada, Takayuki Shimodaira
  • Patent number: 7459786
    Abstract: A reliable semiconductor device having a multilayer wiring structure formed of copper as a main component material, which constrains occurrence of voids caused by stress migration. In the multilayer wiring structure, a first insulation layer having a high barrier property and a compression stress, and making contact with the upper surface of a first wiring made of copper as a main component material, a second insulation film having a tensile stress, and a third insulation film having a dielectric constant which is lower than those of the first and second insulation film, are laminated one upon another in the mentioned order as viewed the bottom thereof, and a via hole is formed piercing through the first insulation film, the second insulation film and the third insulation film, making contact with the first wiring.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: December 2, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta, Kensuke Ishikawa, Osamu Inoue, Takayuki Oshima
  • Publication number: 20080121024
    Abstract: In a solidification sensor for measuring a solidification state of a liquid with a high degree of accuracy in real time, and for making the sensor small-sized with a reduced power consumption, the solidification sensor comprises a liquid absorbing portion formed of a liquid absorbable material, a substrate coupled to the liquid absorbing portion and a strain sensor for measuring strain exerted to the substrate due to a volumetric change upon solidification of a liquid absorbed in the liquid absorbing portion.
    Type: Application
    Filed: November 21, 2007
    Publication date: May 29, 2008
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno, Mari Uchida, Naoto Saito
  • Publication number: 20080079531
    Abstract: A strain measuring device according to the present invention includes a bridged circuit comprising a p-type impurity diffused resistor as a strain detective portion and a bridged circuit comprising an n-type impurity diffused resistor as a strain detective portion in a semiconductor single crystalline substrate, and sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, it is preferable that the impurity diffused resistor be configured to be a meander shape comprising strip lines and connecting portions. Moreover, it is preferable that the number of strip lines in the p-type impurity diffused resistor be smaller than that in the n-type impurity diffused resistor.
    Type: Application
    Filed: August 24, 2007
    Publication date: April 3, 2008
    Inventors: Hiroyuki OHTA, Hiromi SHIMAZU, Yohei TANNO
  • Publication number: 20080034882
    Abstract: A monitoring system for valve device according to the present invention comprises a semiconductor single crystalline substrate including a bridged circuit and the bridged circuit comprising impurity-diffused resistors. The semiconductor single crystalline substrate is mounted to any of a valve device's valve stem, valve yoke, drive shaft, or elastic body disposed at the end of the drive shaft. Thrust and torque of the valve device are measured by the semiconductor single crystalline substrate and then the measured values are used for monitoring the valve device.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 14, 2008
    Inventors: Hiroyuki Ohta, Hiromi Shimazu, Yohei Tanno, Yoshihisa Kiyotoki, Kenji Onodera, Kenji Araki
  • Publication number: 20070240519
    Abstract: It is an object to prevent breakage of a mechanical quantity measuring apparatus made of a monocrystalline silicon substrate due to a large distortion. A mounting board for measuring distortion is provided on a rear surface of a sensor chip made of a semiconductor monocrystalline substrate having a distortion detecting unit. Even when a large distortion occurs in an object to be measured, a distortion occurring in the semiconductor monocrystalline substrate can be controlled by the mounting board. Therefore, the semiconductor monocrystalline substrate is not broken, and a highly reliable mechanical quantity measuring apparatus can be provided.
    Type: Application
    Filed: January 25, 2007
    Publication date: October 18, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta
  • Publication number: 20070228500
    Abstract: A mechanical-quantity measuring device capable of measuring a strain component in a specific direction with high precision is provided. At least two or more pairs of bridge circuits are formed inside a semiconductor monocrystal substrate and a semiconductor chip, and one of these bridge circuits forms a n-type diffusion resistor in which a direction of a current flow and measuring variation of a resistor value are in parallel with a <100> direction of the semiconductor monocrystal silicon substrate, and an another bridge circuit is composed of combination of p-type diffusion resistors in parallel with a <110> direction.
    Type: Application
    Filed: February 20, 2007
    Publication date: October 4, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Hiroyuki Ohta, Yohei Tanno
  • Publication number: 20060006543
    Abstract: A reliable semiconductor device having a multilayer wiring structure formed of copper as a main component material, which constrains occurrence of voids caused by stress migration. In the multilayer wiring structure, a first insulation layer having a high barrier property and a compression stress, and making contact with the upper surface of a first wiring made of copper as a main component material, a second insulation film having a tensile stress, and a third insulation film having a dielectric constant which is lower than those of the first and second insulation film, are laminated one upon another in the mentioned order as viewed the bottom thereof, and a via hole is formed piercing thorough the first insulation film, the second insulation film and the third insulation film, making contact with the first wiring.
    Type: Application
    Filed: June 17, 2005
    Publication date: January 12, 2006
    Applicant: Hitachi, Ltd.
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta, Kensuke Ishikawa, Osamu Inoue, Takayuki Oshima
  • Patent number: 6969671
    Abstract: A diffusion layer 3a of a silicon substrate, a polycrystalline silicon material 10, or a gate electrode 12 is connected to a conductive film 8 through a titanium silicide film 6 within a contact hole 5 provided in an insulating film 4. The titanium silicide film 6 is formed by the silicide reaction between a titanium film 7 and the silicon. The upper limit of the thickness of the titanium silicide film 6, and the upper limit of the titanium film 7 are specified by the internal stress within the conductive film 8.
    Type: Grant
    Filed: November 4, 1997
    Date of Patent: November 29, 2005
    Assignee: Renesas Technology Corporation
    Inventors: Hiromi Shimazu, Tsuyoshi Baba, Masayuki Suzuki, Hideo Miura
  • Patent number: 6960832
    Abstract: In a semiconductor device having a cobalt silicide film, at least nickel or iron is contained in the cobalt silicide film for preventing the rise of resistance incidental to thinning of the film.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: November 1, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta, Hideo Miura, Shuji Ikeda
  • Publication number: 20050056938
    Abstract: A semiconductor device has a wiring structure in which an insulating layer, a wiring layer made of Al and containing at least either Au or Ag as an additional element, and a protecting layer are sequentially laminated on a substrate, so that a peel-off does not occur at an interface between the Al film and a substratum insulative material in an Al wiring structure made of Al as a main component material.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 17, 2005
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta
  • Publication number: 20040150111
    Abstract: In a semiconductor device having a cobalt silicide film, at least nickel or iron is contained in the cobalt silicide film for preventing the rise of resistance incidental to thinning of the film.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 5, 2004
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta, Hideo Miura, Shuji Ikeda
  • Patent number: 6686274
    Abstract: In a semiconductor device having a cobalt silicide film, at least nickel or iron is contained in the cobalt silicide film for preventing the rise of resistance incidental to thinning of the film.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: February 3, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta, Hideo Miura, Shuji Ikeda