Patents by Inventor Hiromichi Enami
Hiromichi Enami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100297783Abstract: A method for performing a plasma process using a plasma processing apparatus which includes a vacuum process chamber, an exhaust device, a mass flow controller supplying a process gas, a stage electrode which receives and holds a workpiece by adsorption, a transfer device, and a high-frequency electrical source. The method includes a first step of performing the plasma process for the workpiece in the vacuum process chamber by a corresponding recipe of predetermined recipes, a second step of acquiring apparatus parameters showing the condition of the plasma processing apparatus when a specific recipe of the predetermined recipes is executed to diagnose whether the condition of the plasma processing apparatus is good or not based on the acquired apparatus parameters.Type: ApplicationFiled: August 3, 2010Publication date: November 25, 2010Inventors: Shoji IKUHARA, Daisuke Shiraishi, Hideyuki Yamamoto, Akira Kagoshima, Hiromichi Enami, Yosuke Karashima, Eiji Matsumoto
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Publication number: 20100132888Abstract: A plasma processing apparatus includes a plasma processing main frame, and an apparatus controller controlling the plasma processing main frame. The plasma processing main frame has a vacuum process chamber, an exhaust device, a mass flow controller, a stage electrode receiving a workpiece, a high-frequency electrical source to, and a transfer device placing the workpiece on the stage electrode and carrying out the processed workpiece. The apparatus controller controls the plasma processing main frame in accordance with a predetermined procedure and is provided with a diagnosis device which acquires a plurality of recipes for processing workpieces carried in the chamber and apparatus parameters of the plasma processing apparatus when a specific recipe of the above recipes is executed, whereby the condition of the plasma processing main frame is diagnosed based on the acquired apparatus parameters.Type: ApplicationFiled: February 3, 2010Publication date: June 3, 2010Inventors: Shoji IKUHARA, Daisuke Shiraishi, Hideyuki Yamamoto, Akira Kagoshima, Hiromichi Enami, Yosuke Karashima, Eiji Matsumoto
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Patent number: 7686917Abstract: A plasma processing apparatus includes a vacuum vessel with a sample stage having a mounting surface disposed in a process chamber, and a plate having substantially uniform thickness and electric power applied thereto constituting a ceiling of the chamber. The plate is disposed opposite to and substantially parallel with the sample stage so as to cover the whole area of the stage mounting surface and has a through-hole therein. An optical transmitter with a diameter larger than a diameter of the though-hole is disposed inside of the vacuum vessel and has an end face at a position above and spaced a small distance a back surface of the plate so as to receive light from the chamber via the through-hole. The optical transmitter is independently detachable with respect to the back surface of the plate.Type: GrantFiled: July 19, 2007Date of Patent: March 30, 2010Assignee: Hitachi, Ltd.Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Patent number: 7526948Abstract: A detection technique for detecting foreign material on the surface of a plasma processing apparatus, capable of accurately sucking/extracting and measuring foreign material contained in the measurement object surface is provided. The detection device comprises a gauge head or probe having a gas blow out opening for intermittently blowing a gas of a predetermined pressure to a measurement object surface and a gas suction opening for sucking foreign material discharged by the gas blown out from the gas blow out opening a particle counter having a suction pump for continuously sucking in a predetermined amount of gas from the gas suction opening for counting the number of foreign material particles contained in the gas sucked by the suction pump and a pressure adjustment unit for intermittently supplying gas of a predetermined pressure to the gas blowing out opening.Type: GrantFiled: August 31, 2005Date of Patent: May 5, 2009Assignee: Hitachi High-Technologies CorporationInventors: Hideyuki Yamamoto, Hiromichi Enami, Muneo Furuse
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Publication number: 20080011422Abstract: A plasma processing apparatus includes a vacuum vessel with a sample stage having a mounting surface disposed in a process chamber, and a plate having substantially uniform thickness and electric power applied thereto constituting a ceiling of the chamber. The plate is disposed opposite to and substantially parallel with the sample stage so as to cover the whole area of the stage mounting surface and has a through-hole therein. An optical transmitter with a diameter larger than a diameter of the though-hole is disposed inside of the vacuum vessel and has an end face at a position above and spaced a small distance a back surface of the plate so as to receive light from the chamber via the through-hole. The optical transmitter is independently detachable with respect to the back surface of the plate.Type: ApplicationFiled: July 19, 2007Publication date: January 17, 2008Inventors: Toshio MASUDA, Tatehito USUI, Mitsuru SUEHIRO, Hiroshi KANEKIYO, Hideyuki YAMAMOTO, Kazue TAKAHASHI, Hiromichi ENAMI
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Publication number: 20070032088Abstract: A detection technique for detecting foreign material on the surface of a plasma processing apparatus, capable of accurately sucking/extracting and measuring foreign material contained in the measurement object surface is provided. The detection device comprises a gauge head or probe having a gas blow out opening for intermittently blowing a gas of a predetermined pressure to a measurement object surface and a gas suction opening for sucking foreign material discharged by the gas blown out from the gas blow out opening a particle counter having a suction pump for continuously sucking in a predetermined amount of gas from the gas suction opening for counting the number of foreign material particles contained in the gas sucked by the suction pump and a pressure adjustment unit for intermittently supplying gas of a predetermined pressure to the gas blowing out opening.Type: ApplicationFiled: August 31, 2005Publication date: February 8, 2007Inventors: Hideyuki Yamamoto, Hiromichi Enami, Muneo Furuse
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Patent number: 7169254Abstract: A plasma processing apparatus having a sample stage disposed inside a vacuum chamber and a plate member disposed opposing to a sample which is placed on the sample stage and supplied with electric power. The sample is processed using a plasma generated between the sample stage and the plate member and a measuring port is disposed at a back side of the plate member. The measuring port includes an optical transmitter which receives light from a surface of the sample, and a seal which vacuum-seals between an atmospheric side and vacuum side of the vacuum chamber.Type: GrantFiled: December 11, 2003Date of Patent: January 30, 2007Assignee: Hitachi, Ltd.Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Publication number: 20060260746Abstract: There is provided a preventive maintenance technique capable of diagnosing apparatus conditions without causing serious decrease in uptime ratio. A plasma process apparatus is composed of a plasma processing main frame, and an apparatus controller controlling the plasma processing main frame. The plasma processing main frame has a vacuum process chamber, an exhaust device evacuating the vacuum process chamber, a mass flow controller supplying a process gas into the vacuum process chamber, a stage electrode receiving a workpiece and holding it by adsorption, a high-frequency electrical source applying a high-frequency electrical power to the supplied process gas to generate plasma, and a transfer device placing the workpiece on the stage electrode and carrying out the processed workpiece.Type: ApplicationFiled: August 9, 2005Publication date: November 23, 2006Inventors: Shoji Ikuhara, Daisuke Shiraishi, Hideyuki Yamamoto, Akira Kagoshima, Hiromichi Enami, Yosuke Karashima, Eiji Matsumoto
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Patent number: 6923885Abstract: A plasma processing apparatus having a sample bench located in a vacuum chamber, a structure disposed at a position opposed to a sample placed on the sample bench and facing a plasma generated in the vacuum chamber, and at least one through-hole disposed in the structure through which a gas flows into the vacuum chamber. An optical transmitter is mounted on a back of the at least one through-hole through which light from the sample passes, which light is detected by way of the optical transmitter.Type: GrantFiled: December 11, 2003Date of Patent: August 2, 2005Assignee: Hitachi, Ltd.Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Patent number: 6894334Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel sType: GrantFiled: March 3, 2003Date of Patent: May 17, 2005Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.Inventors: Jun Sugiura, Osamu Tsuchiya, Makoto Ogasawara, Fumio Ootsuka, Kazuyoshi Torii, Isamu Asano, Nobuo Owada, Mitsuaki Horiuchi, Tsuyoshi Tamaru, Hideo Aoki, Nobuhiro Otsuka, Seiichirou Shirai, Masakazu Sagawa, Yoshihiro Ikeda, Masatoshi Tsuneoka, Toru Kaga, Tomotsugu Shimmyo, Hidetsugu Ogishi, Osamu Kasahara, Hiromichi Enami, Atsushi Wakahara, Hiroyuki Akimori, Sinichi Suzuki, Keisuke Funatsu, Yoshinao Kawasaki, Tunehiko Tubone, Takayoshi Kogano, Ken Tsugane
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Publication number: 20040177925Abstract: A plasma processing apparatus includes a processing chamber, a sample bench in the processing chamber mounting a wafer thereon, a plate having a plurality of through holes including discharge holes through which a processing gas flows into the processing chamber, the plate being disposed in an upper portion of the processing chamber, and a member in the upper portion of the processing chamber and provided with the plate on the side thereof facing the plasma. A light receiving unit is provided having an optical transmitter for transmitting therethrough a light from inside of the processing chamber having passed the through holes formed in the plate. The light receiving unit is attached to the member, and an end face of the optical transmitter is opposed to a back of the plate and the through holes so as to be in contact therewith or spaced therefrom by a minute gap.Type: ApplicationFiled: March 29, 2004Publication date: September 16, 2004Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Patent number: 6755932Abstract: The object of the present invention is to provide a plasma processing apparatus wherein plasma is generated in process chamber to treat a sample. Said plasma processing apparatus is further characterized in that multiple closely packed through-holes are formed on the plate installed on the UHF antenna arranged opposite to the sample, an optical transmitter is installed almost in contact with the back of the through-holes, and an optical transmission means is arranged on the other end of said optical transmitter, thereby measuring optical information coming from the sample and plasma through optical transmitter and optical transmission means by means of a measuring instrument. No abnormal discharge or particle contamination occur to through-holes even in long-term discharge process, and no deterioration occurs to the optical performance at the end face of the optical transmitter.Type: GrantFiled: February 21, 2001Date of Patent: June 29, 2004Assignee: Hitachi, Ltd.Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Publication number: 20040118518Abstract: A plasma processing apparatus having a sample bench located in a vacuum chamber, a structure disposed at a position opposed to a sample placed on the sample bench and facing a plasma generated in the vacuum chamber, and at least one through-hole disposed in the structure through which a gas flows into the vacuum chamber. An optical transmitter is mounted on a back of the at least one through-hole through which light from the sample passes, which light is detected by way of the optical transmitter.Type: ApplicationFiled: December 11, 2003Publication date: June 24, 2004Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Publication number: 20040118517Abstract: A plasma processing apparatus having a sample stage disposed inside a vacuum chamber and a plate member disposed opposing to a sample which is placed on the sample stage and supplied with electric power. The sample is processed using a plasma generated between the sample stage and the plate member and a measuring port is disposed at a back side of the plate member. The measuring port includes an optical transmitter which receives light from a surface of the sample, and a seal which vacuum-seals between an atmospheric side and vacuum side of the vacuum chamber.Type: ApplicationFiled: December 11, 2003Publication date: June 24, 2004Inventors: Toshio Masuda, Tatehito Usui, Mitsuru Suehiro, Hiroshi Kanekiyo, Hideyuki Yamamoto, Kazue Takahashi, Hiromichi Enami
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Patent number: 6754552Abstract: A plurality of measuring devices to obtain numerical information necessary for control in process control of plasma utilizing equipment are connected to a first communication link, a plurality controllers to conduct numerical operations according to the numerical information are connected to a second communication link, and a plurality of control devices to receive control numerical information generated by the controllers to conduct necessary control.Type: GrantFiled: March 5, 2001Date of Patent: June 22, 2004Assignee: Hitachi, Ltd.Inventors: Masaharu Nishiumi, Hiromichi Enami
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Publication number: 20030189255Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel sType: ApplicationFiled: March 3, 2003Publication date: October 9, 2003Inventors: Jun Sugiura, Osamu Tsuchiya, Makoto Ogasawara, Fumio Ootsuka, Kazuyoshi Torii, Isamu Asano, Nobuo Owada, Mitsuaki Horiuchi, Tsuyoshi Tamaru, Hideo Aoki, Nobuhiro Otsuka, Seiichirou Shirai, Masakazu Sagawa, Yoshihiro Ikeda, Masatoshi Tsuneoka, Toru Kaga, Tomotsugu Shimmyo, Hidetsugu Ogishi, Osamu Kasahara, Hiromichi Enami, Atsushi Wakahara, Hiroyuki Akimori, Sinichi Suzuki, Keisuke Funatsu, Yoshinao Kawasaki, Tunehiko Tubone, Takayoshi Kogano, Ken Tsugane
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Patent number: 6548847Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel sType: GrantFiled: July 9, 2001Date of Patent: April 15, 2003Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.Inventors: Jun Sugiura, Osamu Tsuchiya, Makoto Ogasawara, Fumio Ootsuka, Kazuyoshi Torii, Isamu Asano, Nobuo Owada, Mitsuaki Horiuchi, Tsuyoshi Tamaru, Hideo Aoki, Nobuhiro Otsuka, Seiichirou Shirai, Masakazu Sagawa, Yoshihiro Ikeda, Masatoshi Tsuneoka, Toru Kaga, Tomotsugu Shimmyo, Hidetsugu Ogishi, Osamu Kasahara, Hiromichi Enami, Atsushi Wakahara, Hiroyuki Akimori, Sinichi Suzuki, Keisuke Funatsu, Yoshinao Kawasaki, Tunehiko Tubone, Takayoshi Kogano, Ken Tsugane
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Publication number: 20020052668Abstract: A plurality of measuring devices to obtain numerical information necessary for control in process control of plasma utilizing equipment are connected to a first communication link, a plurality controllers to conduct numerical operations according to the numerical information are connected to a second communication link, and a plurality of control devices to receive control numerical information generated by the controllers to conduct necessary control.Type: ApplicationFiled: March 5, 2001Publication date: May 2, 2002Inventors: Masaharu Nishiumi, Hiromichi Enami
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Publication number: 20020017669Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel sType: ApplicationFiled: July 9, 2001Publication date: February 14, 2002Inventors: Jun Sugiura, Osamu Tsuchiya, Makoto Ogasawara, Fumio Ootsuka, Kazuyoshi Torii, Isamu Asano, Nobuo Owada, Mitsuaki Horiuchi, Tsuyoshi Tamaru, Hideo Aoki, Nobuhiro Otsuka, Seiichirou Shirai, Masakazu Sagawa, Yoshihiro Ikeda, Masatoshi Tsuneoka, Toru Kaga, Tomotsugu Shimmyo, Hidetsugu Ogishi, Osamu Kasahara, Hiromichi Enami, Atsushi Wakahara, Hiroyuki Akimori, Sinichi Suzuki, Keisuke Funatsu, Yoshinao Kawasaki, Tunehiko Tubone, Takayoshi Kogano, Ken Tsugane
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Patent number: 6342412Abstract: Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel sType: GrantFiled: December 14, 1999Date of Patent: January 29, 2002Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.Inventors: Jun Sugiura, Osamu Tsuchiya, Makoto Ogasawara, Fumio Ootsuka, Kazuyoshi Torii, Isamu Asano, Nobuo Owada, Mitsuaki Horiuchi, Tsuyoshi Tamaru, Hideo Aoki, Nobuhiro Otsuka, Seiichirou Shirai, Masakazu Sagawa, Yoshihiro Ikeda, Masatoshi Tsuneoka, Toru Kaga, Tomotsugu Shimmyo, Hidetsugu Ogishi, Osamu Kasahara, Hiromichi Enami, Atsushi Wakahara, Hiroyuki Akimori, Sinichi Suzuki, Keisuke Funatsu, Yoshinao Kawasaki, Tunehiko Tubone, Takayoshi Kogano, Ken Tsugane