Patents by Inventor Hiromichi Godo

Hiromichi Godo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240298447
    Abstract: A novel semiconductor device is provided. A memory string, which extends in the Z direction and includes a conductor and an oxide semiconductor, intersects with a plurality of wirings CG extending in the Y direction. The conductor is placed along a center axis of the memory string, and the oxide semiconductor is concentrically placed outside the conductor. The conductor is electrically connected to the oxide semiconductor. An intersection portion of the memory string and the wiring CG functions as a transistor. In addition, the intersection portion functions as a memory cell.
    Type: Application
    Filed: May 8, 2024
    Publication date: September 5, 2024
    Inventors: Hiromichi GODO, Hitoshi KUNITAKE, Kazuki TSUDA
  • Publication number: 20240274627
    Abstract: Environmental information is managed by a neural network. An image detection module includes a first neural network, a first communication module, a first position sensor, a first processor, and a passive element. The first neural network includes an imaging device. The imaging device has a function of obtaining an image, and the first position sensor has a function of detecting positional information on where the image is obtained. When the first neural network determines whether the image has learned features, the first processor can transmit the positional information on where the image is obtained. The first processor receives a detection result through the first communication module, and the first processor can operate the passive element in accordance with the detection result.
    Type: Application
    Filed: April 24, 2024
    Publication date: August 15, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro FUKUTOME, Hiromichi GODO
  • Publication number: 20240256037
    Abstract: To provide a novel electronic device. The electronic device includes a housing and a display device. The display device includes a first layer, a second layer, and a third layer. The first layer, the second layer, and the third layer are provided in different layers. The first layer includes a driver circuit and an arithmetic circuit. The second layer includes pixel circuits and a cell array. The third layer includes light-receiving devices and light-emitting devices. The pixel circuits each have a function of controlling light emission of the light-emitting device. The driver circuit has a function of controlling the pixel circuits. The arithmetic circuit has a function of performing arithmetic processing on the basis of first data corresponding to currents output from the light-receiving devices and second data corresponding to a potential held in the cell array.
    Type: Application
    Filed: March 4, 2024
    Publication date: August 1, 2024
    Inventors: Yoshiyuki KUROKAWA, Hiromichi GODO, Kouhei TOYOTAKA, Kazuki TSUDA, Satoru OHSHITA, Hidefumi RIKIMARU
  • Publication number: 20240256033
    Abstract: An electronic device that enables smooth communication is provided. The electronic device includes a display portion including a first camera; a second camera; and an image processing portion. The second camera is positioned in a region not overlapping with the display portion. The first camera has a function of generating a first image of a subject, and the second camera has a function of generating a second image of the subject. The image processing portion includes a generator that performs learning using training data. The training data includes an image including a person's face. The image processing portion has a function of making the first image clear when the first image is input to the generator and a function of tracking the gaze of the subject on the basis of the second image.
    Type: Application
    Filed: June 20, 2022
    Publication date: August 1, 2024
    Inventors: Hiromichi GODO, Yoshiyuki KUROKAWA, Seiko INOUE, Kazuaki OHSHIMA, Shunpei YAMAZAKI
  • Publication number: 20240237374
    Abstract: An electronic device having an eye tracking function is provided. The electronic device includes a display device and an optical system. The display device includes a first light-emitting element, a second light-emitting element, a sensor portion, and a driver circuit portion. The sensor portion includes a light-receiving element. The first light-emitting element has a function of emitting infrared light or visible light. The second light-emitting element has a function of emitting light of a color different from that of light emitted from the first light-emitting element. When the first light-emitting element emits infrared light, the light-receiving element has a function of detecting the infrared light that is emitted from the first light-emitting element and reflected by an eyeball of a user.
    Type: Application
    Filed: February 24, 2022
    Publication date: July 11, 2024
    Inventors: Hiromichi GODO, Yoshiyuki KUROKAWA, Kouhei TOYOTAKA, Kazuki TSUDA, Satoru OHSHITA, Hidefumi RIKIMARU
  • Publication number: 20240234310
    Abstract: A novel semiconductor device is provided. In reservoir computing using an input layer, a reservoir layer, and an output layer, variation in threshold voltage between transistors is used as a weight used for product arithmetic processing. Two transistors are provided in one product arithmetic circuit and data u is supplied to gates of the two transistors. Drain current of each of the transistors is determined by the data u and the threshold voltage of the transistor. The difference between the drain currents corresponds to a product arithmetic result. The difference between the drain currents is converted into voltage to be output. A plurality of product arithmetic circuits are connected in parallel to form a product-sum arithmetic circuit.
    Type: Application
    Filed: May 13, 2022
    Publication date: July 11, 2024
    Inventors: Yoshiyuki KUROKAWA, Hiromichi GODO, Kazuki TSUDA, Kouhei TOYOTAKA, Satoru OHSHITA, Hidefumi RIKIMARU, Hideki UOCHI
  • Publication number: 20240231756
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a cell array performing a product-sum operation of a first layer and a product-sum operation of a second layer in an artificial neural network, a first circuit from which first data is input to the cell array, and a second circuit to which second data is output from the cell array. The cell array includes a plurality of cells. The cell array includes a first region and a second region. In a first period, the first region is supplied with the t-th (t is a natural number greater than or equal to 2) first data from the first circuit and outputs the t-th second data according to the product-sum operation of the first layer to the second circuit. In the first period, the second region is supplied with the (t+1)-th first data from the first circuit and outputs the (t+1)-th second data according to the product-sum operation of the second layer to the first circuit.
    Type: Application
    Filed: February 24, 2022
    Publication date: July 11, 2024
    Inventors: Yoshiyuki KUROKAWA, Hiromichi GODO, Kazuki TSUDA, Satoru OHSHITA, Hidefumi RIKIMARU
  • Publication number: 20240237435
    Abstract: A semiconductor device with reduced circuit area is provided. The semiconductor device includes first and second cell arrays and a first converter circuit. The first cell array includes a first cell and a second cell in the same row, and the second cell array includes third and fourth cells in the same row. The first cell is electrically connected to first and second wirings, the second cell is electrically connected to the first and third wirings, the third cell is electrically connected to fourth and sixth wirings, and the fourth cell is electrically connected to fifth and seventh wirings. The sixth wiring is electrically connected to the seventh wiring. The first to fourth cells each have a function of outputting current corresponding to a product of retained data and input data. Specifically, the first cell, the second cell, the third cell, and the fourth cell output current to the second wiring, the third wiring, the sixth wiring, and the seventh wiring, respectively.
    Type: Application
    Filed: April 20, 2022
    Publication date: July 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuki TSUDA, Hidefumi RIKIMARU, Satoru OHSHITA, Hiromichi GODO, Yoshiyuki KUROKAWA
  • Publication number: 20240215425
    Abstract: A display apparatus having a novel structure is provided. A plurality of display panels, a fixing member having a curved surface, and a housing storing the fixing member are included. The display panel includes a display portion including a pixel circuit, a non-display portion provided to surround the display portion, a gate driver circuit for driving the pixel circuit, and a source driver circuit. The gate driver circuit is provided at a position overlapping with the display portion. The source driver circuit is provided at a position overlapping with the non-display portion. The plurality of display panels are fixed along the curved surface of the fixing member.
    Type: Application
    Filed: April 25, 2022
    Publication date: June 27, 2024
    Inventors: Hiromichi GODO, Kazuki TSUDA, Hidefumi RIKIMARU, Yoshiyuki KUROKAWA
  • Patent number: 11985827
    Abstract: A novel semiconductor device is provided. A memory string, which extends in the Z direction and includes a conductor and an oxide semiconductor, intersects with a plurality of wirings CG extending in the Y direction. The conductor is placed along a center axis of the memory string, and the oxide semiconductor is concentrically placed outside the conductor. The conductor is electrically connected to the oxide semiconductor. An intersection portion of the memory string and the wiring CG functions as a transistor. In addition, the intersection portion functions as a memory cell.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: May 14, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Hitoshi Kunitake, Kazuki Tsuda
  • Publication number: 20240143441
    Abstract: To provide an operation method of a semiconductor device in which a variation in arithmetic operation results is reduced. The semiconductor device includes first and second cell arrays and first to fifth circuits. First, third standard data is written from the fourth circuit to the second cell array, and first standard data is written from the first circuit to the first cell array. Then, second standard data is transmitted from the second circuit to the first cell array, a result of a product-sum operation of the first standard data and the second standard data is input from the first cell array to the third circuit, and fourth standard data corresponding to the result of the product-sum operation is transmitted from the third circuit to the second cell array.
    Type: Application
    Filed: October 20, 2023
    Publication date: May 2, 2024
    Inventors: Hidefumi RIKIMARU, Seiko INOUE, Hiromichi GODO, Yoshiyuki KUROKAWA
  • Publication number: 20240138167
    Abstract: An electronic device having an eye tracking function is provided. The electronic device includes a display device and an optical system. The display device includes a first light-emitting element, a second light-emitting element, a sensor portion, and a driver circuit portion. The sensor portion includes a light-receiving element. The first light-emitting element has a function of emitting infrared light or visible light. The second light-emitting element has a function of emitting light of a color different from that of light emitted from the first light-emitting element. When the first light-emitting element emits infrared light, the light-receiving element has a function of detecting the infrared light that is emitted from the first light-emitting element and reflected by an eyeball of a user.
    Type: Application
    Filed: February 24, 2022
    Publication date: April 25, 2024
    Inventors: Hiromichi GODO, Yoshiyuki KUROKAWA, Kouhei TOYOTAKA, Kazuki TSUDA, Satoru OHSHITA, Hidefumi RIKIMARU
  • Publication number: 20240134605
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a cell array performing a product-sum operation of a first layer and a product-sum operation of a second layer in an artificial neural network, a first circuit from which first data is input to the cell array, and a second circuit to which second data is output from the cell array. The cell array includes a plurality of cells. The cell array includes a first region and a second region. In a first period, the first region is supplied with the t-th (t is a natural number greater than or equal to 2) first data from the first circuit and outputs the t-th second data according to the product-sum operation of the first layer to the second circuit. In the first period, the second region is supplied with the (t+1)-th first data from the first circuit and outputs the (t+1)-th second data according to the product-sum operation of the second layer to the first circuit.
    Type: Application
    Filed: February 24, 2022
    Publication date: April 25, 2024
    Inventors: Yoshiyuki KUROKAWA, Hiromichi GODO, Kazuki TSUDA, Satoru OHSHITA, Hidefumi RIKIMARU
  • Publication number: 20240113346
    Abstract: A semiconductor device in which a circuit and a battery are efficiently stored is provided. In the semiconductor device, a first transistor, a second transistor, and a secondary battery are provided over one substrate. A channel region of the second transistor includes an oxide semiconductor. The secondary battery includes a solid electrolyte, and can be fabricated by a semiconductor manufacturing process. The substrate may be a semiconductor substrate or a flexible substrate. The secondary battery has a function of being wirelessly charged.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Junpei MOMO, Kazutaka KURIKI, Hiromichi GODO, Shunpei YAMAZAKI
  • Patent number: 11922690
    Abstract: A data processing system, a data processing device, and a data processing method are provided. The data processing system includes a wearable device including a display means and an imaging means and a database that is connected to the wearable device through a network. The database includes at least one of pieces of information on a cooking recipe, a cooking method, and a material. The wearable device detects a first material by the imaging means. The wearable device collects information on the first material from the database. When the first material exists in a specific region in an imaging range of the imaging means, the information on the first material is displayed on the display means. When the first material does not exist in the specific region, the information on the first material is not displayed on the display means.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuro Kanemura, Taisuke Higashi, Hiroya Hibino, Atsuya Tokinosu, Hiromichi Godo, Satoru Okamoto
  • Patent number: 11921919
    Abstract: To provide a novel electronic device. The electronic device includes a housing and a display device. The display device includes a first layer, a second layer, and a third layer. The first layer, the second layer, and the third layer are provided in different layers. The first layer includes a driver circuit and an arithmetic circuit. The second layer includes pixel circuits and a cell array. The third layer includes light-receiving devices and light-emitting devices. The pixel circuits each have a function of controlling light emission of the light-emitting device. The driver circuit has a function of controlling the pixel circuits. The arithmetic circuit has a function of performing arithmetic processing on the basis of first data corresponding to currents output from the light-receiving devices and second data corresponding to a potential held in the cell array.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Hiromichi Godo, Kouhei Toyotaka, Kazuki Tsuda, Satoru Ohshita, Hidefumi Rikimaru
  • Publication number: 20240038899
    Abstract: It is an object to provide a highly reliable thin film transistor with stable electric characteristics, which includes an oxide semiconductor film. The channel length of the thin film transistor including the oxide semiconductor film is in the range of 1.5 ?m to 100 ?m inclusive, preferably 3 ?m to 10 ?m inclusive; when the amount of change in threshold voltage is less than or equal to 3 V, preferably less than or equal to 1.5 V in an operation temperature range of room temperature to 180° C. inclusive or ?25° C. to 150° C. inclusive, a semiconductor device with stable electric characteristics can be manufactured. In particular, in a display device which is an embodiment of the semiconductor device, display unevenness due to variation in threshold voltage can be reduced.
    Type: Application
    Filed: October 5, 2023
    Publication date: February 1, 2024
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Hiromichi GODO
  • Patent number: 11849234
    Abstract: An imaging device with a novel structure is provided. The imaging device includes an imaging region provided with a plurality of pixels. The plurality of pixels included in the imaging region include a first pixel and a second pixel. The imaging device has a function of selecting a first region or a second region. The first region includes the same number of pixels as the second region. The first region includes at least the first and second pixels. The second region includes at least the second pixel. The pixels included in the first region or the second region have a function of outputting imaging signals obtained by the pixels. The imaging device generates first image data by concurrently reading the imaging signals output from the pixels included in the first region and performing arithmetic operation on the signals.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: December 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Hiromichi Godo, Yusuke Negoro, Hiroki Inoue, Takahiro Fukutome
  • Patent number: 11848429
    Abstract: A semiconductor device in which a circuit and a battery are efficiently stored is provided. In the semiconductor device, a first transistor, a second transistor, and a secondary battery are provided over one substrate. A channel region of the second transistor includes an oxide semiconductor. The secondary battery includes a solid electrolyte, and can be fabricated by a semiconductor manufacturing process. The substrate may be a semiconductor substrate or a flexible substrate. The secondary battery has a function of being wirelessly charged.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: December 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junpei Momo, Kazutaka Kuriki, Hiromichi Godo, Shunpei Yamazaki
  • Publication number: 20230386544
    Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first gate and a first back gate, and the second transistor includes a second gate and a second back gate. A gate insulating layer for the first back gate has ferroelectricity. The first transistor has a function of, when being in an off state, retaining a first potential corresponding to first data. The second transistor has a function of making an output current flow between a source and a drain of the second transistor.
    Type: Application
    Filed: September 7, 2021
    Publication date: November 30, 2023
    Inventors: Hiromichi GODO, Yoshiyuki KUROKAWA, Kazuki TSUDA, Satoru OHSHITA