Patents by Inventor Hiromichi Ohashi
Hiromichi Ohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7244974Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semi-conductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: GrantFiled: July 28, 2005Date of Patent: July 17, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Patent number: 7238576Abstract: A semiconductor device comprises a drain layer of first conductivity type, drift layers of first and second conductivity types on the drain layer, an insulating film between the drift layers and contacting the drift layers, a first base layer of second conductivity type on a surface of the drift layer of first conductivity type, a source layer of first conductivity type selectively provided on a surface of the first base layer of second conductivity type, a gate insulating film on the first base layer of second conductivity type between the source layer and the drift layer, a gate electrode on the gate insulating film, a second base layer of second conductivity type on a surface of the drift layer, a first main electrode on the drain layer, and a second main electrode on the source layer, the first base layer and the second base layer.Type: GrantFiled: April 1, 2003Date of Patent: July 3, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Masakazu Yamaguchi, Ichiro Omura, Wataru Saito, Takashi Shinohe, Hiromichi Ohashi
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Patent number: 7102179Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: GrantFiled: November 12, 2004Date of Patent: September 5, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Publication number: 20060145230Abstract: A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.Type: ApplicationFiled: December 5, 2005Publication date: July 6, 2006Inventors: Ichiro Omura, Wataru Saito, Tsuneo Ogura, Hiromichi Ohashi, Yoshihiko Saito, Kenichi Tokano
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Patent number: 7067870Abstract: A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.Type: GrantFiled: February 3, 2004Date of Patent: June 27, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Omura, Wataru Saito, Tsuneo Ogura, Hiromichi Ohashi, Yoshihiko Saito, Kenichi Tokano
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Publication number: 20050263844Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semi-conductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: ApplicationFiled: July 28, 2005Publication date: December 1, 2005Inventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Patent number: 6940090Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: GrantFiled: August 6, 2003Date of Patent: September 6, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Patent number: 6933544Abstract: A power semiconductor device including a non-doped GaN channel layer, an n-type Al0.2Ga0.8N barrier layer formed on the channel layer, a p-type Al0.1Ga0.9N semiconductor layer selectively formed on the barrier layer, a drain electrode positioned at one of both sides of the semiconductor layer and formed on the barrier layer, an insulating film formed on the barrier layer adjacent to the semiconductor layer between at least semiconductor layer and drain electrode, and a field plate electrode formed on the insulating film.Type: GrantFiled: October 19, 2004Date of Patent: August 23, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Publication number: 20050110042Abstract: A power semiconductor device including a non-doped GaN channel layer, an n-type Al0.2Ga0.8N barrier layer formed on the channel layer, a p-type Al0.1Ga0.9N semiconductor layer selectively formed on the barrier layer, a drain electrode positioned at one of both sides of the semiconductor layer and formed on the barrier layer, an insulating film formed on the barrier layer adjacent to the semiconductor layer between at least semiconductor layer and drain electrode, and a field plate electrode formed on the insulating film.Type: ApplicationFiled: October 19, 2004Publication date: May 26, 2005Inventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Publication number: 20050087765Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semi-conductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: ApplicationFiled: November 12, 2004Publication date: April 28, 2005Inventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Publication number: 20040227211Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: ApplicationFiled: August 6, 2003Publication date: November 18, 2004Inventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Publication number: 20040155287Abstract: A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.Type: ApplicationFiled: February 3, 2004Publication date: August 12, 2004Inventors: Ichiro Omura, Wataru Saito, Tsuneo Ogura, Hiromichi Ohashi, Yoshihiko Saito, Kenichi Tokano
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Patent number: 6750508Abstract: A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.Type: GrantFiled: June 28, 2001Date of Patent: June 15, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Omura, Wataru Saito, Tsuneo Ogura, Hiromichi Ohashi, Yoshihiko Saito, Kenichi Tokano
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Publication number: 20040043565Abstract: A semiconductor device comprises a drain layer of first conductivity type, drift layers of first and second conductivity types on the drain layer, an insulating film between the drift layers and contacting the drift layers, a first base layer of second conductivity type on a surface of the drift layer of first conductivity type, a source layer of first conductivity type selectively provided on a surface of the first base layer of second conductivity type, a gate insulating film on the first base layer of second conductivity type between the source layer and the drift layer, a gate electrode on the gate insulating film, a second base layer of second conductivity type on a surface of the drift layer, a first main electrode on the drain layer, and a second main electrode on the source layer, the first base layer and the second base layer.Type: ApplicationFiled: April 1, 2003Publication date: March 4, 2004Inventors: Masakazu Yamaguchi, Ichiro Omura, Wataru Saito, Takashi Shinohe, Hiromichi Ohashi
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Patent number: 6534998Abstract: Disclosed is a semiconductor device capable of stabilizing a gate voltage at high voltage and high current, protecting the device from breakdown by preventing current nonuniformity and oscillations and the like, thereby improving reliability, and a method for controlling the semiconductor device.Type: GrantFiled: November 21, 2000Date of Patent: March 18, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Omura, Wolfgang Fichtner, Hiromichi Ohashi, Tsuneo Ogura, Hideaki Ninomiya
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Publication number: 20020030237Abstract: A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.Type: ApplicationFiled: June 28, 2001Publication date: March 14, 2002Inventors: Ichiro Omura, Wataru Saito, Tsuneo Ogura, Hiromichi Ohashi, Yoshihiko Saito, Kenichi Tokano
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Patent number: 6323717Abstract: According to this invention, there is provided a drive apparatus for a power device having high- and low-voltage main electrodes and a control electrode, including a circuit for decreasing a voltage of the control electrode to a voltage of the control electrode which is not higher than a threshold voltage of the power device before a voltage between the high- and low-voltage main electrodes enters an overshoot region in a case where the power device is to be turned off. Therefore, electron injection can be stopped before the voltage between the main electrodes rises, the stability of the current density can be improved, and current concentration, oscillation, and the like can be prevented to improve reliability.Type: GrantFiled: May 17, 1999Date of Patent: November 27, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Omura, Suzuo Saito, Hiromichi Ohashi, Tomokazu Domon, Koichi Sugiyama, Simon Eicher, Tsuneo Ogura
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Patent number: 6153896Abstract: Disclosed is a semiconductor device capable of stabilizing a gate voltage at high voltage and high current, protecting the device from breakdown by preventing current nonuniformity and oscillations and the like, thereby improving reliability, and a method for controlling the semiconductor device.Type: GrantFiled: March 13, 1998Date of Patent: November 28, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Omura, Wolfgang Fichtner, Hiromichi Ohashi, Tsuneo Ogura, Hideaki Ninomiya
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Patent number: 6057636Abstract: The present invention provides a micro power switch comprising a cold cathode for emitting electrons, an anode for capturing the electrons emitted from the cold cathode, and a control electrode for controlling an amount of the electrons emitted from the cold cathode, wherein the cold cathode is made of material having a smaller electron emission barrier than the control electrode, the anode is applied with a positive potential in relation to the cold cathode, and the control electrode is applied with a potential equal to or lower than a potential of the cold cathode.Type: GrantFiled: September 16, 1997Date of Patent: May 2, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Tadashi Sakai, Tomio Ono, Naoshi Sakuma, Hiromichi Ohashi, Kazuya Nakayama
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Patent number: 6037632Abstract: A semiconductor device is disclosed, which comprises a first main electrode, a second main electrode, a high-resistance semiconductor layer of first conductivity type interposed between the first main electrode and the second main electrode, and at least a buried layer of second conductivity type selectively formed in the semiconductor layer, extending at substantially right angles to a line connecting the first and second main electrodes, comprising a plurality strips functioning as current paths and set at a potential different from a potential of any other electrode when a depletion layer extending from a region near the first main electrode reaches the buried layer.Type: GrantFiled: November 5, 1996Date of Patent: March 14, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Omura, Tomoki Inoue, Hiromichi Ohashi