Patents by Inventor Hiromitsu Hada

Hiromitsu Hada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240326670
    Abstract: Since each covering portion (each side frame) is interposed between a first leg portion and a second leg portion of a corresponding one of insert members, even if a relatively large load is applied to side portions of a cushion pad from an occupant, it is possible to restrict deformation of the side portions toward outer sides in left-right directions (rotation of the insert members) by engagement of each support frame with the first and second leg portions. Therefore, it is possible to improve the ability to support an occupant by the side portions.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 3, 2024
    Applicants: TACHI-S CO., LTD., Honda Motor Co., Ltd.
    Inventors: Yousuke Noguchi, Motoshi Minegishi, Tsutomu Hada, Hiromitsu Nagatomo, Taku Roppongi, Daisuke Takahashi
  • Patent number: 10256400
    Abstract: A semiconductor device comprises a semiconductor substrate; a multilevel wiring layer structure on the semiconductor substrate; and a variable resistance element in the multilevel wiring layer structure, wherein the variable resistance element comprises a variable resistance element film whose resistance changes between a top electrode and a bottom electrode, wherein the multilevel wiring layer structure comprises at least a wiring electrically connected to the bottom electrode and a plug electrically connected to the top electrode, and wherein the wiring also serves as the bottom electrode.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: April 9, 2019
    Assignee: NEC CORPORATION
    Inventors: Munehiro Tada, Toshitsugu Sakamoto, Hiromitsu Hada, Naoki Banno
  • Patent number: 9754998
    Abstract: A semiconductor device, includes first, second, and third switching elements. The third switching element comprises first and second terminals. Each of the first and second switching elements comprise a unified ion conductor, a first electrode disposed to contact the ion conductor and supply metal ions thereto, and a second electrode disposed to contact the ion conductor and is less susceptible to ionization than the first electrode. The first electrodes of the first switching element and the second switching element are electrically connected. The first terminal of the third switching element is electrically connected to only the first electrodes which are electrically connected, or the second electrode of the first switching element and the second electrode of the second switching element are electrically connected. The first terminal of the third switching element is electrically connected to only the second electrodes which are electrically connected.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: September 5, 2017
    Assignee: NEC CORPORATION
    Inventors: Munehiro Tada, Makoto Miyamura, Hiromitsu Hada
  • Publication number: 20160284993
    Abstract: A semiconductor device comprises a semiconductor substrate; a multilevel wiring layer structure on the semiconductor substrate; and a variable resistance element in the multilevel wiring layer structure, wherein the variable resistance element comprises a variable resistance element film whose resistance changes between a top electrode and a bottom electrode, wherein the multilevel wiring layer structure comprises at least a wiring electrically connected to the bottom electrode and a plug electrically connected to the top electrode, and wherein the wiring also serves as the bottom electrode
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Applicant: NEC Corporation
    Inventors: Munehiro TADA, Toshitsugu SAKAMOTO, Hiromitsu HADA, Naoki BANNO
  • Patent number: 9406877
    Abstract: A semiconductor device comprises a semiconductor substrate; a multilevel wiring layer structure on the semiconductor substrate; and a variable resistance element in the multilevel wiring layer structure, wherein the variable resistance element comprises a variable resistance element film whose resistance changes between a top electrode and a bottom electrode, wherein the multilevel wiring layer structure comprises at least a wiring electrically connected to the bottom electrode and a plug electrically connected to the top electrode, and wherein the wiring also serves as the bottom electrode.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: August 2, 2016
    Assignee: NEC CORPORATION
    Inventors: Munehiro Tada, Toshitsugu Sakamoto, Hiromitsu Hada, Naoki Banno
  • Patent number: 9245789
    Abstract: The present invention addresses the problem of inhibiting the evolution of a poisoning gas to eliminate wiring-pattern resolution failures and thereby forming a desired wiring layer structure to provide functional elements having an improved property yield. This method for forming multi-layered copper interconnect on a semiconductor substrate comprises: forming a multilayer resist structure to form a given resist pattern on a substrate including an interlayer dielectric film that has via holes which have been formed in part thereof and filled with an SOC layer, the multilayer resist structure comprising an SOC layer, an SOG layer, an SiO2 layer, and a chemical amplification type resist superposed in this order from the substrate side; conducting etching using the resist pattern as a mask to form a pattern for a wiring layer and via plugs; and forming the wiring layer and the via plugs in the pattern.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: January 26, 2016
    Assignee: NEC CORPORATION
    Inventors: Koichiro Okamoto, Munehiro Tada, Hiromitsu Hada, Toshitsugu Sakamoto
  • Patent number: 9231207
    Abstract: A resistance changing element according to the present invention comprises a first electrode (101) and a second electrode (103); and an ion conducting layer (102) that is formed between the first electrode (101) and the second electrode (103) and that contains at least oxygen and carbon.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: January 5, 2016
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Koichiro Okamoto, Toshitsugu Sakamoto, Hiromitsu Hada
  • Publication number: 20150318473
    Abstract: A semiconductor device, includes first, second, and third switching elements. The third switching element comprises first and second terminals. Each of the first and second switching elements comprise a unified ion conductor, a first electrode disposed to contact the ion conductor and supply metal ions thereto, and a second electrode disposed to contact the ion conductor and is less susceptible to ionization than the first electrode. The first electrodes of the first switching element and the second switching element are electrically connected. The first terminal of the third switching element is electrically connected to only the first electrodes which are electrically connected, or the second electrode of the first switching element and the second electrode of the second switching element are electrically connected. The first terminal of the third switching element is electrically connected to only the second electrodes which are electrically connected.
    Type: Application
    Filed: May 12, 2015
    Publication date: November 5, 2015
    Inventors: Munehiro TADA, Makoto Miyamura, Hiromitsu Hada
  • Publication number: 20150262864
    Abstract: The present invention addresses the problem of inhibiting the evolution of a poisoning gas to eliminate wiring-pattern resolution failures and thereby forming a desired wiring layer structure to provide functional elements having an improved property yield. This method for forming multi-layered copper interconnect on a semiconductor substrate comprises: forming a multilayer resist structure to form a given resist pattern on a substrate including an interlayer dielectric film that has via holes which have been formed in part thereof and filled with an SOC layer, the multilayer resist structure comprising an SOC layer, an SOG layer, an SiO2 layer, and a chemical amplification type resist superposed in this order from the substrate side; conducting etching using the resist pattern as a mask to form a pattern for a wiring layer and via plugs; and forming the wiring layer and the via plugs in the pattern.
    Type: Application
    Filed: August 20, 2013
    Publication date: September 17, 2015
    Applicant: NEC CORPORATION
    Inventors: Koichiro Okamoto, Munehiro Tada, Hiromitsu Hada, Toshitsugu Sakamoto
  • Patent number: 9059028
    Abstract: The objective of the present invention is to provide a semiconductor device provided with a resistance-variable element having sufficient switching property and exhibiting high reliability and high densification as well as good insulating property. The present invention provides a semiconductor device comprising a resistance-variable element provided within multiple wiring layers on a semiconductor substrate, wherein the resistance-variable element comprises a laminated structure in which a first electrode, a first ion-conductive layer of valve-metal oxide film, a second ion-conductive layer containing oxygen and a second electrode are laminated in this order, and the wiring of the multiple wiring layers also serves as the first electrode.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 16, 2015
    Assignee: NEC CORPORATION
    Inventors: Munehiro Tada, Toshitsugu Sakamoto, Hiromitsu Hada
  • Patent number: 9059082
    Abstract: A semiconductor device includes a first switching element, a second switching element, and at least one third switching element; wherein the third switching element includes a first terminal and a second terminal, wherein each of the first switching element and the second switching element includes an ion conductor, a first electrode which is disposed so as to have contact with the ion conductor and supplies metal ions to the ion conductor, and a second electrode which is disposed so as to have contact with the ion conductor and is less susceptible to ionization than the first electrode; and wherein (a) the first electrode of the first switching element and the first electrode of the second switching element are electrically connected each other, and the first terminal of the third switching element is electrically connected to only the first electrodes which are electrically connected each other or (b) the second electrode of the first switching element and the second electrode of the second switching ele
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: June 16, 2015
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Makoto Miyamura, Hiromitsu Hada
  • Patent number: 9059402
    Abstract: A resistance-variable element as disclosed has high reliability, high densification, and good insulating properties. The device provides a resistance-variable element in which a first electrode including a metal primarily containing copper, an oxide film of valve-metal, an ion-conductive layer containing oxygen and a second electrode are laminated in this order.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 16, 2015
    Assignee: NEC CORPORATION
    Inventors: Munehiro Tada, Toshitsugu Sakamoto, Yuko Yabe, Yukishige Saito, Hiromitsu Hada
  • Publication number: 20150155487
    Abstract: A resistance changing element according to the present invention comprises a first electrode (101) and a second electrode (103); and an ion conducting layer (102) that is formed between the first electrode (101) and the second electrode (103) and that contains at least oxygen and carbon.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 4, 2015
    Applicant: NEC Corporation
    Inventors: Munehiro TADA, Koichiro OKAMOTO, Toshitsugu SAKAMOTO, Hiromitsu HADA
  • Patent number: 9029825
    Abstract: A semiconductor device includes multilayer interconnects and two variable resistance elements (22a, 22b) that are provided among the multilayer interconnects and that include first electrodes (5), second electrodes (10a, 10b), and variable resistance element films (9a, 9b) that are each interposed between first electrodes (5) and respective second electrodes (10a, 10b). Either the first electrodes (5) or the second electrodes (10a, 10b) of the two variable resistance elements (22a, 22b) are unified.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: May 12, 2015
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Makoto Miyamura, Hiromitsu Hada
  • Patent number: 8946668
    Abstract: Disclosed is a semiconductor device including a resistive change element between a first wiring and a second wiring, which are arranged in a vertical direction so as to be adjacent to each other, with an interlayer insulation film being interposed on a semiconductor substrate. The resistive change element includes a lower electrode, a resistive change element film made of a metal oxide and an upper electrode. Since the upper electrode on the resistive change element film is formed as part of a plug for the second wiring, a structure in which a side surface of the upper electrode is not in direct contact with the side surface of the metal oxide or the lower electrode is provided so that it is possible to realize excellent device characteristics, even when a byproduct is adhered to the side wall of the metal oxide or the lower electrode in the etching thereof.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: February 3, 2015
    Assignee: NEC Corporation
    Inventors: Yukishige Saito, Kimihiko Ito, Hiromitsu Hada
  • Patent number: 8946672
    Abstract: A resistance changing element according to the present invention comprises a first electrode (101) and a second electrode (103); and an ion conducting layer (102) that is formed between the first electrode (101) and the second electrode (103) and that contains at least oxygen and carbon.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: February 3, 2015
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Koichiro Okamoto, Toshitsugu Sakamoto, Hiromitsu Hada
  • Patent number: 8816312
    Abstract: A semiconductor device according to the present invention includes: an unit element which includes a first switch and a second switch, wherein each of the first switch and the second switch includes an electrical resistance changing layer whose state of electrical resistance is changed according to a polarity of an applied voltage, and each of the first switch and the second switch has two electrodes, and wherein one electrode of the first switch and one electrode of the second switch are connected each other to form a common node, and the other electrode of the first switch forms a first node, and the other electrode of the second switch forms a second node; a first wiring which is connected with the first node and forms a signal transmission line; and a second wiring which is connected with the second node and is connected with the first wiring through the unit element.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: August 26, 2014
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Makoto Miyamura, Hiromitsu Hada
  • Patent number: 8796659
    Abstract: A variable resistance element includes a first electrode, a second electrode and an ion conduction layer interposed between the first and second electrodes. The ion conduction layer contains an organic oxide containing at least oxygen and carbon. The carbon concentration distribution in the ion conduction layer is such that the carbon concentration in an area closer to the first electrode is greater than that in an area closer to the second electrode.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: August 5, 2014
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Koichiro Okamoto, Toshitsugu Sakamoto, Hiromitsu Hada
  • Patent number: 8536629
    Abstract: A method for manufacturing a semiconductor device, includes: forming an insulating film containing silicon, oxygen and carbon on at least one of a first substrate and a second substrate; and bonding the first substrate and the second substrate together, with the insulating film interposed therebetween. There can be provided a method capable of manufacturing a semiconductor device having high element density, high performance and high reliability, with high yield.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: September 17, 2013
    Assignee: NEC Corporation
    Inventors: Munehiro Tada, Hiromitsu Hada
  • Publication number: 20130181180
    Abstract: A semiconductor device according to the present invention includes: an unit element which includes a first switch and a second switch, wherein each of the first switch and the second switch includes an electrical resistance changing layer whose state of electrical resistance is changed according to a polarity of an applied voltage, and each of the first switch and the second switch has two electrodes, and wherein one electrode of the first switch and one electrode of the second switch are connected each other to form a common node, and the other electrode of the first switch forms a first node, and the other electrode of the second switch forms a second node; a first wiring which is connected with the first node and forms a signal transmission line; and a second wiring which is connected with the second node and is connected with the first wiring through the unit element.
    Type: Application
    Filed: September 20, 2011
    Publication date: July 18, 2013
    Inventors: Munehiro Tada, Makoto Miyamura, Hiromitsu Hada