Abstract: A liquid crystal display device includes: a substrate; a plurality of vertical organic light-emitting transistors; a data line that supplies a voltage to a gate electrode of the vertical organic light-emitting transistor; a thin-film transistor that is connected between the gate electrode of each of the vertical organic light-emitting transistors and the data line and controls supply of the voltage to the gate electrode of the vertical organic light-emitting transistor; a gate line that is connected to the gate electrode of the thin-film transistor and transmits a signal for switching the thin-film transistor; and a plurality of current supply lines that are wired in a first direction outside a formation region of the vertical organic light-emitting transistor, the current supply lines being in contact with a source electrode of the vertical organic light-emitting transistor to supply a current to the vertical organic light-emitting transistor.

Abstract: Provided is a manufacturing method of a display including a vertical organic light-emitting transistor in which a wider light-emitting area is secured while manufacturing time and manufacturing cost are suppressed. In the manufacturing method of the display including the vertical organic light-emitting transistor, a gate electrode layer of the vertical organic light-emitting transistor and one of current-carrying electrode layers of a thin-film transistor connected to the gate electrode layer of the vertical organic light-emitting transistor are formed integrally in the same layer.

Abstract: Various examples are provided related to compensating brightness of a display using a vertical organic light emitting transistor that suppresses variations in brightness over a long period of time and a display. In one example, a method includes applying a voltage for brightness inspection to a gate electrode of the vertical organic light emitting transistor to be corrected, measuring a current flowing through a current supply line through which the current is supplied to a source electrode of the vertical organic light emitting transistor by the application of the voltage for brightness inspection to the gate electrode of the vertical organic light emitting transistor to be corrected, and determining a corrected value of the voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on a value of the current and characteristic information of the vertical organic light emitting transistor stored in the memory.

Abstract: The method for producing a vertical organic light-emitting transistor device includes: a step (A) in which a substrate having a main surface, on which the vertical organic light-emitting transistor device is to be formed, is prepared; a step (B) in which an organic material containing a polymer having a hydrocarbon group is applied onto the main surface of the substrate; a step (C) in which a dispersion liquid containing a dispersant and a carbon material is applied onto an organic material layer formed in the step (B); a step (D) in which a coating film formed in the step (C) is dried; and a step (E) in which after the step (D) is performed, a cleaning fluid is applied to remove the dispersant.

Abstract: Various examples are provided related to compensating brightness of a display using a vertical organic light emitting transistor that suppresses variations in brightness over a long period of time and a display. In one example, a method includes applying a voltage for brightness inspection to a gate electrode of the vertical organic light emitting transistor to be corrected, measuring a current flowing through a current supply line through which the current is supplied to a source electrode of the vertical organic light emitting transistor by the application of the voltage for brightness inspection to the gate electrode of the vertical organic light emitting transistor to be corrected, and determining a corrected value of the voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on a value of the current and characteristic information of the vertical organic light emitting transistor stored in the memory.

Abstract: A liquid crystal display device includes: a substrate; a plurality of vertical organic light-emitting transistors; a data line that supplies a voltage to a gate electrode of the vertical organic light-emitting transistor; a thin-film transistor that is connected between the gate electrode of each of the vertical organic light-emitting transistors and the data line and controls supply of the voltage to the gate electrode of the vertical organic light-emitting transistor; a gate line that is connected to the gate electrode of the thin-film transistor and transmits a signal for switching the thin-film transistor; and a plurality of current supply lines that are wired in a first direction outside a formation region of the vertical organic light-emitting transistor, the current supply lines being in contact with a source electrode of the vertical organic light-emitting transistor to supply a current to the vertical organic light-emitting transistor.

Abstract: A device configuration designed to mitigate display defects resulting from voltage drops in current supply lines offers a display with better display quality. The display includes: a plurality of VOLETs arranged in arrays along a first direction and a second direction; a data line supplying a voltage for controlling gate electrodes of the plurality of VOLETs; TFTs each connected between a gate electrode of each of the VOLET and the data line and controlling voltage supply to the gate electrodes of the VOLETs; a gate line connected to gate electrodes of the TFTs and transmitting a signal that controls the TFTs; a plurality of current supply lines extending along the first direction and supplying a current to each of a group of VOLETs aligned along the first direction; and an auxiliary line extending along the second direction and connecting at least two of the plurality of current supply lines.

Abstract: Provided is a method of driving a light emitting a display in which variations in image quality and brightness are suppressed despite long-term use, without adding a complicated circuit configuration. The driving a light emitting method includes a step (A) of applying a voltage based on image data to be displayed to a gate electrode of a vertical organic light emitting transistor and a step (B) of, after the step (A), applying a voltage, having a polarity opposite to that of the voltage applied to the gate electrode of the vertical organic light emitting transistor in the step (A), to the gate electrode of the vertical organic light emitting transistor based on a value of a voltage being applied to a source electrode of the vertical organic light emitting transistor.

Abstract: Provided is a method of compensating brightness of a display using a vertical organic light emitting transistor that suppresses variations in brightness over a long period of time and a display. This method is a method of compensating brightness of a display including a plurality of vertical organic light emitting transistors and a memory that stores characteristic information of the vertical organic light emitting transistor.

Abstract: A data line drive circuit provides a voltage according to a detection voltage and to a reference voltage, between the gate and source of a drive transistor in a pixel circuit, and detects a drive current having passed through the drive transistor and outputted external to the pixel circuit. A threshold voltage correction memory stores, for each pixel circuit, data representing a threshold voltage of the drive transistor. A display control circuit controls the reference voltage based on the data stored in the threshold voltage correction memory. By this, even if the threshold voltage of the drive transistor is changed, the drive current can be detected with a high accuracy. The threshold voltage correction memory may store, for each pixel circuit, data representing a difference between the threshold voltage of the drive transistor and the reference voltage.

Abstract: Occurrence of a crosstalk phenomenon in a light-emitting device including a tandem element is suppressed. A light-emitting device includes: lower electrodes over an insulating layer; a partition over a portion between the lower electrodes, which includes an overhang portion over an end portion of each of the lower electrodes; a first light-emitting unit over each of the lower electrodes and the partition; an intermediate layer over the first light-emitting unit; a second light-emitting unit over the intermediate layer; and an upper electrode over the second light-emitting unit. The distance between the overhang portion and each of the lower electrodes is larger than the total thickness of the first light-emitting unit and the intermediate layer over the lower electrode.

Abstract: A data line drive circuit provides a voltage according to a detection voltage and to a reference voltage, between the gate and source of a drive transistor in a pixel circuit, and detects a drive current having passed through the drive transistor and outputted external to the pixel circuit. A threshold voltage correction memory stores, for each pixel circuit, data representing a threshold voltage of the drive transistor. A display control circuit controls the reference voltage based on the data stored in the threshold voltage correction memory. By this, even if the threshold voltage of the drive transistor is changed, the drive current can be detected with a high accuracy. The threshold voltage correction memory may store, for each pixel circuit, data representing a difference between the threshold voltage of the drive transistor and the reference voltage.

Abstract: A drain electrode (17) includes (i) a lower drain electrode (17a) stacked on a semiconductor layer (14) so as to partially cover an upper surface of the semiconductor layer (14) and (ii) an upper drain electrode (17b). The semiconductor layer (14), the lower drain electrode (17a), and the upper drain electrode (17b) form steps. In a step part where the steps are formed, a distance between a periphery of the lower drain electrode (17a) and a periphery of the upper drain electrode (17b) is more than 0.4 ?m but less than 1.5 ?m.

Abstract: An IZO layer (113) is formed on an a-ITO layer (112), and resist patterns (202R, 202G) having different film thicknesses are formed in at least sub-pixels (71R, 71G). The a-ITO layer (112) and the IZO layer (113) are etched by utilizing (i) a reduction in thickness of the resist patterns (202R, 202G) by ashing and (ii) a change in etching tolerance due to transformation from the a-ITO layer (112) into a p-ITO layer (114).

Abstract: The semiconductor device (100) according to the present invention includes a gate electrode (102) of a TFT, a gate insulating layer (103) formed on the gate electrode (102), an oxide semiconductor layer (107) disposed on the gate insulating layer (103), a protecting layer (108) formed on the oxide semiconductor layer (107) by a spin-on-glass technique, and a source electrode (105) and a drain electrode (106) disposed on the protecting layer (108). Via a first contact hole (131) formed in the protecting layer (108), the source electrode (105) is electrically connected to the oxide semiconductor layer (104), and via a second contact hole (132), the drain electrode (106) is electrically connected to the oxide semiconductor layer (104).

Abstract: A semiconductor device (100) according to the present invention includes a plurality of source lines (16), a thin film transistor (50A), and a diode element (10A) that electrically connects two source lines (16) among the plurality of source lines (16). A connection region (26) in which the source lines (16) and the diode element (10A) are connected to each other includes a first electrode (3), a second electrode (6a), a third electrode (9a), and a fourth electrode (9b). A part of each source line (16) is a source electrode of the thin film transistor (50A), and the second electrode (6a) and the source lines (16) are formed separately from each other.

Abstract: An IZO layer (113) is formed on an a-ITO layer (112), and resist patterns (202R, 202G) having different film thicknesses are formed in at least sub-pixels (71R, 71G). The a-ITO layer (112) and the IZO layer (113) are etched by utilizing (i) a reduction in thickness of the resist patterns (202R, 202G) by ashing and (ii) a change in etching tolerance due to transformation from the a-ITO layer (112) into a p-ITO layer (114).

Abstract: A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).

Abstract: A wiring board is provided which can prevent a metal electrode from corroding due to a defect in a transparent conductive electrode covering an end face of an organic insulating film. An active-matrix substrate includes: a glass substrate; a metal wire provided on the glass substrate; a gate insulating film covering the metal wire; an interlayer insulating film covering the gate insulating film; and a transparent electrode formed on the interlayer insulating film. The scanning wire provided with a terminal area where the transparent electrode is laminated directly on the scanning wire. The transparent electrode extends over the terminal area in such a way as to cover an end face of the interlayer insulating film that faces the terminal area and an end face of the gate insulating film that faces the terminal area.

Abstract: The semiconductor device (100) according to the present invention includes a gate electrode (102) of a TFT, a gate insulating layer (103) formed on the gate electrode (102), an oxide semiconductor layer (107) disposed on the gate insulating layer (103), a protecting layer (108) formed on the oxide semiconductor layer (107) by a spin-on-glass technique, and a source electrode (105) and a drain electrode (106) disposed on the protecting layer (108). Via a first contact hole (131) formed in the protecting layer (108), the source electrode (105) is electrically connected to the oxide semiconductor layer (104), and via a second contact hole (132), the drain electrode (106) is electrically connected to the oxide semiconductor layer (104).