Patents by Inventor Hiromitsu Katsui

Hiromitsu Katsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8729612
    Abstract: An active matrix substrate includes a plurality of scanning lines (11a) extending parallel to each other; a plurality of signal lines (16a) extending parallel to each other in a direction crossing the scanning lines (11a); a plurality of TFTs (5) each provided at each of intersections of the scanning lines (11a) and the signal lines (16a), and each including a semiconductor layer (4a); and a coating type insulating layer formed between each of the scanning lines (11a) and each of the signal lines (16a). A plurality of openings (15a) are formed in the insulating layer such that each of the semiconductor layers (4a) is exposed, and at least part of a peripheral end of the opening (15a) of the insulating layer is positioned on an inner side relative to each of peripheral ends of the semiconductor layers (4a).
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: May 20, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiromitsu Katsui, Wataru Nakamura
  • Publication number: 20140103385
    Abstract: Occurrence of a crosstalk phenomenon in a light-emitting device including a tandem element is suppressed. A light-emitting device includes: lower electrodes over an insulating layer; a partition over a portion between the lower electrodes, which includes an overhang portion over an end portion of each of the lower electrodes; a first light-emitting unit over each of the lower electrodes and the partition; an intermediate layer over the first light-emitting unit; a second light-emitting unit over the intermediate layer; and an upper electrode over the second light-emitting unit. The distance between the overhang portion and each of the lower electrodes is larger than the total thickness of the first light-emitting unit and the intermediate layer over the lower electrode.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 17, 2014
    Inventors: Kaoru HATANO, Takashi HAMADA, Kikuo MIYATA, Hiromitsu KATSUI, Shoji OKAZAKI
  • Publication number: 20140014952
    Abstract: A drain electrode (17) includes (i) a lower drain electrode (17a) stacked on a semiconductor layer (14) so as to partially cover an upper surface of the semiconductor layer (14) and (ii) an upper drain electrode (17b). The semiconductor layer (14), the lower drain electrode (17a), and the upper drain electrode (17b) form steps. In a step part where the steps are formed, a distance between a periphery of the lower drain electrode (17a) and a periphery of the upper drain electrode (17b) is more than 0.4 ?m but less than 1.5 ?m.
    Type: Application
    Filed: January 31, 2012
    Publication date: January 16, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiromitsu Katsui, Yoshimasa Chikama, Wataru Nakamura, Tetsunori Tanaka, Kenichi Kitoh
  • Publication number: 20130207115
    Abstract: A semiconductor device (100) according to the present invention includes a plurality of source lines (16), a thin film transistor (50A), and a diode element (10A) that electrically connects two source lines (16) among the plurality of source lines (16). A connection region (26) in which the source lines (16) and the diode element (10A) are connected to each other includes a first electrode (3), a second electrode (6a), a third electrode (9a), and a fourth electrode (9b). A part of each source line (16) is a source electrode of the thin film transistor (50A), and the second electrode (6a) and the source lines (16) are formed separately from each other.
    Type: Application
    Filed: September 13, 2011
    Publication date: August 15, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Hiromitsu Katsui, Takeshi Yaneda, Yoshiyuki Isomura
  • Publication number: 20130102115
    Abstract: The disclosed method for manufacturing an active matrix substrate includes a step in which a first mask is used to pattern a first conductive layer G, CS, and S, a step in which a second mask is used to pattern a first insulating layer, a step in which a third mask is used to pattern a semiconductor layer, a step in which a fourth mask is used to pattern a second conductive later, a step in which a fifth mask is used to pattern a second insulating layer, and a step in which a sixth mask is used to pattern a third conductive layer.
    Type: Application
    Filed: July 1, 2011
    Publication date: April 25, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi Yaneda, Hiromitsu Katsui, Wataru Nakamura
  • Patent number: 8405808
    Abstract: An active matrix substrate includes a substrate; scanning lines formed on the substrate; an insulating film covering the scanning lines; signal lines intersecting the scanning lines via the insulating film; switching elements formed on the substrate, each operating in response to a signal which is applied to the corresponding scanning line; and pixel electrodes each capable of being electrically connected to the corresponding signal line via the switching elements. The insulating film is a multilayer insulating film including a first insulating layer and a second insulating layer. The first insulating layer is formed of an insulating material containing an organic component, and the multilayer insulating film has a low-stack region in at least a portion of a region overlapping each switching element, the first insulating layer not being formed in the low-stack region.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: March 26, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Wataru Nakamura, Atsushi Ban, Shoji Okazaki, Hiromitsu Katsui, Yoshihiro Okada
  • Publication number: 20130048999
    Abstract: A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).
    Type: Application
    Filed: April 27, 2011
    Publication date: February 28, 2013
    Inventors: Shoji Okazaki, Takeshi Yaneda, Wataru Nakamura, Hiromitsu Katsui
  • Publication number: 20130023086
    Abstract: An active matrix substrate includes a plurality of pixel electrodes (P) provided in a matrix, and a plurality of TFTs (5) connected to the pixel electrodes (P). Each of the TFTs (5) includes a gate electrode (11a) provided on an insulating substrate, a gate insulating film (12a) provided to cover the gate electrode (11a), an oxide semiconductor layer (13a) provided on the gate insulating film (12a) to overlap the gate electrode (11a), and a source electrode (17a) and a drain electrode (17b) facing each other and being connected to the oxide semiconductor layer (13a). A protective insulating film (14a) is provided between the oxide semiconductor layer (13a) and the source and drain electrodes (17a) and (17b) to cover the oxide semiconductor layer (13a).
    Type: Application
    Filed: August 23, 2010
    Publication date: January 24, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yoshimasa Chikama, Hiromitsu Katsui, Hirohiko Nishiki, Yoshifumi Ohta, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto, Hinae Mizuno
  • Publication number: 20130009160
    Abstract: Disposed on an insulating substrate (10a) are a plurality of TFTs arranged in a matrix, each including a drain electrode (18b) in which a first conductive layer (16b) and a second conductive layer (17bb) are laminated in this order; an interlayer insulating film (21) deposited on each of the TFTs, in which a plurality of contact holes (21a) reaching to the respective drain electrodes (18b) are formed; and a plurality of pixel electrodes (22a) disposed on the interlayer insulating film (21) in a matrix, each connected to a corresponding drain electrode (18b) via a corresponding contact hole (21a), being susceptible to an electric corrosion reaction with the second conductive layer (17bb). At a side of the drain electrode, which is connected to the pixel electrode (22a), a top surface of the first conductive layer (16b) is exposed from the second conductive layer (17bb). The interlayer insulating film (21) is disposed to cover the second conductive layer (17bb).
    Type: Application
    Filed: December 7, 2010
    Publication date: January 10, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiromitsu Katsui, Wataru Nakamura, Kenichi Kitoh
  • Publication number: 20120248450
    Abstract: The present invention provides an active matrix substrate that is capable of reliably connecting a plurality of conductive layers that are arranged with an insulating layer therebetween. The active matrix substrate of the present invention has a first conductive layer (CS) and a second conductive layer (30), and an insulating layer (22) formed to cover the first conductive layer (CS) is provided. The first conductive layer (CS) has an end portion (CS1) formed to protrude within an opening portion (H1) formed in the insulating layer (22), and the second conductive layer (30) is provided to cover at least a part of the edge of the opening portion (H1) and to be connected directly to the end portion (CS1) of the first conductive layer (CS) within the opening portion (H1).
    Type: Application
    Filed: November 2, 2010
    Publication date: October 4, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi Yaneda, Hiromitsu Katsui, Wataru Nakamura
  • Publication number: 20120248443
    Abstract: An active matrix substrate includes a plurality of scanning lines (11a) extending parallel to each other; a plurality of signal lines (16a) extending parallel to each other in a direction crossing the scanning lines (11a); a plurality of TFTs (5) each provided at each of intersections of the scanning lines (11a) and the signal lines (16a), and each including a semiconductor layer (4a); and a coating type insulating layer formed between each of the scanning lines (11a) and each of the signal lines (16a). A plurality of openings (15a) are formed in the insulating layer such that each of the semiconductor layers (4a) is exposed, and at least part of a peripheral end of the opening (15a) of the insulating layer is positioned on an inner side relative to each of peripheral ends of the semiconductor layers (4a).
    Type: Application
    Filed: December 7, 2010
    Publication date: October 4, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Hiromitsu Katsui, Wataru Nakamura
  • Publication number: 20120120616
    Abstract: A wiring board is provided which can prevent a metal electrode from corroding due to a defect in a transparent conductive electrode covering an end face of an organic insulating film. An active-matrix substrate includes: a glass substrate; a metal wire provided on the glass substrate; a gate insulating film covering the metal wire; an interlayer insulating film covering the gate insulating film; and a transparent electrode formed on the interlayer insulating film. The scanning wire provided with a terminal area where the transparent electrode is laminated directly on the scanning wire. The transparent electrode extends over the terminal area in such a way as to cover an end face of the interlayer insulating film that faces the terminal area and an end face of the gate insulating film that faces the terminal area.
    Type: Application
    Filed: May 18, 2010
    Publication date: May 17, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiromitsu Katsui, Kenichi Kitoh, Wataru Nakamura
  • Publication number: 20110057192
    Abstract: An active matrix substrate includes a substrate; scanning lines formed on the substrate; an insulating film covering the scanning lines; signal lines intersecting the scanning lines via the insulating film; switching elements formed on the substrate, each operating in response to a signal which is applied to the corresponding scanning line; and pixel electrodes each capable of being electrically connected to the corresponding signal line via the switching elements. The insulating film is a multilayer insulating film including a first insulating layer and a second insulating layer. The first insulating layer is formed of an insulating material containing an organic component, and the multilayer insulating film has a low-stack region in at least a portion of a region overlapping each switching element, the first insulating layer not being formed in the low-stack region.
    Type: Application
    Filed: November 15, 2010
    Publication date: March 10, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Wataru NAKAMURA, Atsushi BAN, Shoji OKAZAKI, Hiromitsu KATSUI, Yoshihiro OKADA
  • Patent number: 7864281
    Abstract: An active matrix substrate includes a substrate; scanning lines formed on the substrate; an insulating film covering the scanning lines; signal lines intersecting the scanning lines via the insulating film; switching elements formed on the substrate, each operating in response to a signal which is applied to the corresponding scanning line; and pixel electrodes each capable of being electrically connected to the corresponding signal line via the switching elements. The insulating film is a multilayer insulating film including a first insulating layer and a second insulating layer. The first insulating layer is formed of an insulating material containing an organic component, and the multilayer insulating film has a low-stack region in at least a portion of a region overlapping each switching element, the first insulating layer not being formed in the low-stack region.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: January 4, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Wataru Nakamura, Atsushi Ban, Shoji Okazaki, Hiromitsu Katsui, Yoshihiro Okada
  • Publication number: 20070268438
    Abstract: An active matrix substrate includes a substrate; scanning lines formed on the substrate; an insulating film covering the scanning lines; signal lines intersecting the scanning lines via the insulating film; switching elements formed on the substrate, each operating in response to a signal which is applied to the corresponding scanning line; and pixel electrodes each capable of being electrically connected to the corresponding signal line via the switching elements. The insulating film is a multilayer insulating film including a first insulating layer and a second insulating layer. The first insulating layer is formed of an insulating material containing an organic component, and the multilayer insulating film has a low-stack region in at least a portion of a region overlapping each switching element, the first insulating layer not being formed in the low-stack region.
    Type: Application
    Filed: August 23, 2005
    Publication date: November 22, 2007
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Wataru Nakamura, Atsushi Ban, Shoji Okazaki, Hiromitsu Katsui, Yoshihiro Okada