Patents by Inventor Hiromitsu Takashita

Hiromitsu Takashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130265729
    Abstract: The present invention relates to electronic components assembly for electrically connecting electronic components to each other, wherein a wiring formed on a surface of a first electronic component and a wiring formed on a surface of a second electronic component face each other, and are bonded to each other with an electric conductor interposed therebetween, so as to electrically connect the first electronic component and the second electronic component. The electric conductor is a resin composition containing solder or conductive filler.
    Type: Application
    Filed: April 24, 2013
    Publication date: October 10, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Hiromitsu TAKASHITA, Tsuyoshi TAKEDA, Yuko KONNO, Hiroaki FUJIWARA, Shingo YOSHIOKA
  • Publication number: 20130056247
    Abstract: A wiring method is provided in which an insulating layer is formed on a surface of a semiconductor device 1 of which a plurality of connecting terminals are exposed, a resin film is formed on a surface of the insulating layer, a groove of a depth equal to or exceeding a thickness of the resin film is formed from a surface side of the resin film so that the groove passes in a vicinity of connecting terminals that are to be connected, and furthermore communicating holes which reach the connecting terminals to be connected from this portion that groove passes in the vicinity thereof are formed.
    Type: Application
    Filed: May 11, 2011
    Publication date: March 7, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara, Hiromitsu Takashita, Tsuyoshi Takeda, Yuko Konno
  • Publication number: 20120206891
    Abstract: A circuit board H10 according to the present invention is a circuit board H10 in which an electric circuit H6 including a wiring section H6a and a pad section H6b is provided in the surface of an insulating base substrate H1. The electric circuit H6 is configured such that a conductor H5 is embedded in a circuit recess H3 formed in the surface of the insulating base substrate H1, and the surface roughness of the conductor H5 is different in the wiring section H6a and the pad section H6b of the electric circuit H6. In this case, it is preferable that the surface roughness of the conductor H5 in the pad section H6b is greater than the surface roughness of the conductor H5 in the wiring section H6a.
    Type: Application
    Filed: October 28, 2010
    Publication date: August 16, 2012
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara, Hiromitsu Takashita, Tsuyoshi Takeda