Patents by Inventor Hiromitu OSHIMA

Hiromitu OSHIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8710565
    Abstract: The method of the present invention comprises forming a word line crossing with an active region on a semiconductor substrate; forming a diffusion layer region; forming a first insulating film as high as a bit line to be formed; etching the first insulating film, while using, as a mask, a pattern having a linear aperture extending to the active region on the first insulating film so as to form a groove pattern for exposing the surface of the semiconductor substrate; embedding a conductive film in the groove pattern; forming a mask pattern passing over a portion, in which a bit contact is formed, on the first insulating film; and removing the first insulating film and the conductive layer until the upper layer insulating film of the word line is exposed, while using the mask pattern as a mask so as to isolate a bit contact from another contact.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: April 29, 2014
    Inventor: Hiromitu Oshima
  • Publication number: 20130119546
    Abstract: The method of the present invention comprises forming a word line crossing with an active region on a semiconductor substrate; forming a diffusion layer region; forming a first insulating film as high as a bit line to be formed; etching the first insulating film, while using, as a mask, a pattern having a linear aperture extending to the active region on the first insulating film so as to form a groove pattern for exposing the surface of the semiconductor substrate; embedding a conductive film in the groove pattern; forming a mask pattern passing over a portion, in which a bit contact is formed, on the first insulating film; and removing the first insulating film and the conductive layer until the upper layer insulating film of the word line is exposed, while using the mask pattern as a mask so as to isolate a bit contact from another contact.
    Type: Application
    Filed: May 3, 2012
    Publication date: May 16, 2013
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Hiromitu OSHIMA
  • Publication number: 20100330802
    Abstract: A semiconductor manufacturing method includes forming a word line crossing with an active region on a semiconductor substrate; forming a diffusion layer region; forming a first insulating film as high as a bit line to be formed; etching the first insulating film, while using, as a mask, a pattern having a linear aperture extending to the active region on the first insulating film so as to form a groove pattern for exposing the surface of the semiconductor substrate; embedding a conductive film in the groove pattern; forming a mask pattern passing over a portion, in which a bit contact is formed, on the first insulating film; and removing the first insulating film and the conductive layer until the upper layer insulating film of the word line is exposed, while using the mask pattern as a mask so as to isolate a bit contact from another contact.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 30, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Hiromitu OSHIMA