Patents by Inventor Hironobu Abe

Hironobu Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160321998
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: July 14, 2016
    Publication date: November 3, 2016
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 9406255
    Abstract: Disclosed herein is a lighting period setting method for a display panel which permits control of the peak luminance level by controlling the total lighting period length which is the sum of all lighting periods per field period, the lighting period setting method including the steps of, calculating the average luminance level across the screen based on input image data, determining light emission mode based on the calculated average luminance level, and setting the number, arrangement and lengths of lighting periods per field period according to the setting conditions defined for the determined light emission mode so as to provide the peak luminance level which is set according to the input image data.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: August 2, 2016
    Assignee: JOLED Inc.
    Inventors: Teppei Isobe, Hiroshi Hasegawa, Hironobu Abe
  • Publication number: 20160189637
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 9361857
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: June 7, 2016
    Assignee: SONY CORPORATION
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20160086311
    Abstract: It is an object to obtain a high-resolution image generation apparatus that can generate a high-quality image by sorting out good portions from faulty portions in optical flow. The present invention includes: a hard disk that stores multi-viewpoint image information and parameter information of a base image and a plurality of reference images; an optical flow computation unit that extracts a plurality of pairs of the base image and a reference image, the plurality of pairs each including a different reference image, and computes optical flow for each pair; a depth information computation unit that computes depth information which indicates depth of each pixel of the base image for each pair, based on optical flow and the parameter information; and an optical flow sorting unit that determines whether or not each piece of pixel-based correspondence information included in the optical flow of each pair is to be used for improving a resolution of the base image, based on two pieces of the depth information.
    Type: Application
    Filed: June 30, 2014
    Publication date: March 24, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideaki MAEHARA, Yosuke ISHIWATARI, Hironobu ABE, Koichi TAKEUCHI
  • Publication number: 20160064468
    Abstract: There are provided a semiconductor unit that prevents connection failure caused by a wiring substrate to improve reliability, a method of manufacturing the semiconductor unit, and an electronic apparatus including the semiconductor unit. The semiconductor unit includes: a device substrate including a functional device and an electrode; a first wiring substrate electrically connected to the functional device through the electrode; and a second wiring substrate electrically connected to the functional device through the first wiring substrate.
    Type: Application
    Filed: November 12, 2015
    Publication date: March 3, 2016
    Inventor: Hironobu Abe
  • Patent number: 9219207
    Abstract: There are provided a semiconductor unit that prevents connection failure caused by a wiring substrate to improve reliability, a method of manufacturing the semiconductor unit, and an electronic apparatus including the semiconductor unit. The semiconductor unit includes: a device substrate including a functional device and an electrode; a first wiring substrate electrically connected to the functional device through the electrode; and a second wiring substrate electrically connected to the functional device through the first wiring substrate.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: December 22, 2015
    Assignee: SONY CORPORATION
    Inventor: Hironobu Abe
  • Patent number: 9001054
    Abstract: A liquid crystal display device having a liquid crystal panel LCP and a touch panel TP provided on the front surface of the liquid crystal panel is characterized in that wires connected to the liquid crystal panel and wires connected to the touch panel are included in one flexible printed circuit FPC, which is first connected (FOG1) to the liquid crystal panel (specifically, a TFT substrate (TFTS)) and then connected (FOG2) to the touch panel.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: April 7, 2015
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Hideaki Abe, Setsuo Kobayashi, Hironobu Abe
  • Publication number: 20140307009
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 8817012
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20140160553
    Abstract: Disclosed herein is a display apparatus including first and second substrates, at least one of which has a light transmitting characteristic, as well as first and second electrodes provided on the two mutually facing surfaces of the first and second substrates respectively; and an electrophoretic device provided between the first and second substrates, wherein the first substrate and the first electrode each have an external edge folded back so as to cover at least a portion of a terminal surface of the second substrate.
    Type: Application
    Filed: February 18, 2014
    Publication date: June 12, 2014
    Applicant: Sony Corporation
    Inventors: Hironobu Abe, Nobuhide Yoneya
  • Patent number: 8705164
    Abstract: Disclosed herein is a display apparatus including first and second substrates, at least one of which has a light transmitting characteristic, as well as first and second electrodes provided on the two mutually facing surfaces of the first and second substrates respectively; and an electrophoretic device provided between the first and second substrates, wherein the first substrate and the first electrode each have an external edge folded back so as to cover at least a portion of a terminal surface of the second substrate.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: April 22, 2014
    Assignee: Sony Corporation
    Inventors: Hironobu Abe, Nobuhide Yoneya
  • Publication number: 20130278624
    Abstract: A display unit has a flexible display section, a detection section for detecting a deflection amount and a deflection direction of the display section, a determination section for determining a visible portion and a non-visible portion of the display section based on the deflection amount and the deflection direction, and a control section for controlling display contents of the display section. The control section either prevents an image display on the non-visible portion or displays one of a fixed image or a pre-set moving image on the non-visible portion. The display unit also includes a displacement sensor located in the same region as the display section.
    Type: Application
    Filed: March 26, 2013
    Publication date: October 24, 2013
    Inventor: Hironobu Abe
  • Patent number: 8537182
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: September 17, 2013
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 8441503
    Abstract: Disclosed herein is a lighting period setting method for a display panel which permits control of the peak luminance level by controlling the total lighting period length which is the sum of all lighting periods per field period, the lighting period setting method including the steps of, calculating the average luminance level across the screen based on input image data, determining light emission mode based on the calculated average luminance level, and setting the number, arrangement and lengths of lighting periods per field period according to the setting conditions defined for the determined light emission mode so as to provide the peak luminance level which is set according to the input image data.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: May 14, 2013
    Assignee: Sony Corporation
    Inventors: Teppei Isobe, Hiroshi Hasegawa, Hironobu Abe
  • Publication number: 20120250139
    Abstract: Disclosed herein is a display apparatus including first and second substrates, at least one of which has a light transmitting characteristic, as well as first and second electrodes provided on the two mutually facing surfaces of the first and second substrates respectively; and an electrophoretic device provided between the first and second substrates, wherein the first substrate and the first electrode each have an external edge folded back so as to cover at least a portion of a terminal surface of the second substrate.
    Type: Application
    Filed: March 14, 2012
    Publication date: October 4, 2012
    Applicant: Sony Corporation
    Inventors: Hironobu Abe, Nobuhide Yoneya
  • Publication number: 20120169802
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: March 14, 2012
    Publication date: July 5, 2012
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20120098774
    Abstract: A liquid crystal display device having a liquid crystal panel LCP and a touch panel TP provided on the front surface of the liquid crystal panel is characterized in that wires connected to the liquid crystal panel and wires connected to the touch panel are included in one flexible printed circuit FPC, which is first connected (FOG1) to the liquid crystal panel (specifically, a TFT substrate (TFTS)) and then connected (FOG2) to the touch panel.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 26, 2012
    Inventors: Hideaki ABE, Setsuo Kobayashi, Hironobu Abe
  • Publication number: 20100188568
    Abstract: Each of a plurality of digital video transmitting devices 100-1 and 100-2 is provided with an IEEE802.3 PHY unit 104 for transmitting video data via a digital network based on the IEEE802.3 standards. A digital video receiving device 200 is provided with a plurality of IEEE802.3 PHY units 201-1 and 201-2 for receiving the video data from the plurality of digital video transmitting devices 100-1 and 100-2 respectively. The IEEE802.3 PHY units 104 of the digital video transmitting devices 100-1 and 100-2 are connected to the IEEE802.3 PHY units 201-1 and 201-2 of the digital video receiving device 200 respectively via an IEEE802.3 network cable.
    Type: Application
    Filed: July 3, 2008
    Publication date: July 29, 2010
    Inventors: Hironobu Abe, Hideo Kawamura, Shin Hikino, Yukinori Kishida
  • Patent number: 7693278
    Abstract: An RTP packet generating unit 11 packetizes data into packets, and adds identification information to the header of each of the packets, the identification information identifying each of the packets. An RTP packet encrypting unit 13 divides data included in each of the generated packets into blocks, and encrypts the data included in each of the packets on a block-by-block basis using an encryption key which an encryption key sharing unit 12 shares with a receiving client in such a manner that, when encrypting a first block of the data, the packet encrypting unit encrypts it using the identification information for identifying each of the packets, which is contained, as an initial vector, in the header of each of the packets, and, when encrypting each subsequent block of the data, encrypts it according to an encryption method which uses an immediately-previously-encrypted block.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: April 6, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takahiro Hiramatsu, Hironobu Abe, Koichi Yamada, Junichi Yokosato