Abstract: An active matrix substrate includes a substrate, a pixel TFT that is supported by the substrate, provided corresponding to each of a plurality of pixel areas, and includes an oxide semiconductor layer, an organic insulating layer disposed above at least the oxide semiconductor layer of the pixel TFT, and an inorganic insulating layer disposed in contact with an upper surface of the organic insulating layer on the organic insulating layer. The organic insulating layer and the inorganic insulating layer are provided with a plurality of dual-layer hole structure portions, each of the dual-layer hole structure portions includes a through-hole provided in the inorganic insulating layer and a bottomed hole provided in the organic insulating layer and positioned below the through-hole, and the through-hole is positioned on an inner side of an outer edge of the bottomed hole when viewed from a normal direction of the substrate.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: An active matrix substrate of an embodiment of the present invention includes a substrate and a plurality of oxide semiconductor TFTs supported on the substrate. Each oxide semiconductor TFT includes a lower gate electrode provided on the substrate, a gate insulating layer covering the lower gate electrode, an oxide semiconductor layer provided on the gate insulating layer, a source electrode which is in contact with the source contact region of the oxide semiconductor layer, a drain electrode which is in contact with the drain contact region of the oxide semiconductor layer, an insulating layer covering the oxide semiconductor layer, the source electrode and the drain electrode, and an upper gate electrode provided on the insulating layer.

Abstract: An active matrix substrate according to an embodiment of the present invention includes: a substrate; a plurality of first TFTs supported by the substrate and provided in a non-displaying region; and a peripheral circuit including the plurality of first TFTs. Each first TFT includes: a first gate electrode provided on the substrate; a first gate insulating layer covering the first gate electrode; a first oxide semiconductor layer opposed to the first gate electrode via the first gate insulating layer; and a first source electrode and a first drain electrode connected to a source contact region and a drain contact region of the first oxide semiconductor layer. Each first TFT has a bottom contact structure. A first region of the first gate insulating layer that overlaps the channel region has a thickness which is smaller than a thickness of a second region of the first gate insulating layer that overlaps the source contact region and the drain contact region.

Abstract: An active matrix substrate includes: a substrate (1); a peripheral circuit including a plurality of first TFTs (10); and a plurality of second TFTs (20), wherein each of the first and second TFTs (10, 20) includes: a gate electrode (3A, 3B); a gate insulating layer (5); an oxide semiconductor layer (7A, 7B) including a channel region (7Ac, 7Bc), a source contact region (7As, 7Bs) and a drain contact region (7Ad, 7Bd), wherein the source contact region and the drain contact region are located on opposite sides of the channel region; a source electrode (8A, 8B) that is in contact with the source contact region and a drain electrode (9A, 9B) that is in contact with the drain contact region; the oxide semiconductor layer of the first TFTs and the second TFTs is formed from the same oxide semiconductor film; a carrier concentration in the channel regions (7Ac) of the first TETs is higher than a carrier concentration in the channel regions (7Bc) of the second TETs.

Abstract: An active matrix substrate (100) according to an embodiment of the present invention has a display region (DR) defined by a plurality of pixel regions (P) arranged in a matrix pattern, and a peripheral region (FR) located around the display region. The active matrix substrate includes a substrate (1), a first TFT (10) supported on the substrate and including a crystalline silicon semiconductor layer (11), and a second TFT (20) supported on the substrate and including an oxide semiconductor layer (21). The first TFT and the second TFT each have a top gate structure. The oxide semiconductor layer is located below the crystalline silicon semiconductor layer.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: An active matrix substrate includes: a substrate (1); a peripheral circuit including a plurality of first TFTs (10); and a plurality of second TFTs (20), wherein each of the first and second TFTs (10, 20) includes: a gate electrode (3A, 3B); a gate insulating layer (5); an oxide semiconductor layer (7A, 7B) including a channel region (7Ac, 7Bc), a source contact region (7As, 7Bs) and a drain contact region (7Ad, 7Bd), wherein the source contact region and the drain contact region are located on opposite sides of the channel region; a source electrode (8A, 8B) that is in contact with the source contact region and a drain electrode (9A, 9B) that is in contact with the drain contact region; the oxide semiconductor layer of the first TFTs and the second TFTs is formed from the same oxide semiconductor film; a carrier concentration in the channel regions (7Ac) of the first TETs is higher than a carrier concentration in the channel regions (7Bc) of the second TETs.

Abstract: An active matrix substrate (1001) has multiple pixel areas. At least one pixel area includes a pixel TFT (20), a pixel electrode (15), a first circuit TFT (10), and drive circuit wiring lines (L1 to L3) that are connected to the first circuit TFT. The pixel TFT (20) and the first circuit TFT (10) are oxide semiconductor TFTs. The pixel electrode (15) is formed from an upper transparent conductive film. The drive circuit wiring line includes a transparent wiring line portion (L1 and L2) that is formed from a lower transparent conductive film which is positioned closer to a substrate 1 than the upper transparent conductive film. At least one of a source electrode (8) and a drain electrode (9) of the first circuit TFT (10) is formed from the lower transparent conductive film.

Abstract: An active matrix substrate according to an embodiment of the present invention includes: a substrate; a plurality of first TFTs supported by the substrate and provided in a non-displaying region; and a peripheral circuit including the plurality of first TFTs. Each first TFT includes: a first gate electrode provided on the substrate; a first gate insulating layer covering the first gate electrode; a first oxide semiconductor layer opposed to the first gate electrode via the first gate insulating layer; and a first source electrode and a first drain electrode connected to a source contact region and a drain contact region of the first oxide semiconductor layer. Each first TFT has a bottom contact structure. A first region of the first gate insulating layer that overlaps the channel region has a thickness which is smaller than a thickness of a second region of the first gate insulating layer that overlaps the source contact region and the drain contact region.

Abstract: A semiconductor apparatus (100) is provided with: a substrate (1); and a thin-film transistor (10). The thin-film transistor has: an oxide semiconductor layer (11) that includes a channel region (11a) and first and second contact regions (11b, 11c); a gate insulating layer (12) that is provided so as to cover the oxide semiconductor layer; a gate electrode (13) that is provided on the gate insulating layer and that overlaps the channel region via the gate insulating layer; a source electrode (14) that is electrically connected to the first contact region; and a drain electrode (15) that is electrically connected to the second contact region. This semiconductor apparatus is further provided with a light-shielding layer (2) arranged between the oxide semiconductor layer and the substrate, and the channel region is aligned to the part of the light-shielding layer overlapping the oxide semiconductor layer.

Abstract: An active matrix substrate of an embodiment of the present invention includes a substrate and a plurality of oxide semiconductor TFTs supported on the substrate. Each oxide semiconductor TFT includes a lower gate electrode provided on the substrate, a gate insulating layer covering the lower gate electrode, an oxide semiconductor layer provided on the gate insulating layer, a source electrode which is in contact with the source contact region of the oxide semiconductor layer, a drain electrode which is in contact with the drain contact region of the oxide semiconductor layer, an insulating layer covering the oxide semiconductor layer, the source electrode and the drain electrode, and an upper gate electrode provided on the insulating layer.

Abstract: Provided is a semiconductor device (100A) including: a substrate (1); a first gate electrode (2) that is provided on the substrate; a first gate insulating layer (3) that covers the first gate electrode; a first oxide semiconductor layer (4) that faces the first gate electrode with the first gate insulating layer in between; a first source electrode (5) and a first drain electrode (6) that are electrically connected to the first oxide semiconductor layer; a second gate insulating layer (7) that covers the first oxide semiconductor layer; a second gate electrode (8) that faces the first oxide semiconductor layer with the second gate insulating layer in between; a third gate insulating layer (9) that covers the second gate electrode; a second oxide semiconductor layer (10) that faces the second gate electrode with the third gate insulating layer in between; and a second source electrode (11) and a second drain electrode (12) that are electrically connected to the second oxide semiconductor layer.

Abstract: An active matrix substrate (1001) has multiple pixel areas. At least one pixel area includes a pixel TFT (20), a pixel electrode (15), a first circuit TFT (10), and drive circuit wiring lines (L1 to L3) that are connected to the first circuit TFT. The pixel TFT (20) and the first circuit TFT (10) are oxide semiconductor TFTs. The pixel electrode (15) is formed from an upper transparent conductive film. The drive circuit wiring line includes a transparent wiring line portion (L1 and L2) that is formed from a lower transparent conductive film which is positioned closer to a substrate 1 than the upper transparent conductive film. At least one of a source electrode (8) and a drain electrode (9) of the first circuit TFT (10) is formed from the lower transparent conductive film.

Abstract: A semiconductor device has a top-gate structure resistant to creation of parasitic capacitance between a low-resistance region formed in a semiconductor layer and a gate electrode. A TFT (100) has a low-resistance region, a portion of which has a first length (L1) ranging from a first position (P1) corresponding to an end of a gate insulating film to a region below a gate electrode (40), and the first length is substantially equal to a second length (L2) ranging from the first position (P1) to a second position (P2) corresponding to an end of the gate electrode (40). Thus, the overlap between the gate electrode (40) and either a source region (20 s) or a drain region (20 d) can be reduced, resulting in diminished parasitic capacitance.

Abstract: A semiconductor apparatus (100) is provided with: a substrate (1); and a thin-film transistor (10). The thin-film transistor has: an oxide semiconductor layer (11) that includes a channel region (11a) and first and second contact regions (11b, 11c); a gate insulating layer (12) that is provided so as to cover the oxide semiconductor layer; a gate electrode (13) that is provided on the gate insulating layer and that overlaps the channel region via the gate insulating layer; a source electrode (14) that is electrically connected to the first contact region; and a drain electrode (15) that is electrically connected to the second contact region. This semiconductor apparatus is further provided with a light-shielding layer (2) arranged between the oxide semiconductor layer and the substrate, and the channel region is aligned to the part of the light-shielding layer overlapping the oxide semiconductor layer.

Abstract: An active matrix substrate (1001) includes: a plurality of pixel regions arranged on a substrate (1) in a matrix pattern extending in a first and a second direction; a plurality of gate lines G extending in the first direction; and a plurality of source lines S extending in the second direction, the active matrix substrate having a display area (800) including a plurality of pixel regions and a non-display area (900) located in a periphery of the display area, wherein: the pixel regions each include a thin-film transistor (101) including an oxide semiconductor layer, and a pixel electrode (15) formed integral with a drain electrode (9); gate electrode (3) and the gate lines G are made of a first transparent conductive film; the drain electrode (9) and the pixel electrode (15) are made of a second transparent conductive film and provided in the non-display area (900); and the active matrix substrate further includes a plurality of gate signal lines made of a metal film and a first connecting portion that conne

Abstract: A semiconductor device includes, a plurality of oxide semiconductor TFTs including a first gate electrode, a first insulating layer in contact with the first gate electrode, an oxide semiconductor layer opposing the first gate electrode via the first insulating layer, a source electrode and a drain electrode which are connected with the oxide semiconductor layer, and an organic insulating layer covering only some of the plurality of oxide semiconductor TFTs, wherein the plurality of oxide semiconductor TFTs include a first TFT which is covered with the organic insulating layer and a second TFT which is not covered with the organic insulating layer, and the second TFT includes a second gate electrode opposing the oxide semiconductor layer via a second insulating layer, the second gate electrode being arranged to overlap with at least a portion of the first gate electrode with the oxide semiconductor layer interposed therebetween.

Abstract: An active matrix substrate (100) according to an embodiment of the present invention has a display region (DR) defined by a plurality of pixel regions (P) arranged in a matrix pattern, and a peripheral region (FR) located around the display region. The active matrix substrate includes a substrate (1), a first TFT (10) supported on the substrate and including a crystalline silicon semiconductor layer (11), and a second TFT (20) supported on the substrate and including an oxide semiconductor layer (21). The first TFT and the second TFT each have a top gate structure. The oxide semiconductor layer is located below the crystalline silicon semiconductor layer.