Abstract: The present invention provides a multilayered body for medical containers, in which the innermost layer formed from a cyclic polyolefin exhibits favorable adhesion to another layer without using an adhesive, which exhibits excellent heat resistance, and which provides favorable blocking resistance when formed as a film, as well as a medical container formed from this multilayered body for medical containers, which suffers minimal deterioration in properties such as transparency and peel strength even when subjected to sterilization with high-pressure steam or the like.

Abstract: A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.

Abstract: A basic structure of a reference voltage generation circuit is formed by a buffer amplifier (21) and a resistive element (22) without using a band gap regulator. Thus, an influence of a noise of the band gap regulator as in the conventional art is eliminated. There are provided comparators (23) and (24) for comparing an input voltage of the buffer amplifier (21) with an output voltage of a band gap regulator (10), and a control circuit (25) for variably controlling a resistance value of the resistive element (22) in response to comparison signals. Consequently, even if an output voltage (Vout) of the buffer amplifier (21) temporarily fluctuates with a change in a source voltage (VDD), it returns into a desirable voltage range and converges through a variable control of the resistance value.

Abstract: There are included an LPF (3) and an HPF (4) that are connected in parallel to the output of a pre-emphasis circuit (2). There is also included a gain adjusting circuit (6) that performs a gain adjustment of low-pass filter with respect to the frequency band to be passed through the HPF (4). The low frequency components of the frequency band of baseband signals outputted from the pre-emphasis circuit (2) pass through the LPF (3), while the high frequency components pass through the HPF (4). As to the outputs from the HPF (4), the gain of especially the higher part of the frequency band components to be passed through the HPF (4) is suppressed by the gain adjusting circuit (6), whereby the amplitudes of the baseband signals can be limited only for the high frequency range without using a limiter and further the peak values of the baseband signals can be inhibited from exceeding the maximum frequency deviation.

Abstract: An FM transmitter with improved degree of freedom in parts selection comprises: an oscillator connected with a crystal oscillator; a clock generating circuit uses a signal formed by frequency-dividing an oscillator output as a reference frequency, and which generates a clock having a frequency of an integer multiple of the frequency of the reference frequency; a DSP operates synchronously with the clock performing stereo modulation processing, FM modulation processing, and IQ modulation processing to inputted stereo data by digital processing; a frequency synthesizer generates a reference having a frequency an integer multiple of the frequency of the reference; mixers which mix signals outputted from the DSP with signals generated by the frequency synthesizer, respectively; an adder which adds outputs of the mixers; and an amplifier which amplifies an output signal of the adder and transmits the amplified signal from an antenna.

Abstract: There are included a first quadrature modulation part (5) that divides an input signal into an I signal and a Q signal having a phase orthogonal to the phase thereof and uses a baseband frequency to perform frequency conversions of the I and Q signals, thereby performing a quadrature modulation; and a second quadrature modulation part (8) that uses in-phase and quadrature carriers of FM frequencies, which are 90 degrees out of phase with respect to each other, to perform frequency conversions of the I and Q signals, which are generated by the first quadrature modulation part (5), thereby performing a quadrature modulation.

Abstract: A basic structure of a reference voltage generation circuit is formed by a buffer amplifier (21) and a resistive element (22) without using a band gap regulator. Thus, an influence of a noise of the band gap regulator as in the conventional art is eliminated. There are provided comparators (23) and (24) for comparing an input voltage of the buffer amplifier (21) with an output voltage of a band gap regulator (10), and a control circuit (25) for variably controlling a resistance value of the resistive element (22) in response to comparison signals. Consequently, even if an output voltage (Vout) of the buffer amplifier (21) temporarily fluctuates with a change in a source voltage (VDD), it returns into a desirable voltage range and converges through a variable control of the resistance value.

Abstract: The present invention provides a multilayered body for medical containers, in which the innermost layer formed from a cyclic polyolefin exhibits favorable adhesion to another layer without using an adhesive, which exhibits excellent heat resistance, and which provides favorable blocking resistance when formed as a film, as well as a medical container formed from this multilayered body for medical containers, which suffers minimal deterioration in properties such as transparency and peel strength even when subjected to sterilization with high-pressure steam or the like.

Abstract: There are included an LPF (3) and an HPF (4) that are connected in parallel to the output of a pre-emphasis circuit (2). There is also included a gain adjusting circuit (6) that performs a gain adjustment of low-pass filter with respect to the frequency band to be passed through the HPF (4). The low frequency components of the frequency band of baseband signals outputted from the pre-emphasis circuit (2) pass through the LPF (3), while the high frequency components pass through the HPF (4). As to the outputs from the HPF (4), the gain of especially the higher part of the frequency band components to be passed through the HPF (4) is suppressed by the gain adjusting circuit (6), whereby the amplitudes of the baseband signals can be limited only for the high frequency range without using a limiter and further the peak values of the baseband signals can be inhibited from exceeding the maximum frequency deviation.

Abstract: A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.

Abstract: p-MOSFETs (21) and (22) are used as amplifying elements for amplifying a signal input from a loop antenna (1) and are directly connected to the loop antenna (1). Thus, the signal input from the loop antenna (1) can be received in a high impedance through the p-MOSFETs (21) and (22). Consequently, a transformer for carrying out a conversion into a high impedance or the like is not required, and furthermore, the impedance of the loop antenna 1 itself does not need to be increased, thereby suppressing the occurrence of a current noise.

Abstract: A cutoff frequency adjusting circuit includes a filter circuit (1) provided with a plurality of resister elements, and a switch to one of the resister elements, and a capacitor. A cutoff frequency of the filter circuit (1) is determined by a resistor value of the resister element selected by the switch and capacitive value of the capacitor. The cutoff frequency adjusting circuit further includes a clock signal generator (2) that generates first and second frequency clock signals (CK1) and (CK2), and a DSP (3) that compares a level of an output signal output from the filter circuit (1) when the first frequency clock signal (CK 1) is input to the filter circuit (1) and that of an output signal output from the filter circuit (1) when the second frequency clock signal (CK2) is input to the filter circuit (1) and that controls the switch in response to its comparing result.

Abstract: By A/D converting a signal output from a mixer (4) and inputting the A/D converted signal to a DSP (8), and generating AGC control data (DL) corresponding to a level of the signal to control a gain of an LNA (3) in such a manner that a voltage input to an A/D converting circuit (7) is lower than a full scale voltage of the A/D converting circuit (7), it is possible to prevent a signal having an excessively high level beyond a dynamic range of the A/D converting circuit (7) from being input to the A/D converting circuit (7). By controlling the gain of the LNA (3) corresponding to a level of a broad band signal before passing through a BPF (11) and controlling a gain of an IF amplifier (12) corresponding to a level of a narrow band signal after passing through the BPF (11), moreover, it is possible to properly control a gain of an AGC as a whole in consideration of signal levels of both a desirable wave and a disturbing wave.

Abstract: An FM transmitter improved in degree of freedom of selecting components.

Abstract: Signal lines (13) and (14) to be used for supplying a signal between an analog circuit and a digital circuit are provided in different regions from power-ground lines (11) and (12) to be used for supplying a power to the analog circuit and the digital circuit in such a manner that the signal lines (13) and (14) do not cross the power-ground lines (11) and (12). For example, the power-ground lines (11) and (12) are provided along an outer periphery of a semiconductor chip (10) and the analog circuit and the digital circuit are disposed on the inside of the power-ground lines (11) and (12), and the signal lines (13) and (14) are provided between the analog circuit and the digital circuit.

Abstract: There are provided a variable tuning filter 11 for selecting any of resistance elements by changing over a switch to cause a tuning frequency fF to be variable, and an oscillating circuit 12 constituted in the same manner as the variable tuning filter 11, and an oscillating frequency fL of the oscillating circuit 12 which is monitored by a frequency counter 13 and a desirable received frequency fr which is preset by a control circuit 14 are compared with each other based on respective frequency count values, and the oscillating frequency fL of the oscillating circuit 12 is varied in such a manner that both of the frequencies are coincident with each other within an allowable error range, and correspondingly, the tuning frequency fF of the variable tuning filter 11 is also varied.

Abstract: An LPF (15) includes a plurality of capacitors (C1) to (Cn) connected in parallel, switches (SW11) to (SW1n) and (SW21) to (SW2n) for carrying out switching to perform their charging/discharging operation as a pipeline processing, and a capacitor (CH) connected to an output side of a parallel circuit having the capacitors (C1) to (Cn), and electric charges stored sequentially in the capacitors (C1) to (Cn) are obtained as an output of the parallel circuit and are sequentially stored in the capacitor (CH). Consequently, it is possible to implement a great time constant as the whole circuit even if the time constant is reduced with a decrease in capacitance values of the capacitors (C1) to (Cn) and (CH).

Abstract: A clock generating circuit having a simple constitution and an audio system are disclosed. The clock generating circuit (300) comprises an oscillator (12) for generating a reference frequency signal by means of a crystal oscillator (10) of a resonance frequency of 32.

Abstract: A JFET 4 to be an antenna buffer for an AM broadcasting signal is constituted in a source follower form of a 100% negative feedback type, and a tuning circuit including a variable capacitive circuit 7 and a transformer 6 is provided in a subsequent stage to the JFET 4 and an amplifying circuit including MOSFETs 10 and 11 is provided in a further subsequent stage thereto. Consequently, it is possible to reduce a signal distortion rate in the JFET 4 and to eliminate a drawback that every frequency component enters the amplifying circuit to saturate the amplifying circuit, resulting in an occurrence of a distortion in an output signal. By switching a plurality of capacitors CT1, CT2, . . . CTn to cause a capacitance value to be variable without using a varactor diode, it is possible to integrate the capacitors CT1, CT2, . . . CTn in an IC 20.

Abstract: A smoothing circuit for realizing the miniaturization and the increase of integration scale of a circuit and for easily varying attack time and release time. This smoothing circuit comprises a capacitor, voltage comparator, charging circuit, and discharging circuit. The voltage comparator compares the terminal voltage of the capacitor with its input voltage and actuates the charging circuit or the discharging circuit according to a comparison result. The charging circuit charges the capacitor by intermittently supplying charging current. The discharging circuit discharges the capacitor by allowing discharging current to flow intermittently.