Abstract: A JFET 4 to be an antenna buffer for an AM broadcasting signal is constituted in a source follower form of a 100% negative feedback type, and a tuning circuit including a variable capacitive circuit 7 and a transformer 6 is provided in a subsequent stage to the JFET 4 and an amplifying circuit including MOSFETs 10 and 11 is provided in a further subsequent stage thereto. Consequently, it is possible to reduce a signal distortion rate in the JFET 4 and to eliminate a drawback that every frequency component enters the amplifying circuit to saturate the amplifying circuit, resulting in an occurrence of a distortion in an output signal. By switching a plurality of capacitors CT1, CT2, . . . CTn to cause a capacitance value to be variable without using a varactor diode, it is possible to integrate the capacitors CT1, CT2, . . . CTn in an IC 20.

Abstract: By providing switch portions (8a) and (8b) for switching I and Q signals and outputting them to a single A/D converter (9), and sequentially converting the I and Q signals output from the switch portions (8a) and (8b) into digital signals by the A/D converter (9) and supplying them to a DSP (10), it is possible to carry out an A/D conversion processing for the I and Q signals through the same A/D converter (9). Consequently, it is possible to eliminate a drawback that an amplitude error or a phase error is made between the I and Q signals due to a variation in an A/D converting characteristic.

Abstract: There are included a signal generating circuit (8) that generates, based on a comparison signal outputted from a phase comparator (3) and a clock signal outputted from a crystal oscillation circuit (1) and having a shorter pulse width than the comparison signal, a control signal obtained from a logical product of the two signals; and a charge pump circuit that performs, based on the control signal from the signal generating circuit (8), a charging or discharging operation of a capacitor. The charging or discharging operation of the capacitor is gradually performed little by little based on the control signal having the shorter pulse width than the conversional comparison signal, whereby even if the capacitance value of the capacitor is reduced, the substantial time constant can be enlarged, resulting in a stable operation of a frequency synthesizer.

Abstract: A frequency synthesizer includes an AND circuit (17) for detecting whether a frequency synthesizer is in a lock state according to a signal outputted from an Up terminal and a Down terminal of a phase comparator and switching circuits (18, 19) for switching between presence and absence of connections of constant current circuits (14, 15) constituting a charge pump circuit (4) according to the output signal of the AND circuit (17). When the AND circuit (17) has detected a high impedance state of the charge pump circuit (4), the switching circuits (18, 19) disconnects the constant current circuits (14, 15) by the switching circuits (18, 19). Thus, it is possible to eliminate current flowing into the charge pump circuit (4) without using a control signal from outside such as a power cut signal and an intermittent signal.

Abstract: A first-stage amplifier of an AM receiving circuit is built into an IC 2 as a differential amplifying circuit 3. The differential amplifying circuit 3 is connected to one pad P1 of the IC 2. Then, a high pass filter is configured by connecting a resistor Ra between two input terminals of the differential amplifying circuit 3 and connecting a capacitor Ca between the resistor Ra and ground and in series with the resistor Ra and ground. Thus, the resistor Ra and capacitor Ca integrated into the IC 2 allows hum noise to be removed.

Abstract: In a mixer circuit 6 connected in common to output sides of an LNA 2 for FM receiving and an LNA 4 for AM receiving, each of a radiofrequency signal output from the LNA 2 for FM receiving and a radiofrequency signal output from the LNA 4 for AM receiving is frequency-converted into an intermediate frequency signal of a lower intermediate frequency for AM broadcast waves. In this way, receiving of an FM broadcast is performed by a low IF system and receiving of an AM broadcast is performed by a single conversion system; the need for separately providing a mixer circuit, a local oscillation circuit and an IF filter for down-mixing of AM broadcast waves is eliminated.

Abstract: A received signal level is detected in each of a wide band, middle band, and narrow band and each detected signal is converted to a digital signal. A DSP 18 determines the enabled/disabled state of an LNA 3 and an attenuator 4 as well as a gain adjustment amount based on the signal level of each band. For example, the gain adjustment is not performed when the signal level of the narrow band including a desired frequency is not larger than a prescribed value even the signal level of the wide band or middle band is larger than a prescribed value. When the signal level of the narrow band is larger than the prescribed value exceeding a gain adjustable limit level in the attenuator 4, the gain of the LNA 3 is adjusted, while maintaining the gain adjustable amount in the attenuator 4 around the limit level, to reduce the gain as a whole.

Abstract: A couple of frequency doubler circuits 21 and 22 which multiplys a frequency of a reference oscillation signal outputted from a reference oscillator 12 is provided, thereby a frequency of a reference oscillation signal, as the greatest common divisor between a frequency (300 KHz) determined by multiplying the frequency (fx=75 KHz) of a crystal oscillator 11 by four and a frequency (54 KHz) determined by multiplying an assigned frequency per one channel in AM radio broadcasting by a prescribed divide ratio, can be higher than a conventional frequency. This way realizes the decrease of a divide ratio in a programmable counter 17, resulting in the reduction of the circuit scale, shortening of the lock-up time, and improvement of the S/N ratio.

Abstract: A direct conversion receiver wherein even when signals are continuously received, the automatic gain control can be implemented in accordance with the signal levels from which DC offset voltages have been removed. The direct conversion receiver comprises a low-noise amplifier 14, a mixer 16, a local oscillator (LO) 20, a lowpass filter (LPF) 23, a baseband amplifier (second amplifier) 24, an analog-to-digital converter (ADC) 26, digital-to-analog converters (DAC) 28, 32, a signal processing section 30, a speaker 34, a DC component extracting filter 100, an average value calculating circuit 200 and a subtractor 210. The average value calculating circuit 200 calculates an average value of the signal levels of the baseband signals. The DC offset voltage extracted by the DC component filter 100 is subtracted from the average value, thereby generating a control voltage, which then controls the gain of the input circuit 10 or low-noise amplifier 14.

Abstract: An oscillator, a PLL circuit, a receiver and a transmitter that allow the circuit scale to be reduced and that are suitable for integration. The electrostatic capacities of variable capacitance circuits 230, 230A are made variable, thereby varying the oscillation frequency of a voltage controlled oscillator 21. The variable capacitance circuit 230 comprises a plurality of variable capacitance elements 60-64 the electrostatic capacities of which can be continuously varied by use of a control signal; a plurality of capacitors 50-54 which are associated with the respective variable capacitance elements and the electrostatic capacities of which are fixed; and a plurality of switches 71-74, 81-84 that individually switch combinational circuits, each of which comprises one of the plurality of variable capacitance elements 60-64 and a respective associated one of the plurality of capacitors 50-54, for selective connections.

Abstract: There are provided an IF signal generating portion 10 for generating an intermediate frequency signal, and an amplitude error correcting portion 15 for setting a gain of an amplitude correcting portion 12 to eliminate an amplitude error between a signal processed by a first signal processing system for an I signal and a signal processed by a second signal processing system for a Q signal when the intermediate frequency signal generated by the IF signal generating portion 10 is selected by switches 7I and 7Q. By correcting an amplitude error using the intermediate frequency signal generated by the IF signal generating portion 10 in place of an intermediate frequency signal generated by processing an actual received signal, it is possible to accurately detect the amplitude error without an influence of a phase error by using a signal which does not include a phase error caused by a variation in elements of mixers 4I and 4Q and a 90° phase shifter 6 themselves.

Abstract: A composite band-pass filter receives a quadrature input signal and passes an intermediate frequency signal while attenuating all other signals including an undesired image signal. The composite band-pass filter is comprised of a continuous time polyphase filter and a discrete time polyphase filter and can amplify signals. The amplification is distributed through out the composite band-pass filter and the amount of amplification may be selected by control signals. The composite band-pass filter has improved dynamic range and noise characteristics, selectable amplification and replaces an external crystal filter.

Abstract: By performing rough adjustment of a local oscillation frequency by a first lock loop using an up/down counter (5) and micro adjustment of the local oscillation frequency by a second lock loop using an S/H circuit (11), it is possible to eliminate the need of operation of charging and pumping a capacitor according to a phase difference and to omit an LPF using a large-scale capacitor from the frequency synthesizer. Moreover, by performing micro adjustment using the S/H circuit (11), it is possible to accurately lock the local oscillation frequency and eliminate the need of increasing the bit quantity of the up/down counter (5) to increase the control accuracy of the frequency to be locked. Thus, it is possible to rapidly lock the local oscillation frequency to a desired frequency.

Abstract: There are included a first quadrature modulation part (5) that divides an input signal into an I signal and a Q signal having a phase orthogonal to the phase thereof and uses a baseband frequency to perform frequency conversions of the I and Q signals, thereby performing a quadrature modulation; and a second quadrature modulation part (8) that uses in-phase and quadrature carriers of FM frequencies, which are 90 degrees out of phase with respect to each other, to perform frequency conversions of the I and Q signals, which are generated by the first quadrature modulation part (5), thereby performing a quadrature modulation.

Abstract: A modulation output device including; a DSP 12 for subjecting MP3 music data and the like read out from an MP3 player 50 to stereo modulation, when necessary; D/A converter 14 for converting the digital data outputted from the DSP 12 to an analog signal and outputting the converted analog signal to either an earphone terminal 54 or transmission part 15; and transmission part 15 for transmitting the analog signal outputted from the D/A converter 14 to the outside through a transmission antenna 55 enables the processing concerning reproduction of music data and processing for modulation of the reproduced music data to transmit without wires to be performed by a single DSP 12 and a single D/A converter 14.

Abstract: A first switch (SW1) is connected in series between a first capacitor (1) and a grounding wire, and when an RTC oscillation apparatus is connected and an IC chip (10) is configured as an external input buffer circuit, the first switch (SW1) is turned off. Thus, the first capacitor (1) and a second capacitor (2) are prevented from being connected in parallel to a resonance capacitor of the RTC oscillation apparatus, and the first and the second capacitors (1, 2) are prevented from configuring a part of the resonance circuit of the oscillation apparatus. When an exclusive crystal oscillator is connected and the IC chip (10) is configured as a part of the oscillation apparatus, the first switch (SW1) is turned on and the first and the second capacitors (1, 2) configure a part of the resonance circuit.

Abstract: A semiconductor device capable of preventing degradation of signal quality due to inclusion of noise and reducing the circuit scale. The constitution of a transmitter/receiver for transmitting/receiving a signal is fabricated on a semiconductor substrate (100). Part of the transmission and reception is performed by analog processing, and the other part is performed by digital processing. The digital processings of the transmission and reception are performed by using a common digital processing unit (20). A reception processing block (10) for analog processing of reception is disposed near a corner of the rectangular semiconductor substrate (100), and digital signal processing unit (20) is disposed near another corner not adjacent to the former corner.

Abstract: An FM transmitter which can be easily connected to an existing computer or the like and does not need any troublesome operation is provided. An FM transmitter 100 has an USB device function which can be connected to a PC 400 as an USB host device and comprises a power supply circuit 130 which is connected to the power supply pin of an USB socket 410 to generate a predetermined operating voltage when an USB plug 110 is connected to the USB socket 410 of the PC 400, an USB controller 120 for requesting that its own apparatus being a device audio source inputs/outputs data by isochronous transfer in a configuration performed by the PC 400 and a transmission processing section 140 which is actuated by the operating voltage supplied by the power supply circuit 130 and applies FM-modulation to audio data outputted from the PC 400 via the USB socket 410 for transmission.

Abstract: An LNA (2) is directly connected to a loop antenna (1), and a variable BPF (3), the passed frequency band of which is adapted to be variable, is connected in a stage following the LNA (2). In this way, the variable BPF (3) is used to configure a variable tuning circuit exhibiting a high Q-value without using any impedance conversion transformer between the loop antenna (1) and the LNA (2), whereby almost all of the constituent elements of the tuner part can be integrated in an IC chip (10) and further the variable tuning can maintain an excellent selectivity of a target frequency.

Abstract: It is an object of the present invention to provide a variable gain amplifier circuit operable with a low power supply voltage and with less noise generated inside the circuit. In the variable gain amplifier circuit, a third MOS transistor is connected between the respective sources of two MOS transistors constituting a differential amplifier circuit and to the gate of the third MOS transistor, and a DC bias voltage for operating the third MOS transistor in a non-saturated region is supplied. If the output voltage of an AM intermediate frequency variable gain amplifier circuit increases, a control voltage for reducing the resistance between the source and drain of the third MOS transistor is applied to reduce the gain of the AM intermediate frequency variable gain amplifier circuit.