Patents by Inventor Hiroshi Mizutani

Hiroshi Mizutani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070296506
    Abstract: A high frequency amplifier is provided with: an input terminal receiving a high frequency signal; an output terminal; a three-terminal active element having a first terminal connected with the input terminal and a second terminal connected with the output terminal; a transmission line; and a capacitive structure. The three-terminal active element outputs an output signal from the output terminal in response to the high frequency signal. The transmission line and the capacitive structure are connected in series between the first and output terminals, and operate together as a series resonance circuit. The transmission line functions as an open stub at a series resonance frequency of the series resonance circuit.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 27, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hiroshi Mizutani
  • Publication number: 20070273457
    Abstract: A branch path having a transmission line and a distributed constant line includes a resonant circuit. The resonant circuit resonates at a predetermined operating frequency when the branch path is in OFF state. At this time, the distributed constant line has a predetermined impedance. Further, an impedance of a node between the resonant circuit and distributed constant line can be set on a circle of a reflection coefficient 1 near short on the Smith chart.
    Type: Application
    Filed: May 22, 2007
    Publication date: November 29, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hiroshi Mizutani
  • Publication number: 20070030101
    Abstract: A switch circuit 1 includes a unit circuit including capacitors 12, 14, an inductor 20, and a FET 30 (switching element). The capacitors 12, 14 are provided in a path P1 (first path) connecting I/O terminals 92, 94. The capacitors 12, 14 are serially connected to each other. To the path P1, a path P2 (second path) is connected. The path P2 includes the inductor 20 and the FET 30, which are serially connected to each other. To be more detailed, an end of the inductor 20 is connected to a connection point N, and the drain (or source) of the FET 30 is connected to the other end of the inductor 20. The source (or drain) of the FET 30 is grounded.
    Type: Application
    Filed: August 4, 2006
    Publication date: February 8, 2007
    Inventor: Hiroshi Mizutani
  • Publication number: 20070026673
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Application
    Filed: October 3, 2006
    Publication date: February 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Publication number: 20070024389
    Abstract: The switch circuit 1 includes a common terminal 10 (common port), a plurality of branch terminals 22, 24, a common path P0 connecting the common terminal 10 and a diverging point N, branch paths P1, P2 connecting the diverging point N and the branch terminals 22, 24 respectively, distributed constant FETs 32, 34 respectively provided in the branch paths P1, P2, and transmission lines 42, 44 provided between the diverging point N on the branch paths P1, P2 and the distributed constant FETs 32, 34 respectively. Here, the transmission lines 42, 44 are longer than 45% of ?/4 but shorter than ?/4, when ? designates a propagation wavelength under an operating frequency.
    Type: Application
    Filed: July 26, 2006
    Publication date: February 1, 2007
    Inventor: Hiroshi Mizutani
  • Patent number: 7159446
    Abstract: A highly sensitive particulate matter concentration measuring apparatus for measuring a concentration of particulate matter in a sample gas collected in a collecting region formed on a collecting medium, the collecting region being formed by drawing the sample gas through a cross-sectional area of the collecting medium, the collecting medium is a filter tape that includes a porous film made of a fluorine resin and a reinforcing layer provided on the porous film, the particulate matter concentration is measured using a beta-ray absorbing method while removing the error influences of naturally occurring beta radiation, and includes an additional impact type sampler or cyclone type sampler for filtering the sample gas prior to collecting the particulate matter in the collecting region.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: January 9, 2007
    Assignee: Horiba, Ltd.
    Inventors: Masayoshi Shinohara, Hiroshi Mizutani
  • Patent number: 7145241
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: December 5, 2006
    Assignee: Fujitsu Limited
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Patent number: 7135717
    Abstract: The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes FETs a gate electrode, a source electrode, and a drain electrode of each of which are formed on a semiconductor. The source electrode and the drain electrode are connected with the earth as well as are disposed in parallel to each other, and the gate electrode is formed between the source electrode and the drain electrode, and both the ends of the gate electrode are connected to the first input-output terminal 1 and the second input-output terminal.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: November 14, 2006
    Assignee: Nec Electronics Corporation
    Inventor: Hiroshi Mizutani
  • Publication number: 20060197106
    Abstract: The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes FETs a gate electrode, a source electrode, and a drain electrode of each of which are formed on a semiconductor. The source electrode and the drain electrode are connected with the earth as well as are disposed in parallel to each other, and the gate electrode is formed between the source electrode and the drain electrode, and both the ends of the gate electrode are connected to the first input-output terminal 1 and the second input-output terminal.
    Type: Application
    Filed: May 5, 2006
    Publication date: September 7, 2006
    Inventor: Hiroshi Mizutani
  • Publication number: 20050252982
    Abstract: There is provided a humidifier superior in terms of hygiene, simple in terms of maintenance, wherein humidity is easily adjusted, and energy consumption is low. The humidifier uses as a moisture permeable membrane, a moisture-permeable polyurethane obtained by using as raw materials, at least an isocyanate component, a diol as a chain extender, and polyethylene glycol as a polyol component, and reacting these raw materials.
    Type: Application
    Filed: May 17, 2004
    Publication date: November 17, 2005
    Inventors: Yasuhiro Akita, Shunichi Hayashi, Hiroshi Mizutani, Norio Miwa, Akio Yagi, Takashi Nitta, Tadao Takahashi, Izumi Tanaka
  • Patent number: 6964190
    Abstract: A highly sensitive particulate matter concentration measuring apparatus for measuring a concentration of particulate matter in a sample gas collected in a collecting region formed on a collecting medium, the collecting region being formed by drawing the sample gas through a cross-sectional area of the collecting medium, the collecting medium is a filter tape that includes a porous film made of a fluorine resin and a reinforcing layer provided on the porous film, the particulate matter concentration is measured using a beta-ray absorbing method while removing the error influences of naturally occurring beta radiation, and includes an additional impact type sampler or cyclone type sampler for filtering the sample gas prior to collecting the particulate matter in the collecting region.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: November 15, 2005
    Assignee: Horiba, Ltd.
    Inventors: Masayoshi Shinohara, Hiroshi Mizutani
  • Publication number: 20050188746
    Abstract: A highly sensitive particulate matter concentration measuring apparatus for measuring a concentration of particulate matter in a sample gas collected in a collecting region formed on a collecting medium, the collecting region being formed by drawing the sample gas through a cross-sectional area of the collecting medium, the collecting medium is a filter tape that includes a porous film made of a fluorine resin and a reinforcing layer provided on the porous film, the particulate matter concentration is measured using a beta-ray absorbing method while removing the error influences of naturally occurring beta radiation, and includes an additional impact type sampler or cyclone type sampler for filtering the sample gas prior to collecting the particulate matter in the collecting region.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 1, 2005
    Inventors: Masayoslhi Shinohara, Hiroshi Mizutani
  • Publication number: 20050037024
    Abstract: The object of the present invention is to provide a preventive and relieving medicine for activated matrix metalloproteinase-causing disorders and diseases, which contains a solvent extract of Ganoderma mushroom. The preventive and relieving medicine for activated matrix metalloproteinase (MMP)-causing disorders and diseases according to the present invention contains the solvent extract of Ganoderma mushroom. The solvent extract of Ganoderma mushroom has MMP inhibiting behaviors and is effective for prevention, suppression, and symptomatic relief of various activated MMP-causing disorders and diseases, such as metastasis of cancers, ulceration, rheumatoid arthritis, osteoporosis, periodontitis, and aging of skin.
    Type: Application
    Filed: September 27, 2002
    Publication date: February 17, 2005
    Inventors: Koji Hattori, Hiroshi Mizutani, Kazuhisa Osumi
  • Publication number: 20050029542
    Abstract: The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes FETs a gate electrode, a source electrode, and a drain electrode of each of which are formed on a semiconductor. The source electrode and the drain electrode are connected with the earth as well as are disposed in parallel to each other, and the gate electrode is formed between the source electrode and the drain electrode, and both the ends of the gate electrode are connected to the first input-output terminal 1 and the second input-output terminal.
    Type: Application
    Filed: December 15, 2003
    Publication date: February 10, 2005
    Inventor: Hiroshi Mizutani
  • Publication number: 20040124537
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Publication number: 20040055362
    Abstract: A highly sensitive particulate matter concentration measuring apparatus for measuring a concentration of particulate matter in a sample gas collected in a collecting region formed on a collecting medium, the collecting region being formed by drawing the sample gas through a cross-sectional area of the collecting medium, the collecting medium is a filter tape that includes a porous film made of a fluorine resin and a reinforcing layer provided on the porous film, the particulate matter concentration is measured using a beta-ray absorbing method while removing the error influences of naturally occurring beta radiation, and includes an additional impact type sampler or cyclone type sampler for filtering the sample gas prior to collecting the particulate matter in the collecting region.
    Type: Application
    Filed: June 24, 2003
    Publication date: March 25, 2004
    Inventors: Masayoshi Shinohara, Hiroshi Mizutani
  • Publication number: 20030116782
    Abstract: In a semiconductor device, a first semiconductor layer is formed on a semiconductor substrate. A second semiconductor layer is formed on a part of the first semiconductor layer, and a third semiconductor layer is formed on a part of the second semiconductor layer. A first electrode is formed on the third semiconductor layer, and a second electrode is formed on the first semiconductor layer in contact with the second semiconductor layer and apart from the semiconductor layer, thus forming a diode.
    Type: Application
    Filed: December 13, 2002
    Publication date: June 26, 2003
    Applicant: NEC CORPORATION
    Inventor: Hiroshi Mizutani
  • Patent number: 6525346
    Abstract: In a semiconductor device, a first semiconductor layer is formed on a semiconductor substrate. A second semiconductor layer is formed on a part of the first semiconductor layer, and a third semiconductor layer is formed on a part of the second semiconductor layer. A first electrode is formed on the third semiconductor layer, and a second electrode is formed on the first semiconductor layer in contact with the second semiconductor layer and apart from the semiconductor layer, thus forming a diode.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: February 25, 2003
    Assignee: NEC Corporation
    Inventor: Hiroshi Mizutani
  • Publication number: 20020149450
    Abstract: The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes FETs a gate electrode, a source electrode, and a drain electrode of each of which are formed on a semiconductor. The source electrode and the drain electrode are connected with the earth as well as are disposed in parallel to each other, and the gate electrode is formed between the source electrode and the drain electrode, and both the ends of the gate electrode are connected to the first input-output terminal 1 and the second input-output terminal.
    Type: Application
    Filed: August 11, 1999
    Publication date: October 17, 2002
    Inventor: HIROSHI MIZUTANI
  • Patent number: 6408425
    Abstract: A method of designing a circuit with a field effect transistor (FET) for operation with a large signal. The method comprises the steps of expressing the FET with a two-terminal nonlinear circuit model having a source and a drain, such that a gate terminal thereof is open in at least a frequency band used thereby, and calculating behaviors of the circuit in operation with a large signal represented by a large amplitude of an input voltage, based on the two-terminal nonlinear circuit model.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: June 18, 2002
    Assignee: NEC Corporation
    Inventor: Hiroshi Mizutani