Abstract: A high-strength steel sheet of the present invention has a specific chemical composition. Furthermore, in the steel sheet, a degree of Mn segregation in a specific region is 1.5 or less; a maximum P concentration in a specific region is 0.08 mass % or less; in a specific region, at least one specific MnS particle group is present, the number of specific MnS particle groups is 2.0 or fewer per 1 mm2, and the number of specific oxide-based inclusions is 8 or fewer per 1 mm2; of all oxide-based inclusions, oxide-based inclusions having a specific composition are present in a number ratio of 80% or greater; the microstructure includes, in terms of a volume fraction, 30 to 95% martensite, 5 to 70% ferrite phase, less than 30% (and 0% or greater) bainite, and less than 2.0% (and 0% or greater) austenite phase; and a tensile strength is 980 MPa or greater.

Abstract: This blade repair method has: a first welding step in which overlay welding in which a first welding material is used is performed to form a notched part and a bury a first region positioned on a blade-body side with a first welding material; and a second welding step in which, after the first welding step, overlay welding in which a second welding material is used is performed to form a notched part and bury a second region positioned on a front-surface side of a platform with the second welding material. The high-temperature strength of the second welding material is higher than the high-temperature strength of the first welding material, the weldability of the first welding material is higher than the weldability of the second welding material, and the second region is located in a range from 1.0 mm to 3.0 mm (inclusive) from the front surface of the platform toward the blade body.

Abstract: This blade repair method has: a first welding step in which overlay welding in which a first welding material is used is performed to form a notched part and a bury a first region positioned on a blade-body side with a first welding material; and a second welding step in which, after the first welding step, overlay welding in which a second welding material is used is performed to form a notched part and bury a second region positioned on a front-surface side of a platform with the second welding material. The high-temperature strength of the second welding material is higher than the high-temperature strength of the first welding material, the weldability of the first welding material is higher than the weldability of the second welding material, and the second region is located in a range from 1.0 mm to 3.0 mm (inclusive) from the front surface of the platform toward the blade body.

Abstract: A charge/discharge device includes: a first component to be used for power conversion; a second component to be used for power conversion, the second component generating a smaller amount of heat than the first component during operation, the second component having a lower allowable temperature than the first component; a housing to house the first component and the second component; and an internal circulation fan to circulate air inside the housing. The first component is placed below the second component. The internal circulation fan is placed above the first component and blows air to the first component.

Abstract: The present invention relates to a through electrode to be mounted on a substrate having a through hole. The through electrode includes: a penetrating part that passes through the through hole; a convex bump part that is formed on at least one end of the penetrating part and is wider than the through electrode; and a metal film that has at least one layer and is formed on a surface of the convex bump part that comes in contact with the substrate. The through electrode part and the convex bump part are formed of a sintered body prepared by sintering one or more kind of metal powder selected from gold, silver, palladium, and platinum having a purity of 99.9 wt % or more and an average particle size of 0.005 ?m to 1.0 ?m, and the metal film contains gold, silver, palladium, or platinum having a purity of 99.9 wt % or more.

Abstract: A control drive circuit provided in an FSC-LCD comprises an input stage signal processing/controlling circuit (21) which generates a synchronization signal (32) in synchronization with a frame frequency of an input image signal (30) and image data (34); a sequencer (22) which determines the number of color fields in one frame, a color signal to be allocated to each color field, and the output sequence of the allocated color signals and which generates and outputs field designation signals (38, 40) used to designate the color fields corresponding to the output sequence; and an output stage signal processing/controlling circuit (25) which receives image data (36) from the input stage signal processing/controlling circuit (21) and outputs signals to a source driver (13) and a gate driver (14), in accordance with the field designation signal (38) from the sequencer (22).

Abstract: The present invention provides a semiconductor device and a method for manufacturing thereof. The semiconductor device includes bit lines disposed in a semiconductor substrate, a first ONO disposed between the bit lines on the semiconductor substrate, and a second ONO film disposed on each of the bit lines. The film thickness of a first silicon nitride film in the first ONO film is larger than the film thickness of a second silicon nitride film in the second ONO film.

Abstract: [Issues to be Solved] Second bonding failures caused by attached oxide of additive elements on high purity Au bonding wire are to be resolved. [Solution Means] Au alloy bonding wires comprising: 5-100 wt ppm Mg, 5-20 wt ppm In, 5-20 wt ppm Al, 5-20 wt ppm Yb, and residual Au of 99.995 wt % purity or higher, and adding 5-20 wt ppm Ca, and for these alloys adding at least one element among 5-20 wt ppm La, 5-20 wt ppm Lu, 5-100 wt ppm Sn, 5-100 wt ppm Sr to the alloy, and/or, moreover, adding 0.01-1.2 wt % Pd to these alloys. Bonding wire, which contains these trace additive elements do not cause a disturbance by accumulated contamination, because of contamination, which formed at ball formation by micro discharge and at the first bonding on the tip of the capillary, transferring to the wire at second bonding.

Abstract: A semiconductor device and a method for manufacturing thereof are provided. The semiconductor device includes two epitaxial semiconductor layers formed on a semiconductor substrate, bit lines formed on upper portions of the two epitaxial semiconductor layers, and a charge storage layer formed on the semiconductor substrate between the two epitaxial semiconductor layers.

Abstract: [Issues to be Solved] Providing enhanced bonding reliability of Au alloy bonding wire with low electrical resistivity to Al electrode of semiconductor device, and its application of semiconductor device is bonded with Al electrode pad by the same wire. [Solution Means] Au alloy bonding wire comprising: 0.02-0.3 mass % Ag, total amount of 10-200 mass ppm at least one element of Ge and/or Si, and/or total amount of 10-200 mass ppm at least one element of Al and/or Cu, with residual of Au. Moreover, Al and/or Al alloy pad bonded with the above Au alloy bonding wire.

Abstract: A semiconductor memory includes first and second source regions that are formed in a semiconductor substrate and run in orthogonal directions. The first and second source regions are diffused regions and are electrically connected to each other at crossing portions thereof. The semiconductor device may further include drain regions formed in the semiconductor substrate, bit lines that run in the direction in which the second source region runs, and a source line formed above the second source region, wherein a contact between the source line and the second source region is aligned with contacts between the bit lines and drain regions formed in the semiconductor substrate.

Abstract: A semiconductor device includes bit lines (14) provided in a semiconductor substrate (10), word lines (16) provided above the bit lines and running in a width direction of the bit lines (14), metal lines (22) provided above the word lines (16) and running in a length direction of the bit lines (14), and bit line contact regions (28) running in the length direction of the word lines (16) and located between word line regions (26) in which a plurality of word lines (16) are disposed. Each of the bit lines (14) is connected with every other metal line (22) in the bit line contact regions (28). It is thus possible to provide a semiconductor device and a fabrication method therefor in which an alignment margin can be ensured between a contact hole (18) and the bit line (14) to enable downsizing of a memory cell.

Abstract: The present invention provides a semiconductor device and a method for manufacturing thereof. The semiconductor device includes bit lines disposed in a semiconductor substrate, a first ONO disposed between the bit lines on the semiconductor substrate, and a second ONO film disposed on each of the bit lines. The film thickness of a first silicon nitride film in the first ONO film is larger than the film thickness of a second silicon nitride film in the second ONO film.

Abstract: A semiconductor device and a method for manufacturing thereof are provided. The semiconductor device includes two epitaxial semiconductor layers formed on a semiconductor substrate, bit lines formed on upper portions of the two epitaxial semiconductor layers, and a charge storage layer formed on the semiconductor substrate between the two epitaxial semiconductor layers.

Abstract: Provided is a thin Au alloy bonding wire having desired strength, good bondability and stability over time, and improved circularity of a squashed ball and sphericity of a melted ball. The Au alloy bonding wire contains, in an Au alloy matrix containing 0.05 to 2 mass % in total of at least one selected from Pd and Pt of high purity in Au of high purity, as trace elements, 10 to 100 ppm by mass of Mg, 5 to 100 ppm by mass of Ce, and 5 to 100 ppm by mass of each of at least one selected from Be, Y, Gd, La, Eu and Si, the total content of Be, Y, Gd, La, Eu and Si being 5 to 100 ppm by mass, or as trace elements, Mg, Be, and at least one selected from Y, La, Eu and Si, or as trace elements, 10 to 100 ppm by mass of Mg, 5 to 30 ppm by mass of Si, 5 to 30 ppm by mass of Be, and 5 to 30 ppm by mass of at least one selected from Ca, Ce and Sn.

Abstract: A semiconductor device includes bit line's (14) provided in a semiconductor substrate (10), word lines (16) provided above the bit lines and running in a width direction of the bit lines (14), metal lines (22) provided above the word lines (16) and running in a length direction of the bit lines (14), and bit line contact regions (28) running in the length direction of the word lines (16) and located between word line regions (26) in which a plurality of word lines (16) are disposed. Each of the bit lines (14) is connected with every other metal line (22) in the bit line contact regions (28). It is thus possible to provide a semiconductor device and a fabrication method therefor in which an alignment margin can be ensured between a contact hole (18) and the bit line (14) to enable downsizing of a memory cell.

Abstract: A material for a semiconductor-mounting heat dissipation substrate comprises a copper-molybdenum rolled composite obtained by impregnating melted copper into a void between powder particles of a molybdenum powder compact to obtain a molybdenum-copper composite and then rolling the composite. In a final rolling direction of a plate material, the coefficient of linear expansion is 8.3×10?6/K at 30-800° C. The material for a semiconductor-mounting heat dissipation substrate is superior in thermal conductivity to a CMC clad material and easy in machining by a punch press. The substrate material is used as a heat dissipation substrate (13) of a ceramic package (11).

Abstract: A material for a semiconductor-mounting heat dissipation substrate comprises a copper-molybdenum rolled composite obtained by impregnating melted copper into a void between powder particles of a molybdenum powder compact to obtain a composite of molybdenum and copper and then rolling the composite. In a final rolling direction of a plate material, the coefficient of linear expansion is 8.3×10?6/K at 30–800° C. The material for a semiconductor-mounting heat dissipation substrate is superior in thermal conductivity to a CMC clad material and easy in machining by a punch press. The substrate material is used as a heat dissipation substrate (13) of a ceramic package (11).

Abstract: A semiconductor memory includes first and second source regions that are formed in a semiconductor substrate and run in orthogonal directions. The first and second source regions are diffused regions and are electrically connected to each other at crossing portions thereof. The semiconductor device may further include drain regions formed in the semiconductor substrate, bit lines that run in the direction in which the second source region runs, and a source line formed above the second source region, wherein a contact between the source line and the second source region is aligned with contacts between the bit lines and drain regions formed in the semiconductor substrate.

Abstract: A material for a semiconductor-mounting heat dissipation substrate comprises a copper-molybdenum rolled composite obtained by impregnating melted copper into a void between powder particles of a molybdenum powder compact to obtain a composite of molybdenum and copper and then rolling the composite. In a final rolling direction of a plate material, the coefficient of linear expansion is 8.3×10−6/K at 30-800° C. The material for a semiconductor-mounting heat dissipation substrate is superior in thermal conductivity to a CMC clad material and easy in machining by a punch press. The substrate material is used as a heat dissipation substrate (13) of a ceramic package (11).