Abstract: An image heating apparatus includes a rotation made of a metal, a heater to which a current is applied, whereby heat dissipates from the heater and the heater contacts an internal surface of the rotation member, and a pressure roller for pressurizing the rotation member together with the heater to form a nip, wherein the rotation member is electrically grounded via a fuse. By the virtue of the invention, it is rendered possible to suppress charging of the metal rotation member and to suppress a current leak to a main frame of an image forming apparatus.

Abstract: A plasma display panel is provided which is capable of suppressing the degradation of the fluorescent material layer by discharge and which ensures a long service life.

Abstract: In a density control apparatus capable of coping with a change in light sensitivity, an image formation device forms a toner image on a photosensitive body on the basis of an image signal, a sensor measures density of the toner image formed on the photosensitive body, a correction device causes the sensor to measure density of a portion where the toner image is not formed on the photosensitive body and corrects sensitivity of the sensor on the basis of the measured result, a setting device sets a level shifting quantity of an output signal from the sensor after the sensitivity of the sensor is corrected by the correction device, and a determination device causes to form plural images of different densities and determines an image formation condition on the basis of the result of measuring the density of the images and the shifting quantity set by the setting device.

Abstract: A photosensor includes a light emitting device, a light receiving device for receiving a side beam from said light emitting device, and a light diffusing member disposed between a side surface of said light emitting device and said light receiving device.

Abstract: An active matrix liquid crystal display is provided, wherein adjacent two odd and even pixels are commonly connected to a single signal line, and two scanning lines are allocated to one horizontal display line, two switching elements of the adjacent two odd and even pixels are respectively connected to different ones of the two scanning lines and further the odd and even display lines are opposite to each other in connections of the display lines and the switching elements.

Abstract: In a liquid crystal display apparatus, the gamma characteristics of an image signal is changed each two frames, so that a driving voltage obtained from the changed gamma characteristics is applied to a liquid crystal. A wide viewing field angle can electrically be realized.

Abstract: The present invention provides a circuitry of a liquid crystal display, comprising a plurality of signal lines extending in a first direction, a plurality of scanning lines extending in a second direction vertical to the first direction, first and second enable lines separated from each other, each of the first and second enable lines comprising a plurality of first parts extending in the first direction and between the signals lines and a second part extending in the second direction to which the first parts are connected; a plurality of pairs of first and second pixel electrodes being positioned in adjacent two pixels and also positioned at opposite sides of each of the signal lines; a series connection of first and second transistors between each of the first and second pixel electrodes and the signal line, the first transistor having a gate connected to each of the first and second enable lines while the second transistor having a gate connected to the scanning line.

Abstract: An image forming apparatus forms a patch image on a recording medium, irradiates the patch image formed on the recording medium with light, and detects a quantity of light reflected by the patch image and outputs a first detection signal. The apparatus detects a quantity of light emitted by a light emission source and outputs a second detection signal, and amplifies the first detection signal in accordance with a first amplification gain and outputs a first amplified signal. The apparatus amplifies the second detection signal in accordance with a second amplification gain and outputs a second amplified signal, and controls image forming conditions based on the first amplified signal or the second amplified signal. An adjustment mode is executed prior to controlling the image forming conditions, and the first amplification gain is controlled when the patch image is formed with black toner, and the second amplification gain is controlled when the patch image is formed with color toner.

Abstract: A gamma correcting circuit has a plurality of differential amplifiers having respective input terminals for being supplied with a video signal and respective output terminals connected in common. At least one of the differential amplifiers comprises differential pairs of transistors including transistors whose bases are not connected to the input terminal, emitters are connected to respective resistors, and collectors are connected in common. A plurality of individually energizable and de-energizable external reference voltage supplies are connected to the bases of the transistors whose bases are not connected to the input terminal.

Abstract: A density control device includes an image forming unit for forming a sample image having a predetermined density onto a recording medium, a density detecting unit for detecting the density of the surface of the recording medium, and a control unit for causing the density detecting unit to detect a first density of an area where no sample image is formed on the recording medium and a second density of an area where any sample image is formed, and determining the operation conditions of the image forming unit, based on a contrast value between the first density and the second density which have been detected.

Abstract: An improvement of the LCD driving semiconductor IC which supplies a plurality of source driving voltages (corresponding to the horizontal scanning voltage of a CRT) to a plurality of source driving lines of an active matrix type LCD of TFT base is proposed.

Abstract: An input terminal is connected to bases of first and second transistors. Collectors of the first and fourth transistors are connected to a power-source terminal. Collectors of the second and third transistors are grounded. A base of the third transistor is connected to an emitter of the first transistor. A base of the fourth transistor is connected to an emitter of the second transistor. One terminal of the capacitor is grounded and the other terminal thereof is connected to emitters of the third and fourth transistors and an input of an output buffer whose output is connected to an output terminal. A collector of a fifth transistor is connected to the power-source terminal and a base thereof is connected to the output terminal. A collector of a sixth transistor is grounded and a base thereof is connected to the output terminal. A first constant-current source is connected to an emitter of the fifth transistor and a base of the fourth transistor.

Abstract: An input terminal is connected to bases of first and second transistors. Collectors of the first and fourth transistors are connected to a power-source terminal. Collectors of the second and third transistors are grounded. A base of the third transistor is connected to an emitter of the first transistor. A base of the fourth transistor is connected to an emitter of the second transistor. One terminal of the capacitor is grounded and the other terminal thereof is connected to emitters of the third and fourth transistors and an input of an output buffer whose output is connected to an output terminal. A collector of a fifth transistor is connected to the power-source terminal and a base thereof is connected to the output terminal. A collector of a sixth transistor is grounded and a base thereof is connected to the output terminal. A first constant-current source is connected to an emitter of the fifth transistor and a base of the fourth transistor.

Abstract: A semiconductor device that has a feature in the spatial relationship between the wiring in a multi-level wiring and the intermediate insulating films. In the lower part of the second and/or subsequent levels of wiring there exist intermediate insulating films that have a pattern which is the same as the pattern of the wiring. Because of this arrangement, the intermediate insulating film does not exist between the wiring on the same level. The first structure of the multi-level wiring has the intermediate insulating films formed in wall-like shape, with the lower end of the intermediate insulating films reaching an underlying insulating layer formed on the surface of the semiconductor substrate. The second structure of the multi-level wiring is a quasi air gap metallization structure.

Abstract: An interlayer connection structure for an integrated circuit includes a substrate, a first level horizontal conductor formed on the substrate, an interlayer insulator formed to cover the first level conductor, a second level horizontal conductor formed on the interlayer insulator, and a vertical conductive pillar extending through the interlayer insulator for interconnecting the first level horizontal conductor and the second level horizontal conductor. The vertical conductive pillar has a side surface coplanar with a longitudinal side surface of the first level horizontal conductor at a position where the vertical conductive pillar is in electric contact with the first level horizontal conductor.

Abstract: A driver for an active matrix type liquid crystal display device includes a CMOS transfer switch group capable of arbitrarily selecting a drive reference voltage, a CMOS transfer switch for transferring a drive reference voltage selected by the CMOS transfer switch group to a driver output terminal, and an operational amplifier connected in the form of a voltage follower. The liquid crystal driver output voltage quickly reaches an arbitrarily selected drive reference voltage, and a stable voltage coinciding with the reference voltage can be applied to the liquid crystal display device.

Abstract: An integrated circuit device of large scale integration and a method of manufacturing the same makes possible high density packing of circuit elements by eliminating a great number of very minute contact holes. Instead, a circuit-element connector comprised of a polycrystalline silicon wiring path is formed by selective oxidation. Impurity atoms are introduced into the semiconductor substrate through the polycrystalline silicon circuit-element connector to form a desired circuit element. A layer of high-conductive material is provided on the polycrystalline silicon layer.

Abstract: A semiconductor device having a bipolar transistor with a trench is disclosed. An active region of the substrate is surrounded by the trench. Collector, base and emitter regions of the transistor are formed in the active region. A collector electrode is formed in a lower section of the trench, and a base electrode is formed in an upper section of the identical trench.

Abstract: A semiconductor integrated circuit includes a semiconductor substrate, a plurality of logic gates formed in the semiconductor substrate, power source wiring and ground wiring formed on the semiconductor substrate to supply power source voltage to the logic gates and a capacitor formed on the semiconductor substrate and distributively connected between the power source wiring and the ground wirings.

Abstract: A semiconductor memory of a Bi-CMOS construction is disclosed. The memory includes a plurality of cell blocks connected in common to a pair of main-bit lines. Each of the cell blocks includes a plurality of word lines, a pair of pre-bit lines, a plurality of memory cell each connected to one of the word lines and to the pre-bit lines, and a pair of bipolar transistors having the respective bases connected to the pre-bit lines and the respective collector-emitter current paths connected in series between the main-bit lines. One of the bipolar transistors is turned ON in response to data stored in a selected memory cell to discharge the associated main-bit line. The discharging of the pre-bit line and the main-bit line is thus carried out rapidly to increase data read operation speed.