Patents by Inventor Hiroshi Terao

Hiroshi Terao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12155168
    Abstract: A line narrowing gas laser device includes a line narrowing device, an output coupling mirror, a laser chamber arranged on an optical path of an optical resonator, a first holder which supports the output coupling mirror, a second holder which supports the first holder to be rotatable about a rotation axis of the first holder, and an adjustment device supported by the second holder and being in contact with the first holder to rotate the first holder about the rotation axis. The line narrowing device has a characteristic of changing, into a first direction, beam pointing of laser light output toward the output coupling mirror when temperature inside the line narrowing device rises. The second holder and the adjustment device rotate the first holder in a direction in which a change in the first direction in the beam pointing of the laser light is suppressed by thermal expansion.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: November 26, 2024
    Assignee: Gigaphoton Inc.
    Inventors: Yusuke Saito, Masanori Yashiro, Hiroshi Furusato, Yosuke Watanabe, Tokinori Terao
  • Publication number: 20240279499
    Abstract: A dispersant-containing liquid of the present disclosure contains anionic water-soluble polyester containing a carboxylate and/or a sulfonate, polyalkylene glycols, and water. When a content of the water-soluble polyester in the dispersant-containing liquid is defined as XPEs [mass %] and a content of the polyalkylene glycols in the dispersant-containing liquid is defined as XPAG [mass %], it is preferable that Expression (4) be satisfied. 0.01 ? XPAG / XPEs ? 2.
    Type: Application
    Filed: February 14, 2024
    Publication date: August 22, 2024
    Inventors: Tomoya IWASAKI, Kenji KITADA, Koichi TERAO, Hajime KAKISHITA, Hiroshi ITO
  • Publication number: 20240071580
    Abstract: A medical information processing apparatus includes a hardware processor that sets first checking authority and second checking authority. The first checking authority is authority to check an interpretation report created by a first user who has interpreted a medical image of a subject. The second checking authority is authority to check the interpretation report and is different from the first checking authority.
    Type: Application
    Filed: August 3, 2023
    Publication date: February 29, 2024
    Applicant: KONICA MINOLTA, INC.
    Inventor: Hiroshi TERAO
  • Publication number: 20240067763
    Abstract: The solid titanium catalyst component (I) of the present invention contains titanium, magnesium, halogen, and a cyclic multiple-ester-group-containing compound (a) represented by the following formula (1).
    Type: Application
    Filed: August 26, 2021
    Publication date: February 29, 2024
    Applicant: MITSUI CHEMICALS, INC.
    Inventors: Takashi KIMURA, Makoto ISOGAI, Yasushi NAKAYAMA, Kenji MICHIUE, Takashi JINNAI, Wataru YAMADA, Shotaro TAKANO, Hiroshi TERAO, Takaaki YANO, Yoshiyuki TOTANI, Sunil Krzysztof MOORTHI, Takashi NAKANO
  • Publication number: 20240067764
    Abstract: A solid titanium catalyst component (I) for olefin polymer production contains titanium, magnesium, halogen, and a cyclic multiple-ester-group-containing compound (a) represented by the formula (1). Preferably, a propylene polymer that is obtained by the olefin polymerization method and has specific thermal properties as determined primarily by differential scanning calorimetry (DSC).
    Type: Application
    Filed: December 21, 2021
    Publication date: February 29, 2024
    Applicant: MITSUI CHEMICALS, INC.
    Inventors: Takashi KIMURA, Makoto ISOGAI, Yasushi NAKAYAMA, Kenji MICHIUE, Takashi JINNAI, Wataru YAMADA, Shotaro TAKANO, Hiroshi TERAO, Takaaki YANO, Yoshiyuki TOTANI, Sunil Krzysztof MOORTHI, Takashi NAKANO
  • Publication number: 20230197247
    Abstract: A radiographic interpretation management apparatus includes a hardware processor. The hardware processor is configured to obtain an automatically generated finding obtained by computer processing on medical information, obtain a radiographic interpretation finding created by a user based on the medical information, and be able to set by user operation a combination that is to be displayed with highlight among combinations of a result of the automatically generated finding and a result of the radiographic interpretation finding.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 22, 2023
    Inventors: Hiroshi TERAO, Ken SATOU, Shinsuke KATSUHARA
  • Patent number: 7915358
    Abstract: Copolymers when used as lubricating oil viscosity modifiers enable lubricating oils to show excellent low-temperature properties. Processes for producing the copolymers are disclosed. Lubricating oil viscosity modifiers and lubricating oil compositions contain the copolymers. A copolymer includes structural units derived from ethylene and structural units derived from a C3-20 ?-olefin and satisfies the following requirements (1) to (8): (1) the melting point (Tm) according to DSC is in the range of 0 to 60° C.; (2) the melting point (Tm) and the density D (g/cm3) satisfy the equation: Tm?1073×D?893; (3) Mw/Mn according to GPC is from 1.6 to 5.0; (4) the half-value width (?Thalf) of a melting peak measured by DSC is not more than 90° C.; (5) the half-value width (?Thalf) and the melting point (Tm) satisfy the equation: ?Thalf??0.71×Tm+101.4; (6) the heat of fusion (?H) as measured by DSC is not more than 60 J/g; (7) the crystallization temperature (Tc) measured by DSC is not more than 70° C.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: March 29, 2011
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Satoshi Ikeda, Akihiro Matsuda, Yoshiki Shimokawatoko, Junichi Mohri, Toshiyuki Shimazaki, Hiroshi Terao, Koji Takeda
  • Patent number: 7750478
    Abstract: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: July 6, 2010
    Assignees: Sanyo Electric Co., Ltd., Kabushiki Kaisha Toshiba, Fujitsu Microelectronics Limited, NEC Corporation
    Inventors: Koujiro Kameyama, Akira Suzuki, Yoshio Okayama, Mitsuo Umemoto, Kenji Takahashi, Hiroshi Terao, Masataka Hoshino
  • Patent number: 7732925
    Abstract: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: June 8, 2010
    Assignees: SANYO Electric Co., Ltd., Kabushiki Kaisha Toshiba, Fujitsu Microelectronics Limited, NEC Corporation
    Inventors: Yoshio Okayama, Akira Suzuki, Koujiro Kameyama, Mitsuo Umemoto, Kenji Takahashi, Hiroshi Terao, Masataka Hoshino
  • Publication number: 20090234073
    Abstract: An ?-olefin/non-conjugated cyclic polyene copolymer (A) includes structural units (I) derived from an ?-olefin and structural units (H) derived from a vinyl group-containing cyclic olefin. The copolymer has a molecular weight distribution (Mw/Mn) of not more than 2.7 and is amorphous or low crystalline with a crystalline heat of fusion (?H) of less than 90 kJ/kg. The copolymer is efficiently produced using a specific transition metal catalyst that has a ligand with a phenoxyimine skeleton. The copolymer of the invention has a narrower molecular weight distribution and a higher content of vinyl groups as compared with existing copolymers. The copolymer can then give crosslinked products having excellent tensile properties. The copolymer is also used as a plasticizer for polymers such as rubbers, and provides excellent processability and superior mechanical strength and rubber elasticity of crosslinked products.
    Type: Application
    Filed: May 10, 2006
    Publication date: September 17, 2009
    Applicant: Mitsui Chemicals, Inc.
    Inventors: Shigekazu Matsui, Sadahiko Matsuura, Haruyuki Makio, Seiichi Ishii, Hiroshi Terao, Hidetatsu Murakami, Takashi Hakuta, Terunori Fujita
  • Publication number: 20090209721
    Abstract: Copolymers when used as lubricating oil viscosity modifiers enable lubricating oils to show excellent low-temperature properties. Processes for producing the copolymers are disclosed. Lubricating oil viscosity modifiers and lubricating oil compositions contain the copolymers. A copolymer includes structural units derived from ethylene and structural units derived from a C3-20 ?-olefin and satisfies the following requirements (1) to (8): (1) the melting point (Tm) according to DSC is in the range of 0 to 60° C.; (2) the melting point (Tm) and the density D (g/cm3) satisfy the equation: Tm?1073×D?893; (3) Mw/Mn according to GPC is from 1.6 to 5.0; (4) the half-value width (?Thalf) of a melting peak measured by DSC is not more than 90° C.; (5) the half-value width (?Thalf) and the melting point (Tm) satisfy the equation: ?Thalf??0.71×Tm+101.4; (6) the heat of fusion (?H) as measured by DSC is not more than 60 J/g; (7) the crystallization temperature (Tc) measured by DSC is not more than 70° C.
    Type: Application
    Filed: February 13, 2009
    Publication date: August 20, 2009
    Inventors: Satoshi Ikeda, Akihiro Matsuda, Yoshiki Shimokawatoko, Junichi Mohri, Toshiyuki Shimazaki, Hiroshi Terao, Koji Takeda
  • Publication number: 20090098410
    Abstract: Disclosed is a trimethine dimer compound represented by the following general formula (I) and optical recording medium containing such a compound in a recording layer. (I)(In the formula, symbols are as in the description. When both Xa2 and Xb2 are imino groups, one of Xa1, Xb1, Xa3 and Xb3 is necessarily a 1-alkyl-1-benzylmethylene group which may have a substituent, a 1,1-dibenzylmethylene group which may have a substituent or a cycloalkane-1,1-diyl group having 3 to 6 carbon atoms which may have a substituent.
    Type: Application
    Filed: May 16, 2006
    Publication date: April 16, 2009
    Applicant: Mitsui Chemicals, Inc.
    Inventors: Taizo Nishimoto, Eiichi Takahashi, Shunsuke Murayama, Yoshiaki Aso, Akira Ogiso, Akihiro Kohsaka, Takafumi Yoshida, Hiroyuki Sasaki, Kenichi Kato, Hiroshi Terao, Yojiro Kumagae
  • Patent number: 7416963
    Abstract: This invention offers a manufacturing method to reduce a manufacturing cost of a semiconductor device having a through-hole electrode by simplifying a manufacturing process and to enhance yield of the semiconductor device. A first insulation film is formed on a top surface of a semiconductor substrate. A part of the first insulation film is etched to form an opening in which a part of the semiconductor substrate is exposed. Then a pad electrode is formed in the opening and on the first insulation film. A second insulation film is formed on a back surface of the semiconductor substrate. Then a via hole having an aperture larger than the opening is formed. And a third insulation film is formed in the via hole and on the second insulation film. The third insulation film on a bottom of the via hole is etched to expose the pad electrode. After that, a through-hole electrode and a wiring layer are formed in the via hole.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: August 26, 2008
    Inventors: Mitsuo Umemoto, Yoshio Okayama, Kazumasa Tanida, Hiroshi Terao, Yoshihiko Nemoto
  • Publication number: 20080091033
    Abstract: The object is to provide a novel nonsolvate-form crystal of polymethine compound which has good stability in solution, shows a high gram extinction coefficient, is excellent in storage stability, is easy to handle and is highly sensitive to general-purpose semiconductor lasers. Thus are provided a nonsolvate-form crystal of a polymethine compound of the formula (I) and a process for producing the nonsolvate-form crystal of polymethine compound of formula (I) which comprises reacting a polymethine ether compound of the formula (II) given below with p-toluenesulfonic acid. (In the above formula, TsO represents the p-toluenesulfonic acid residue.) (In the above formula, R represents an alkyl group, an alkoxyalkyl group or an optionally substituted aryl group.
    Type: Application
    Filed: December 9, 2005
    Publication date: April 17, 2008
    Applicant: YAMAMOTO CHEMICALS, INC.
    Inventors: Shigeo Fujita, Keiki Chichiishi, Sayuri Wada, Tsunehito Eda, Hiroshi Terao
  • Patent number: 7332261
    Abstract: A phthalocyanine compound represented by the following general formula (I) and the mixture thereof, and an optical recording medium containing the compound/mixture in its recording layer. wherein in formula (I), M is two hydrogen atoms, a divalent metal atom, a mono-substituted trivalent metal atom, a di-substituted tetravalent metal atom, or an oxymetal, and L1, L2, L3 and L4 are each independently formula (a), formula (b), or formula (c): wherein X, Y, Z and R are defined.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: February 19, 2008
    Assignee: Ciba Specialty Chemicals Corporation
    Inventors: Kazuhiro Seino, Shinichi Nakagawa, Tsutami Misawa, Satoshi Kinoshita, Akihiro Kosaka, Hiroshi Terao, Yojiro Kumagae
  • Publication number: 20070249158
    Abstract: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
    Type: Application
    Filed: June 12, 2007
    Publication date: October 25, 2007
    Applicants: SANYO ELECTRIC CO., LTD., Kabushiki Kaisha Toshiba, Fujitsu Limited, NEC Corporation
    Inventors: Yoshio Okayama, Akira Suzuki, Koujiro Kameyama, Mitsuo Umemoto, Kenji Takahashi, Hiroshi Terao, Masataka Hoshino
  • Patent number: 7094701
    Abstract: A manufacturing method of a semiconductor device having a through-hole electrode is offered to improve reliability and yield of the semiconductor device. A via hole penetrating through a semiconductor substrate is formed at a location corresponding to a pad electrode. An insulation film is formed on a back surface of the semiconductor substrate and a surface of the via hole. A reinforcing insulation film having an overhung portion at a rim of the via hole is formed on the back surface of the semiconductor substrate. The insulation film on a bottom of the via hole is removed by etching using the reinforcing insulation film as a mask, while the insulation film on a side wall of the via hole remains. The through-hole electrode, a wiring layer and a conductive terminal are formed on the back surface of the semiconductor substrate and the via hole. Finally, the semiconductor substrate is divided into a plurality of semiconductor dice by dicing.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: August 22, 2006
    Assignees: Sanyo Electric Co., Ltd., Fujitsu Limited, NEC Corporation
    Inventors: Mitsuo Umemoto, Masataka Hoshino, Hiroshi Terao
  • Publication number: 20060033168
    Abstract: This invention offers a manufacturing method to reduce a manufacturing cost of a semiconductor device having a through-hole electrode by simplifying a manufacturing process and to enhance yield of the semiconductor device. A first insulation film is formed on a top surface of a semiconductor substrate. A part of the first insulation film is etched to form an opening in which a part of the semiconductor substrate is exposed. Then a pad electrode is formed in the opening and on the first insulation film. A second insulation film is formed on a back surface of the semiconductor substrate. Then a via hole having an aperture larger than the opening is formed. And a third insulation film is formed in the via hole and on the second insulation film. The third insulation film on a bottom of the via hole is etched to expose the pad electrode. After that, a through-hole electrode and a wiring layer are formed in the via hole.
    Type: Application
    Filed: July 15, 2005
    Publication date: February 16, 2006
    Applicants: SANYO ELECTRIC CO., LTD., ROHM CO., LTD., NEC Corporation, Renesas Technology Corp.
    Inventors: Mitsuo Umemoto, Yoshio Okayama, Kazumasa Tanida, Hiroshi Terao, Yoshihiko Nemoto
  • Publication number: 20060024966
    Abstract: A manufacturing method of a semiconductor device having a through-hole electrode is offered to improve reliability and yield of the semiconductor device. A via hole penetrating through a semiconductor substrate is formed at a location corresponding to a pad electrode. An insulation film is formed on a back surface of the semiconductor substrate and a surface of the via hole. A reinforcing insulation film having an overhung portion at a rim of the via hole is formed on the back surface of the semiconductor substrate. The insulation film on a bottom of the via hole is removed by etching using the reinforcing insulation film as a mask, while the insulation film on a side wall of the via hole remains. The through-hole electrode, a wiring layer and a conductive terminal are formed on the back surface of the semiconductor substrate and the via hole. Finally, the semiconductor substrate is divided into a plurality of semiconductor dice by dicing.
    Type: Application
    Filed: July 15, 2005
    Publication date: February 2, 2006
    Applicants: SANYO ELECTRIC CO., LTD, NEC Corporation, Fujitsu Limited
    Inventors: Mitsuo Umemoto, Masataka Hoshino, Hiroshi Terao
  • Publication number: 20050201265
    Abstract: A phthalocyanine compound represented by the following general formula (I) and the mixture thereof, and an optical recording medium containing the compound/mixture in its recording layer. wherein in formula (I), M is two hydrogen atoms, a divalent metal atom, a mono-substituted trivalent metal atom, a di-substituted tetravalent metal atom, or an oxymetal, and L1, L2, L3 and L4 are each independently formula (a), formula (b), or formula (c): wherein X, Y, Z and R are defined.
    Type: Application
    Filed: February 14, 2003
    Publication date: September 15, 2005
    Applicants: Mitsui Chemicals, Inc., Yamamota Chemicals, Inc.
    Inventors: Kazuhiro Seino, Shinichi Nakagawa, Tsutami Misawa, Satoshi Kinoshita, Akihiro Kosaka, Hiroshi Terao, Yojiro Kumagae