Patents by Inventor Hiroshige Goto
Hiroshige Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080251822Abstract: According to an aspect of the invention, there is provided an amplification-type solid-state image sensing device which uses a semiconductor substrate formed by epitaxially depositing an n-type semiconductor layer on a p-type semiconductor substrate and has a photoelectric conversion unit formed in the n-type semiconductor layer including a first p-type semiconductor layer which is formed under the photoelectric conversion unit of at least one of a G pixel portion and a B pixel portion a second p-type semiconductor layer which is formed to surround the photoelectric conversion unit together with the first p-type semiconductor layer and has a depth up to the first p-type semiconductor layer and a third p-type semiconductor layer which is formed to surround an R pixel portion and has a depth up to the p-type semiconductor substrate.Type: ApplicationFiled: October 3, 2007Publication date: October 16, 2008Inventors: Tetsuya Yamaguchi, Hiroshige Goto
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Publication number: 20080012088Abstract: An n/p?/p+ substrate where a p?-type epitaxial layer and an n-type epitaxial layer have been deposited on a p+-type substrate is provided. In the surface region of the n-type epitaxial layer, the n-type region of a photoelectric conversion part has been formed. Furthermore, a barrier layer composed of a p-type semiconductor region has been formed so as to enclose the n-type region of the photoelectric conversion part in a plane and reach the p?-type epitaxial layer from the substrate surface. A p-type semiconductor region has also been formed at a chip cutting part for dividing the substrate into individual devices so as to reach the p?-type epitaxial layer from the substrate surface.Type: ApplicationFiled: July 12, 2007Publication date: January 17, 2008Inventors: Tetsuya YAMAGUCHI, Hiroshige Goto, Hirofumi Yamashita, Ikuko Inoue, Nagataka Tanaka, Hisanori Ihara
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Patent number: 7259412Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.Type: GrantFiled: April 1, 2005Date of Patent: August 21, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuya Yamaguchi, Hiroshige Goto, Masayuki Ayabe, Hisanori Ihara
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Publication number: 20070187732Abstract: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under the second semiconductor region, connected to the second semiconductor region, and accumulates signal charges in accordance with an incident light. A fourth semiconductor region is formed in the surface region of the first semiconductor region between the drain region and source region. Moreover, these source region, drain region, second semiconductor region, and third semiconductor region constitute a pixel, and different voltages are supplied to the drain region in an accumulation period of the signal charges in the pixel, signal readout period, and discharge period of the signal charges.Type: ApplicationFiled: March 26, 2007Publication date: August 16, 2007Inventor: Hiroshige GOTO
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Publication number: 20070187788Abstract: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under the second semiconductor region, connected to the second semiconductor region, and accumulates signal charges in accordance with an incident light. A fourth semiconductor region is formed in the surface region of the first semiconductor region between the drain region and source region. Moreover, these source region, drain region, second semiconductor region, and third semiconductor region constitute a pixel, and different voltages are supplied to the drain region in an accumulation period of the signal charges in the pixel, signal readout period, and discharge period of the signal charges.Type: ApplicationFiled: March 26, 2007Publication date: August 16, 2007Inventor: Hiroshige GOTO
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Patent number: 7236197Abstract: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under the second semiconductor region, connected to the second semiconductor region, and accumulates signal charges in accordance with an incident light. A fourth semiconductor region is formed in the surface region of the first semiconductor region between the drain region and source region. Moreover, these source region, drain region, second semiconductor region, and third semiconductor region constitute a pixel, and different voltages are supplied to the drain region in an accumulation period of the signal charges in the pixel, signal readout period, and discharge period of the signal charges.Type: GrantFiled: November 13, 2002Date of Patent: June 26, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshige Goto
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Publication number: 20070108487Abstract: A solid-state image pickup device includes a semiconductor substrate including a substrate main body having P-type impurities and a first N-type semiconductor layer provided on the substrate main body, an image pickup area including a plurality of photoelectric converters in which the plurality of photoelectric converters include second N-type semiconductor layers, the second N-type semiconductor layers being provided on a surface portion of the first N-type semiconductor layer independently of one another, and a first peripheral circuit area including a first P-type semiconductor layer formed on the first N-type semiconductor layer. The solid-state image pickup device further includes a second peripheral circuit area including a second P-type semiconductor layer formed on the first N-type semiconductor layer and connected to the substrate main body.Type: ApplicationFiled: November 9, 2006Publication date: May 17, 2007Inventors: Ikuko Inoue, Hiroshige Goto, Hirofumi Yamashita, Hisanori Ihara, Nagataka Tanaka, Tetsuya Yamaguchi
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Publication number: 20070097240Abstract: A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.Type: ApplicationFiled: October 26, 2006Publication date: May 3, 2007Inventors: Yoshitaka Egawa, Ryuta Okamoto, Shinji Ohsawa, Hiroshige Goto
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Patent number: 7166828Abstract: A solid-state image sensing device including an image sensing region in which a matrix of unit pixels, each including a photodiode in a surface portion of a semiconductor substrate, is provided; a read transistor connected between a respective photodiode and a detection node; an amplifying transistor connected to the detection node so as to amplify the signal charge output to the detection node and to output a pixel signal to a signal output line reading out the pixel signal output; a reset transistor connected to the detection node and to a discharge node; and an address transistor connected to a source of the amplifying transistor for selecting an address of the photodiode when an address signal is supplied to a gate.Type: GrantFiled: March 24, 2005Date of Patent: January 23, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuya Yamaguchi, Hiroshige Goto
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Patent number: 7140545Abstract: An optical reading device optically reads information on a surface. The optical reading device includes a contact detection unit, a reading unit, and a signal processing unit. The contact detection unit provides a signal when the optical reading device is within a threshold distance of a surface having information. The reading unit includes a light source unit and a light detection unit, wherein the light source unit irradiates light on the surface and the light detection unit detects light reflected from the surface, based on the signal from the contact detection unit. The signal processing unit identifies the information based on analyzing the light reflected from the surface. In addition, the optical reading device may be implemented in a mobile communications device, which also includes a transmitting unit that transmits the information identified by the signal processing unit.Type: GrantFiled: April 29, 2002Date of Patent: November 28, 2006Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshige Goto
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Publication number: 20060219867Abstract: A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface portiType: ApplicationFiled: March 30, 2006Publication date: October 5, 2006Inventors: Tetsuya Yamaguchi, Hiroshige Goto, Hirofumi Yamashita, Hisanori Ihara, Ikuko Inoue, Nagataka Tanaka
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Publication number: 20060082669Abstract: Each of the unit cells provided on a semiconductor substrate of a solid-state imaging device comprises a first p-type well which isolates the semiconductor substrate into an n-type photoelectric conversion region, a second p-type well which is formed in the surface of the photoelectric conversion region and in which a signal scanning circuit section is formed, and a signal storage section which is comprised of a highly doped n-type layer which is formed in the surface of the photoelectric conversion region apart from the second p-type well and higher in impurity concentration than the photoelectric conversion region. The signal storage section having its part placed under a signal readout gate adapted to transfer a packet of signal charge from the storage section to the signal scanning circuit section and its part at which the potential becomes deepest located under the readout gate.Type: ApplicationFiled: October 18, 2005Publication date: April 20, 2006Inventors: Ikuko Inoue, Hirofumi Yamashita, Nagataka Tanaka, Hisanori Ihara, Tetsuya Yamaguchi, Hiroshige Goto
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Publication number: 20060082668Abstract: A solid-state imaging device has an imaging region in which unit cells, each of which includes a photoelectric conversion section and a signal scanning circuit section, are disposed on a semiconductor substrate in a two-dimensional manner. The signal scanning circuit section is composed of a plurality of transistors. At least part of a gate contact of each transistor in the signal scanning circuit section is formed on an active region of each transistor.Type: ApplicationFiled: October 18, 2005Publication date: April 20, 2006Inventors: Ikuko Inoue, Hiroshige Goto
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Publication number: 20060046369Abstract: A solid-state image sensor having a well of a first conductivity type; a photoelectric conversion region having a second conductivity type formed in the well storing charges obtained from a photoelectric conversion; a drain region having the second conductivity type formed in the well apart from a surface of the well; and a gate electrode formed on the surface of the well via a gate insulator, the gate electrode transferring the charges from the photoelectric conversion region to the drain region.Type: ApplicationFiled: August 25, 2005Publication date: March 2, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hisanori Ihara, Nagataka Tanaka, Hiroshige Goto
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Patent number: 6982759Abstract: A solid-state imaging device comprising an imaging area having unit cells, a vertical driving circuit, signal processing circuits, a horizontal driving circuit, and an output circuit. Each of the unit cells including first and second photoelectric conversion/storage sections, first and second charge readout circuits, a potential detecting circuit, a reset circuit, and an address circuit. The solid-state imaging device has a first operation mode in which the first and second charge readout circuits are driven at substantially the same timing by the vertical driving circuit, the charges stored in the first and second photoelectric conversion/storage sections are transferred to and added together in the charge detecting section, and the potential detecting circuit detects the added charges, generates and transmits a potential corresponding to an amount of detected charges to the vertical signal line, and outputs the potential from the output circuit via the signal processing circuits.Type: GrantFiled: March 26, 2001Date of Patent: January 3, 2006Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshige Goto
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Publication number: 20050242385Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.Type: ApplicationFiled: April 1, 2005Publication date: November 3, 2005Inventors: Tetsuya Yamaguchi, Hiroshige Goto, Masayuki Ayabe, Hisanori Ihara
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Publication number: 20050218436Abstract: A solid-state image sensing device including an image sensing region in which a matrix of unit pixels, each including a photodiode in a surface portion of a semiconductor substrate, is provided; a read transistor connected between a respective photodiode and a detection node; an amplifying transistor connected to the detection node so as to amplify the signal charge output to the detection node and to output a pixel signal to a signal output line reading out the pixel signal output; a reset transistor connected to the detection node and to a discharge node; and an address transistor connected to a source of the amplifying transistor for selecting an address of the photodiode when an address signal is supplied to a gate.Type: ApplicationFiled: March 24, 2005Publication date: October 6, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tetsuya Yamaguchi, Hiroshige Goto
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Publication number: 20050162537Abstract: According to an aspect of the invention, there is provided a solid-state imaging device which discharges a signal from a photodiode in each cell in which the photodiode, a read gate reading a signal from the photodiode and a detector detecting a read signal are two-dimensionally arranged on a semiconductor substrate, then stores a signal in each photodiode, and reads a signal from each photodiode after a storage time. The device comprises a circuit performing an operation of applying to each corresponding cell a first pulse used to discharge a signal in each photodiode corresponding to one horizontal line for a plurality of horizontal lines in a first horizontal scanning period, and an operation of applying to each diode corresponding cell a second pulse used to read a signal in each photodiode corresponding to one horizontal lines for a plurality of horizontal lines in a second horizontal scanning period.Type: ApplicationFiled: December 22, 2004Publication date: July 28, 2005Inventors: Yoshitaka Egawa, Hiroshige Goto
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Publication number: 20050151867Abstract: A solid-state image pickup device includes a photodiode, a floating gate transistor, a control circuit, a switching circuit, a reset circuit, and a potential sensing circuit. The photodiode collects and stores signal charges generated in accordance with an amount of incident light. The floating gate transistor has a gate that is placed into one of a floating state and a connecting state and a channel formed under the gate. The channel stores the signal charges. The control circuit controls a transfer of the signal charges between the photodiode and the floating gate transistor. The switching circuit switches the gate of the floating gate transistor from the connecting state to the floating state with given timing. The reset circuit releases the signal charges from the channel of the floating gate transistor. The potential sensing circuit senses a potential of the gate of the floating gate transistor.Type: ApplicationFiled: December 16, 2004Publication date: July 14, 2005Inventors: Hiroshige Goto, Ikuko Inoue
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Patent number: 6657177Abstract: In an amplification type solid-state imaging device, output signals of unit cells Pij arranged in a selected row (horizontal line) in the imaging area are read out in sequence and then the average level of the output signals of the unit cells is detected and stored temporarily in a memory. The integrating time of photodiodes in unit cells in each row is set based on the average output level for that row of one frame before, thereby allowing the dynamic range to be expanded on a row-by-row basis without making more complex than necessary the arrangement of the solid-state imaging device.Type: GrantFiled: July 6, 2001Date of Patent: December 2, 2003Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshige Goto