Patents by Inventor Hirotaka Tamura
Hirotaka Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11468287Abstract: Storage devices each hold corresponding one of n weight coefficient groups obtained by dividing weight coefficients such that each group includes weight coefficients about at least two bits. Bit value calculation circuits each output a result (flag information) by determining whether to accept updating about each of the bits based on the weight coefficient group, a value of an updated bit, identification information, and thermal excitation energy and an updated value of an accepted bit whose uprate has been accepted. First selection circuits each select an accepted bit based on the flag information and output a state signal including the flag information, the updated value, and identification information associated with the accepted bit. A second selection circuit determines the updated bit based on the flag information in the state signal and supplies the value of the updated bit and the identification information to each of optimization apparatuses.Type: GrantFiled: July 22, 2019Date of Patent: October 11, 2022Assignee: FUJITSU LIMITEDInventor: Hirotaka Tamura
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Patent number: 11461432Abstract: An information processing device includes: a memory configured to hold values of state variables included in an evaluation function presenting energy and a weight value for each set of the state variables; and a processor coupled to the memory and configured to: calculate an energy change value when each of the values of the state variables is set as a next change candidate based on the values of the state variables and the weight value; calculate a total energy change value by adding a penalty value according to an excess amount violating an inequality constraint, to each of the energy change values calculated for the state variables, the excess amount being calculated based on a coupling coefficient and a threshold value; and change any value of the state variables in the memory based on a set temperature value, a random number value, and the total energy change values.Type: GrantFiled: May 29, 2020Date of Patent: October 4, 2022Assignee: FUJITSU LIMITEDInventors: Hirotaka Tamura, Makiko Konoshima
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Publication number: 20220283733Abstract: An optimization apparatus includes a memory and a processor. The memory stores one or more coupling coefficients that represent interaction of a plurality of variables corresponding to a plurality of bits included in an energy function. The processor selects, based on a difference of a value of the energy function associated with inversion of a value of each of the plurality of bits, adoption or rejection of bit inversion to perform optimization. The processor specifies a coupling coefficient corresponding to an auxiliary variable from the one or more coupling coefficients, the auxiliary variable being a product of variables corresponding to respective bits from which a variable corresponding to a specific bit in the energy function is excluded, and executes calculation of a term of a third-order or higher of a difference associated with inversion of the specific bit using the auxiliary variable and the coupling coefficient.Type: ApplicationFiled: December 7, 2021Publication date: September 8, 2022Applicant: FUJITSU LIMITEDInventors: Makiko KONOSHIMA, Hirotaka TAMURA
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Patent number: 11422515Abstract: An information processing device includes: a memory; and a processor coupled to the memory and configured to calculate, for a plurality of bits corresponding to a plurality of spins included in an Ising model obtained by converting a problem to be calculated, in a case where the plurality of bits is divided into a plurality of groups, on the basis of a first local field value for a first bit having a value of 1 and a second local field value for a second bit having a value of 0 among a plurality of bits included in each of the plurality of groups, a first energy change of the Ising model due to a change of the value of the first bit from 1 to 0 and a change of the value of the second bit from 0 to 1.Type: GrantFiled: April 2, 2020Date of Patent: August 23, 2022Assignee: FUJITSU LIMITEDInventors: Kouichi Kanda, Hirotaka Tamura, Yasuhiro Watanabe
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Publication number: 20220229952Abstract: An information processing apparatus includes one or more memories; and one or more processors coupled to the one or more memories and the one or more processors configured to decompose a first matrix of a coupling coefficient which represents interaction between a plurality of variables into a plurality of matrices by using a rank number, obtain, from the plurality of matrices, a second element that corresponds to a first element of the coupling coefficient, and restore the first element based on the second element.Type: ApplicationFiled: October 27, 2021Publication date: July 21, 2022Applicant: FUJITSU LIMITEDInventors: Makiko Konoshima, Hirotaka Tamura
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Patent number: 11334646Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: hold values of a plurality of state variables included in an evaluation function representing energy, and outputs, every certain number of trials, the values of the plurality of state variables; compute, when a state transition occurs in response to changing of one of the values of the plurality of state variables, an energy change value for each state transition based on a weight value selected based on an update index value; and determine a first offset value based on a plurality of the energy change values such that at least one of the state transitions is allowed, outputs a plurality of first evaluation values obtained by adding the first offset value to the plurality of energy change values, and outputs, every certain number of trials, the first offset value.Type: GrantFiled: February 20, 2020Date of Patent: May 17, 2022Assignee: FUJITSU LIMITEDInventors: Aki Dote, Hirotaka Tamura
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Patent number: 11275995Abstract: An individual ising device connected to common buses includes neuron circuits, a memory, and a router. The memory holds connection destination information per neuron circuit. An individual item of connection destination information includes first address information identifying one of a plurality of connection destination neuron circuits of a neuron circuit and second address information identifying a first ising device including at least one of the connection destination neuron circuits, the first and second address information being correlated.Type: GrantFiled: May 31, 2017Date of Patent: March 15, 2022Assignee: FUJITSU LIMITEDInventors: Sanroku Tsukamoto, Hirotaka Tamura, Satoshi Matsubara
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Patent number: 11188044Abstract: An optimization device includes a plurality of calculation circuits; a selection circuit; an identification information calculation circuit, and an updating circuit. Each of the plurality of calculation circuits calculates, for a plurality of bits corresponding to a plurality of spins included in an Ising model obtained by converting a problem to be calculated, a first energy change of the Ising model due to a value of a first bit having the value of 1 being changed from 1 to 0 and a value of a second bit having the value of 0 being changed from 0 to 1. The selection circuit outputs first bit identification information identifying one second bit having a value permitted to be updated from 0 to 1, based on a magnitude relationship between thermal excitation energy and the first energy change output by each of the plurality of calculation circuits.Type: GrantFiled: October 16, 2019Date of Patent: November 30, 2021Assignee: FUJITSU LIMITEDInventors: Kouichi Kanda, Hirotaka Tamura, Hidetoshi Matsumura
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Publication number: 20210365799Abstract: An optimization method implemented by a computer configured to search for a solution using a replica exchange method, the optimization method includes: generating a reference bit to be referred to by each of a plurality of replicas, based on first states of respective replicas of the plurality of replicas at a time that is predetermined; causing each of the plurality of replicas to refer to the generated reference bit; and specifying second states at a time later than the time.Type: ApplicationFiled: January 29, 2021Publication date: November 25, 2021Applicant: FUJITSU LIMITEDInventors: Makiko Konoshima, Hirotaka TAMURA
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Publication number: 20210326679Abstract: According to an aspect of an embodiment, operations may include obtaining a first matrix associated with an optimization problem associated with a system and obtaining a second matrix associated with the optimization problem. The operations may include obtaining a local field matrix that indicates interactions between the variables of the system as influenced by their respective weights. The operations may include updating the local field matrix. Updating the local field matrix may include performing arithmetic operations with respect to a first portion of the first matrix and a second portion of the second matrix that correspond to a third portion of the local field matrix that corresponds to the one or more variables. The operations may include updating an energy value of the system based on the updated local field matrix and determining a solution to the optimization problem based on the energy value.Type: ApplicationFiled: April 15, 2020Publication date: October 21, 2021Applicants: FUJITSU LIMITED, THE GOVERNING COUNCIL OF THE UNIVERSITY OF TORONTOInventors: Mohammad BAGHERBEIK, Ali SHEIKHOLESLAMI, Hirotaka TAMURA, Kouichi KANDA
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Publication number: 20210319154Abstract: A sampling method includes: executing a state update process; executing a repetition count calculation process; executing an exchange control process; and executing an output process, the state update process being configured to hold values of a plurality of state variable groups each including a plurality of state variables, the plurality of state variables being included in an evaluation function indicating energy of an Ising model, and generate a state transition by changing any of the plurality of state variables in each attempt on the basis of a temperature value, in which different values are respectively associated with the plurality of state variable groups, and an amount of change in the energy due to a change in any of the plurality of state variables, the output process being configured to output values of the plurality of state variables and an expected value at a predetermined interval.Type: ApplicationFiled: February 2, 2021Publication date: October 14, 2021Applicant: FUJITSU LIMITEDInventors: Aki Dote, Hirotaka Tamura
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Publication number: 20210303754Abstract: A method includes: accessing first storage configured to store a first weight coefficient group which is at least some of a plurality of weight coefficients indicating a magnitude of interaction between a plurality of state variables in an evaluation function representing energy of an Ising model; accessing a plurality of second storages each of the plurality of second storage being configured to store a second weight coefficient group related to a state variable having a value of 1 in any of a plurality of state variable groups respectively including the plurality of state variables among the plurality of weight coefficients; outputting, for each of the plurality of state variable groups, a search result obtained by performing searching processing configured to perform processing of searching for an optimum solution by repeatedly performing a first update process with a first constraint or a second update process with a second constraint.Type: ApplicationFiled: February 24, 2021Publication date: September 30, 2021Applicant: FUJITSU LIMITEDInventors: Kouichi Kanda, Hirotaka TAMURA
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Publication number: 20210286919Abstract: An optimization method executed by a computer upon attempting to solve a ground state of an Ising model by simulating a state change of the Ising model when a magnetic field applied to the Ising model is reduced, the Ising model representing a problem to be solved, the method including: executing a first process, the first process being a real time propagation in which an intensity of the magnetic field is reduced with progress of time in simulation; and in response to the progress of time in the real time propagation of the first process, executing a second process, the second process including reducing energy of the Ising model based on an imaginary time propagation method.Type: ApplicationFiled: January 20, 2021Publication date: September 16, 2021Applicant: FUJITSU LIMITEDInventors: Daisuke Kushibe, Hirotaka TAMURA
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Publication number: 20210279652Abstract: According to an aspect of an embodiment, operations may include obtaining a first fixed temperature and a second fixed temperature of a replica exchange Markov Chain Monte Carlo (MCMC) process used to solve an optimization problem associated with a system, and obtaining a plurality of replicas of the system. The operations may also include obtaining a target swap acceptance probability with respect to swapping, during the replica exchange MCMC process, between replicas that correspond to adjacently ordered temperatures of a set of temperatures between the first fixed temperature and the second fixed temperature. The operations may include determining a respective average swap acceptance probability with respect to one or more respective adjacent pairs of temperatures. Further, the operations may include adjusting one or more of the variable temperatures based on a relationship between the target swap acceptance probability and each of one or more of the respective swap acceptance probabilities.Type: ApplicationFiled: January 5, 2021Publication date: September 9, 2021Applicants: FUJITSU LIMITED, THE GOVERNING COUNCIL OF THE UNIVERSITY OF TORONTOInventors: Keivan DABIRI, Ali SHEIKHOLESLAMI, Mehrdad MALEKMOHAMMADI, Hirotaka TAMURA
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Patent number: 11074493Abstract: Boltzmann machine includes a plurality of circuit units each having an adder that adds weighted input signals and a comparison unit that compares an output signal of the adder with a threshold signal to output a binary output signal; and digital arithmetic units each generating the weighted input signals by weighting the binary output signal of the circuit units with a weight. The comparison unit has a first comparator that compares a thermal noise with a reference voltage to output a binary digital random signal, a DA converter that converts the digital random signal to an analog random signal and varies a magnitude of the analog random signal, and a second comparator that compares the output signal of the adder with the analog random signal to generate the binary output signal with a predetermined probability function.Type: GrantFiled: January 30, 2017Date of Patent: July 27, 2021Assignee: FUJITSU LIMITEDInventors: Takumi Danjo, Sanroku Tsukamoto, Hirotaka Tamura
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Patent number: 11048996Abstract: Ising devices interconnected via buses each include: neuron circuits that each update, when a value of an output signal from one of connection destination neuron circuits changes, a value based on an update signal; a memory holding connection destination information wherein items of address information respectively identifying the destination neuron circuits and the ising devices including these circuits and identification information about weight values are associated with each other; a control circuit that outputs, when an output signal of a destination neuron circuit in an ising device other than the own ising device changes, the value of the changed output signal and the update signal based on the destination information; and a router that receives a mode set value from a control device and determines whether to connect at least two neighboring ising devices, or a neighboring ising device and the control circuit, based on the set value.Type: GrantFiled: May 26, 2017Date of Patent: June 29, 2021Assignee: FUJITSU LIMITEDInventors: Hirotaka Tamura, Satoshi Matsubara
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Patent number: 10970361Abstract: Arithmetic circuits calculate d?1 energy values (hi2 to hid) indicating energies generated by 2-body to d-body coupling on the basis of a plurality of weight values indicating strength of 2-body to d-body coupling of 2 to d neurons including a first neuron whose output value is allowed to be updated and n-bit output values of n neurons. An adder circuit calculates a sum of these values, and a comparator circuit compares a value based on a sum of the sum and a noise value with a threshold, to determine the output value of the first neuron. An update circuit outputs n-bit updated output values in which one bit has been updated on the basis of a selection signal and the output value of the first neuron. The holding circuit holds the updated output values and outputs the updated output values as the n-bit output values used by the arithmetic circuits.Type: GrantFiled: June 7, 2017Date of Patent: April 6, 2021Assignee: FUJITSU LIMITEDInventors: David Thach, Hirotaka Tamura, Sanroku Tsukamoto
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Patent number: 10929750Abstract: In an information processing apparatus, a calculation circuit calculates energy values representing total energies of Ising devices that are set up with different noise widths, where the Ising devices have equal conditions about neuron-to-neuron connections. An exchange control circuit exchanges output values of neurons or noise widths, between first and second Ising devices having adjacent noise widths. This exchange takes place with an exchange probability based on a difference in the energy values between the first Ising device and the second Ising device.Type: GrantFiled: June 1, 2017Date of Patent: February 23, 2021Assignee: FUJITSU LIMITEDInventors: Yasumoto Tomita, Hirotaka Tamura
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Patent number: 10891542Abstract: An individual neuron circuit calculates a first value based on a sum of products each obtained by multiplying one of weight values, each representing connection or disconnection between a corresponding neuron circuit and one of the other neuron circuits, by a corresponding one of output signals of the other neuron circuits and outputs 0 or 1, based on a result of comparison between a second value obtained by adding a noise value to the first value and a threshold. An arbitration circuit allows, when first output signals of first neuron circuits interconnected among the neuron circuits simultaneously change based on the weight values, updating of only one of the first output signals of the first neuron circuits and allows, when second output signals of second neuron circuits not interconnected simultaneously change, updating of the second output signals.Type: GrantFiled: April 10, 2017Date of Patent: January 12, 2021Assignee: FUJITSU LIMITEDInventors: Satoshi Matsubara, Hirotaka Tamura
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Publication number: 20200401738Abstract: An information processing device includes: a memory; and a plurality of processors each configured to: store a coupling coefficient for each set of a state variable that is a change candidate and another state variable among state variables included in an evaluation function indicating an energy value, values of the state variables, and values of local fields corresponding to the state variables; calculate a change value of the energy value, changes the value of the state variable according to determination whether or not the value of the state variable is changed, and updates the value of the local field of the other state variable; updates a score value according to the energy value and the temperature value; and select a set of the values of the state variables held by a predetermined number of processors fewer than the number of the processors.Type: ApplicationFiled: June 3, 2020Publication date: December 24, 2020Applicant: FUJITSU LIMITEDInventor: Hirotaka TAMURA