Patents by Inventor Hiroyoshi Haruki

Hiroyoshi Haruki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10281970
    Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: May 7, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyoshi Haruki, Koichi Fujisaki, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Masaya Tarui, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama
  • Patent number: 10275592
    Abstract: According to an embodiment, an information processing device includes a first manager, a second manager, and a generator. The first manager loads a first class of a first object that requests execution of methods contained in a second object and a third class of a limiter configured to limit access from the first object to the methods. The second manager loads a second class of the second object. The generator generates the second object from the second class upon receiving a generation request for generating the second object from the first object, generates the limiter from the second object and the third class, and transmits the limiter to the first object.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: April 30, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyoshi Haruki, Fukutomo Nakanishi, Mikio Hashimoto
  • Publication number: 20190080059
    Abstract: According to an embodiment, an information processing apparatus includes one or more processor. The processor is configured to run a process and a process manager to manage the process. The process includes a first key generator, a first authentication code generator, and a first output unit. The first key generator is configured to generate a first message authentication key by using process unique data assigned by the process manager. The first authentication code generator is configured to generate a first message authentication code by using the first message authentication key and a first message. The first output unit is configured to transmit the first message and the first message authentication code to the process manager.
    Type: Application
    Filed: February 20, 2018
    Publication date: March 14, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinya TAKUMI, Yoshikazu Hanatani, Hiroyoshi Haruki, Masanobu Koike, Naoki Ogura
  • Publication number: 20190080080
    Abstract: According to an embodiment, an information processing apparatus includes one or more processors. One or more processors acquire first distinctive information of a first piece of software to be executed. When a whitelist that specifies distinctive information of pieces of software that are permitted to be executed records the distinctive information indicating the first distinctive information, one or more processors distinctively identify, as second distinctive information, the distinctive information of a second piece of software that represents another piece of software relating to the first piece of software in the whitelist.
    Type: Application
    Filed: February 20, 2018
    Publication date: March 14, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoki OGURA, Yoshikazu Hanatani, Shinya Takumi, Masanobu Koike, Hiroyoshi Haruki
  • Patent number: 10229277
    Abstract: According to an embodiment, a code processing apparatus includes a determining unit, a concealing unit, an instructing unit, and an unconcealing unit. The determining unit is configured to determine, based on relocation information included in first code data that includes a code body and relocation information representing a portion of the code body to be relocated by a linker, a first portion including at least a part of the code body that is other than the portion. The concealing unit is configured to conceal the first portion. The instructing unit is configured to instruct the linker to process the first code data having the first portion concealed. The unconcealing unit is configured to unconceal the concealed portion of second code data that is generated from the first code data by the linker.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: March 12, 2019
    Assignees: Kabushiki Kaisha Toshiba, TOSHIBA SOLUTIONS CORPORATION
    Inventors: Yurie Shinke, Fukutomo Nakanishi, Hiroyoshi Haruki, Mikio Hashimoto, Fumihiko Sano
  • Publication number: 20190073471
    Abstract: According to an embodiment, an information processing apparatus includes processing circuitry. The processing circuitry is configured to detect writing on a first file and register, in a restriction target storage, file information on the first file and perform, when processing on a second file is requested and file information on the second file coincides with the file information stored in the restriction target storage, first restriction to restrict the processing on the second file.
    Type: Application
    Filed: February 28, 2018
    Publication date: March 7, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroyoshi Haruki, Masanobu Koike, Shinya Takumi, Naoki Ogura, Yoshikazu Hanatani
  • Publication number: 20190065735
    Abstract: According to an embodiment, an information processing apparatus includes one or more processors. The one or more processors are configured to: estimate a related program related to a computer program identified with a specific program identifier; register, in a prior calculation result list, a calculation result for the related program and a related identifier for identifying the related program so that the calculation result and the related identifier are associated with each other; acquire the program identifier for identifying the program serving as an execution target; and verify whether the program serving as the execution target is permitted to be executed, based on the acquired program identifier, the calculation result corresponding to the related identifier indicating the acquired program identifier in the prior calculation result list, and a white list.
    Type: Application
    Filed: February 16, 2018
    Publication date: February 28, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoki Ogura, Masanobu Koike, Shinya Takumi, Yoshikazu Hanatani, Hiroyoshi Haruki
  • Patent number: 10203740
    Abstract: According to an embodiment, an information processing device includes a memory device, one or more peripheral devices, a processor, and a state controller. The processor is able to change between a first state, in which a command is executed, and a second state, in which an interrupt is awaited. When the processor enters the second state and if an operation for data transfer is being performed between at least one of the peripheral devices and the memory device, the state controller switches the information processing device to a third state in which power consumption is lower as compared to the first state. If the operation for data transfer is not being performed between any of the peripheral devices and the memory device, the state controller switches the information processing device to a fourth state in which power consumption is lower as compared to the third state.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 12, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
  • Patent number: 10095607
    Abstract: A condition determination device includes an acquiring unit, a specifying unit, a classifying unit, and a condition determining unit. The acquiring unit acquires a total execution history, which is an execution count for each component included in a program, when a test is performed by supplying a plurality of input data to a target device which executes the program. The specifying unit specifies a shortage component of which the execution count indicated by the total execution history does not satisfy test criteria among components included in the program. The classifying unit classifies each of the input data into first data, which causes the target device to execute the shortage component, and second data, which does not cause the target device to execute the shortage component. The condition determining unit determines a condition of input data having a common characteristic with the first data.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: October 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Aoki, Fukutomo Nakanishi, Hiroyoshi Haruki, Fangming Zhao, Tatsuyuki Matsushita, Toshinari Takahashi
  • Publication number: 20180270053
    Abstract: According to one embodiment, a management device includes a management tree storage and one or more processors. The management tree storage stores therein a binary tree including a plurality of nodes that are assigned with respective node keys. The processors update at least one of the node keys. The processors selects at least one of a first subtree and a second subtree, the first subtree and the second subtree being subtrees including leaf nodes of the binary tree, the leaf nodes corresponding to respective communication devices included in a group, the first subtree including only leaf nodes with the respective node keys assigned thereto not having been updated, the second subtree including only leaf nodes with the respective node keys assigned thereto having been updated. The processors transmit a group key encrypted using a node key assigned to a root node of the selected subtree.
    Type: Application
    Filed: August 29, 2017
    Publication date: September 20, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshikazu HANATANI, Naoki OGURA, Masanobu KOIKE, Hiroyoshi HARUKI
  • Patent number: 9904350
    Abstract: A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 27, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyoshi Haruki, Masaya Tarui, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
  • Publication number: 20170270020
    Abstract: According to an embodiment, an information processing device includes a processor. The processor is configured to: execute a rewriting process to rewrite some of a plurality of factors, included in data for normal operation of a target device, into a value different from a normal value; execute a correction process that is performed in a course of generating test data to be used for a test of the target device; and determine a method of generating the test data based on a rewriting part that indicates a factor serving as a target of the rewriting process and based on a correction part that indicates a factor serving as a target of the correction process.
    Type: Application
    Filed: December 27, 2016
    Publication date: September 21, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyoshi HARUKI, Fukutomo NAKANISHI, Fangming ZHAO, Satoshi AOKI, Tatsuyuki MATSUSHITA, Toshinari TAKAHASHI
  • Publication number: 20170270033
    Abstract: An information processing device according to one embodiment includes one or more processors. The processors acquire a total execution history, which is an execution history for each component included in a program, when a test is performed by supplying a plurality of input data to a target device which executes the program, and specify a shortage component of which the total execution history does not satisfy test criteria among plural components included in the program. The processors classify each of the plurality of input data into first data, which causes the target device to execute the shortage component, and second data, which does not cause the target device to execute the shortage component. The processors determine a condition of input data having a common characteristic with the first data.
    Type: Application
    Filed: December 23, 2016
    Publication date: September 21, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi AOKI, Fukutomo NAKANISHI, Hiroyoshi HARUKI, Fangming ZHAO, Tatsuyuki MATSUSHITA, Toshinari TAKAHASHI
  • Patent number: 9733690
    Abstract: According to an embodiment, a communication device includes a register and a controller. The register receives data from an external device via an input data line. In a first state in which the communication device is able to receive the data, when a condition in which the data is not sent to the input data line continues for a certain period of time, the controller controls to switch state of the communication device to a second state in which power consumption is less than in the first state.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: August 15, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura
  • Patent number: 9710050
    Abstract: According to an embodiment, an information processing device includes a data obtaining unit and a data storage controller. The data obtaining unit is configured to obtain data measured by a sensor. The data storage controller is configured to store the data obtained by the data obtaining unit in a first memory of volatile nature when a sampling interval indicating an interval at which the data obtaining unit obtains the data is equal to or smaller than a threshold value. The data storage controller is configured to store the data obtained by the data obtaining unit and the data stored in the first memory in a second memory of nonvolatile nature when the sampling interval exceeds the threshold value.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: July 18, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura
  • Publication number: 20170178599
    Abstract: A data processing device according to embodiments comprises a non-volatile memory, and executing a process to data stored in the memory while switching a power to be supplied to the memory from a first power for executing the process to a second power being lower than the first power. When a time required for the process is shorter than a threshold, the device executes the process with the power supplied to the memory being the first power, and after the process is finished, the device switches the power supplied to the memory from the first power to the second power. When the time required for the process is equal or longer than the threshold, the device switches the power supplied to the memory from the first power to the second poser, returns the power supplied to the memory from the second power to the first power, and executes the process with the power supplied to the memory being the first power.
    Type: Application
    Filed: March 7, 2017
    Publication date: June 22, 2017
    Inventors: Yusuke Shirota, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Shiyo Yoshimura
  • Patent number: 9626940
    Abstract: A data processing device according to embodiments comprises a data converting unit, a selecting unit, a managing unit, a updating unit, and a controller. The data converting unit is configured to convert update-data for updating at least a part of an electronic paper into processed update-data to be displayed. The selecting unit is configured to select an update-control-information identifier to be used for updating the electronic paper with the processed update-data. The managing unit is configured to store the processed update-data and a selected update-control-information identifier on a first memory. The updating unit is configured to instruct a drawing step of the electronic paper using the processed update-data and the update-control-information identifier stored on the first memory.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: April 18, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Shirota, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Shiyo Yoshimura
  • Patent number: 9625970
    Abstract: According to an embodiment, an information processing apparatus that includes a processor, has a first control unit, a power storage unit, and a second control unit. The first control unit is configured to control execution of a process by the processor. The power storage unit is configured to store therein power. The second control unit is configured to control reduction of power consumption of the information processing apparatus in a case where there is a process waiting to be executed and an amount of stored power of the power storage unit is equal to or less than a first threshold.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: April 18, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shiyo Yoshimura, Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Yusuke Shirota, Masaya Tarui, Hiroyoshi Haruki, Satoshi Shirai, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama
  • Patent number: 9619001
    Abstract: According to an embodiment, an information processing apparatus includes: a first control unit to control a first device; and a second control unit to control a second device. The first control unit includes a first request processing unit, a notification unit, and a first execution unit. The second request processing unit receives a second request including an instruction to start a process of the second device. The notification unit notifies the second control unit that the first control unit receives a first request. The second execution unit executes a second request received by the second request processing unit when the first device is in the active state, and executes the second request stored in the storage unit when the notification is received by the notification receiving unit.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: April 11, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Yusuke Shirota, Shiyo Yoshimura, Masaya Tarui, Hiroyoshi Haruki, Satoshi Shirai, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama
  • Publication number: 20170075784
    Abstract: An information processing apparatus includes a result acquiring unit configured to acquire a pair of first test data fed to the test object and a determination result indicating an operating state of the test object when the first test data is fed, and a generating unit configured to generate second test data based on the pair of the first test data and the determination result. The generating unit is configured to select two pieces of first test data with different determination results, and to generate the second test data by generating the test data within an intermediary area between the two selected pieces of the first test data more frequently than the test data outside of the intermediary area.
    Type: Application
    Filed: September 9, 2016
    Publication date: March 16, 2017
    Inventors: Fukutomo NAKANISHI, Hiroyoshi HARUKI, Satoshi AOKI, Fangming ZHAO, Tatsuyuki MATSUSHITA, Ryotaro HAYASHI, Toshinari TAKAHASHI