Patents by Inventor Hiroyuki Doi

Hiroyuki Doi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020098615
    Abstract: A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a constant voltage device, a desired voltage is applied to the electrode. Then, trapping of carriers in the interface between the field oxide and the semiconductor region can be suppressed, although such trapping is ordinarily caused by a reverse breakdown phenomenon at the pn junction between the doped layer and the P-type semiconductor substrate. Accordingly, the variation in strength of the electric field between the doped layer and the semiconductor substrate can be suppressed. As a result, it is possible to suppress a variation in reverse withstand voltage, which is usually caused by a reverse breakdown voltage at a pn junction, for a semiconductor device functioning as a constant voltage device.
    Type: Application
    Filed: February 22, 2002
    Publication date: July 25, 2002
    Applicant: Matsushita Electronics Corporation
    Inventors: Hirotsugu Honda, Hiroyuki Doi, Katsujirou Arai, Takuo Akashi, Naritsugu Yoshii
  • Patent number: 6419453
    Abstract: The main object of the present invention is to provide a steam turbine rotor shaft whose high-temperature strength is excellent at a selected temperature of 650 degrees C. A steam turbine rotor shaft comprising 0.05% to 0.20% by weight of carbon, 0.20% or less by weight of silicon, 0.05% to 1.5% by weight of manganese, 0.01% to 1.0% by weight of nickel, 9.0% to 13.0% by weight of chrome, 0.05% to 2.0% by weight of molybdenum, 0.5% to 5.0% by weight of tungsten, 0.05% to 0.30% by weight of vanadium, 0.01% to 0.20% by weight of niobium, 0.5% to 10.0% by weight of cobalt, 0.01% to 0.1% by weight of nitrogen, 0.001% to 0.030% by weight of boron, 0.0005% to 0.006% by weight of aluminum, and the remaining parts substantially comprising iron and inevitable impurities.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: July 16, 2002
    Assignees: Hitachi, Ltd., The Japan Steel Works, Ltd.
    Inventors: Yutaka Fukui, Hiroyuki Doi, Masahiko Arai, Ryo Hiraga, Kenichiro Nomura, Toshio Fujita, Yasuhiko Tanaka
  • Publication number: 20020064071
    Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage.
    Type: Application
    Filed: January 22, 2002
    Publication date: May 30, 2002
    Applicant: Matsushita Electronics Corporation
    Inventors: Keita Takahashi, Masafumi Doi, Hiroyuki Doi, Nobuyuki Tamura, Yasushi Okuda
  • Patent number: 6388308
    Abstract: A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a constant voltage device, a desired voltage is applied to the electrode. Then, trapping of carriers in the interface between the field oxide and the semiconductor region can be suppressed, although such trapping is ordinarily caused by a reverse breakdown phenomenon at the pn junction between the doped layer and the P-type semiconductor substrate. Accordingly, the variation in strength of the electric field between the doped layer and the semiconductor substrate can be suppressed. As a result, it is possible to suppress a variation in reverse withstand voltage, which is usually caused by a reverse breakdown voltage at a pn junction, for a semiconductor device functioning as a constant voltage device.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: May 14, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirotsugu Honda, Hiroyuki Doi, Katsujirou Arai, Takuo Akashi, Naritsugu Yoshii
  • Publication number: 20020047615
    Abstract: An electrodeless discharge lamp system includes an excitation coil placed in proximity of the electrodeless discharge lamp, a resonance circuit for supplying appropriate power to the excitation coil, and a high frequency power source driver and wherein, the combined output is achieved by operating the parallel connected power sources in synchronization or approximately in synchronization with each other.
    Type: Application
    Filed: September 25, 2001
    Publication date: April 25, 2002
    Inventors: Ichiro Yokozeki, Hiroyuki Doi, Takashi Terai, Ioshiya Suzuki, Masaaki Kawamura
  • Patent number: 6377490
    Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower volt age. Also, since the select transistor is provided, reading c an also be performed at a lower voltage.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: April 23, 2002
    Assignee: Matsushita Electronics Corporation
    Inventors: Keita Takahashi, Masafumi Doi, Hiroyuki Doi, Nobuyuki Tamura, Yasushi Okuda
  • Patent number: 6368907
    Abstract: After forming a control gate electrode, an interelectrode insulating film and a floating gate electrode of a nonvolatile memory device in a memory region with allowing a conducting film to remain in a logic region, an insulating film for implant protection is formed on a substrate, and ion implantation is carried out to form a source/drain diffusion layer of the nonvolatile memory device. Then, after removing the insulating film for implant protection, the conducting film is patterned into a gate electrode of a logic device. Thereafter, impurity ion implantation is carried out with the gate electrode used as a mask so as to form an LDD diffusion layer of the logic device. At this point, since the insulating film for implant protection has already been removed from the logic region, a shallow PN junction can be formed, resulting in realizing a logic device suitable to refinement.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: April 9, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Doi, Takao Yamaguchi
  • Publication number: 20010041137
    Abstract: The main object of the present invention is to provide a steam turbine rotor shaft whose high-temperature strength is excellent at a selected temperature of 650 degrees C.
    Type: Application
    Filed: March 5, 2001
    Publication date: November 15, 2001
    Inventors: Yutaka Fukui, Hiroyuki Doi, Masahiko Arai, Ryo Hiraga, Kenichiro Nomura, Toshio Fujita, Yasuhiko Tanaka
  • Publication number: 20010026982
    Abstract: A gate insulator film and a gate electrode are formed on an Si substrate, and a CVD insulator film is deposited thereon to cover the gate electrode. Then, arsenic ions are implanted into the Si substrate from above the CVD insulator film to form LDD layers. After sidewall spacers have been formed over the side faces of the gate electrode with the CVD insulator film interposed therebetween, source/drain layers are formed. Since the LDD layers are formed by implanting dopant ions through the CVD insulator film, the passage of arsenic ions through the ends of the gate electrode can be suppressed. As a result, a semiconductor device suitable for miniaturization can be formed, while suppressing deterioration in insulating properties of the gate oxide film due to the passage of dopant ions through the ends of the gate electrode.
    Type: Application
    Filed: January 28, 1999
    Publication date: October 4, 2001
    Inventors: HIROYUKI DOI, YASUSHI OKUDA, KEITA TAKAHASHI, NOBUYUKI TAMURA
  • Publication number: 20010021346
    Abstract: There is provided a steam turbine blade made of Ti-base alloy comprising an &agr;+&bgr; type phase in which a difference of a tensile strength is small between a blade portion and a dovetail portion, a tensile strength at a room temperature of the dovetail portion is equal to or more than 100 kg/mm2 and a suitable toughness is commonly provided together with a strength, as a steam turbine blade having a length of 43 inch or more, a method of manufacturing the same, a steam turbine power generating plant and a low pressure steam turbine.
    Type: Application
    Filed: January 23, 2001
    Publication date: September 13, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Hiroyuki Doi, Mitsuo Kuriyama, Shigeyoshi Nakamura, Shinya Imano, Takeshi Onoda
  • Patent number: 6206634
    Abstract: There is provided a steam turbine blade made of Ti-base alloy comprising an &agr;+&bgr; type phase in which a difference of a tensile strength is small between a blade portion and a dovetail portion, a tensile strength at a room temperature of the dovetail portion is equal to or more than 100 kg/mm2 and a suitable toughness is commonly provided together with a strength, as a steam turbine blade having a length of 43 inch or more, a method of manufacturing the same, a steam turbine power generating plant and a low pressure steam turbine.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: March 27, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Doi, Mitsuo Kuriyama, Shigeyoshi Nakamura, Shinya Imano, Takeshi Onoda
  • Patent number: 6169307
    Abstract: A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: January 2, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Keita Takahashi, Masafumi Doi, Hiroyuki Doi, Nobuyuki Tamura, Yasushi Okuda
  • Patent number: 5982019
    Abstract: The object of the semiconductor apparatus to be used in the semiconductor integrated circuit is to restrain the time dependent fluctuations of the resistance value. To achieve the object, the semiconductor apparatus comprises an active area formed on one conductive type semiconductor substrate surface, a first impurity diffusion layer formed on the active area, of an inverted conductive type reverse in characteristics from the one conductive type, a second impurity diffusion layer of the reverse conductive type formed to cover the first impurity diffusion layer, and an electrode film formed through a field oxide film on the second impurity diffusion layer. The electric potential of the electrode film is kept at an electric potential where a majority carrier is induced into the second impurity diffusion layer.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: November 9, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Hiroyuki Doi, Yasushi Hazama
  • Patent number: 5964091
    Abstract: A cylindrical gas turbine combustor, burning injected fuel and guiding the combustion gas to turbine nozzles, includes a cylindrical portion such as a combustor liner and a transition piece, exposed to the combustion gas, which is made of austenitic Fe base casting alloy, Ni base casting alloy or Co base casting alloy.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: October 12, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Fukui, Tetsuo Kashimura, Hideyo Kodama, Hiroyuki Doi, Ryo Hiraga
  • Patent number: 5520733
    Abstract: A depositing apparatus includes a profile-following mechanism having a translational displacement mechanism portion and a rotation mechanism portion adapted to allow a head to be swung in the directions of both X and the Y axes so that the head follows a profile of the surface of workpiece smoothly around a first contact point, thereof with the workpiece, serving as a fulcrum point.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: May 28, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Doi, Shinichi Kazui, Takeji Shiokawa, Keiji Fujikawa, Yutaka Hashimoto, Makoto Matsuoka
  • Patent number: 5480283
    Abstract: A Ni-base superalloy consisting essentially of, by weight: 0.05 to 0.20% C, 20 to 25% Co, 15 to 25% Cr, 1.0 to 3.0% Al, 1.0 to 3.0% Ti, 1.0 to 3.0% Nb, 5 to 10% W, and at least 55% Ni, the combination of the [Al+Ti] and tungsten contents being determined as shown in FIG. 5. This superalloy has a high thermal-fatigue resistance, a great high-temperature strength, particularly, a great creep rupture strength, and a good weldability. The superalloy is used to form gas turbine nozzles, which are employed in a gas turbine. Using such a gas turbine, a combined power generating system is built.
    Type: Grant
    Filed: May 20, 1994
    Date of Patent: January 2, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Doi, Ken Yasuda, Tetsuo Kashimura, Yutaka Fukui
  • Patent number: 5370497
    Abstract: A Ni-base superalloy consisting essentially of, by weight: 0.05 to 0.20% C, 20 to 25% Co, 15 to 25% Cr, 1.0 to 3.0% Al, 1.0 to 3.0% Ti, 1.0 to 3.0% Nb, 5 to 10% W, and at least 42.5% Ni, the combination of the [Al+Ti] and tungsten contents being determined as shown in FIG. 5. This superalloy has a high thermal-fatigue resistance, a great high-temperature strength, particularly, a great creep rupture strength, and a good weldability. The superalloy is used to form gas turbine nozzles, which are employed in a gas turbine. Using such a gas turbine, a combined power generating system is built.
    Type: Grant
    Filed: October 23, 1992
    Date of Patent: December 6, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Doi, Ken Yasuda, Tetsuo Kashimura, Yutaka Fukui
  • Patent number: 4802894
    Abstract: A structural member to be subjected to a hot gas atmosphere produced through reaction between coal and a gasifier such as oxygen, air, steam or hydrogen, in a gasification furnace for example. The structural member is made of an anti-sulfur attack Cr-Ni-Al-Si alloy steel which has a composition essentially consisting of, by weight, 0.03 to 0.3% of C, 1 to 10% of Si, not greater than 2.0% of Mn, 8 to 14% of Ni, 16 to 20% of Cr, 0.5 to 10% of Al and the balance not less than 50% of Fe.
    Type: Grant
    Filed: January 12, 1987
    Date of Patent: February 7, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Usami, Seishin Kirihara, Tadaoki Morimoto, Hiroyuki Doi, Michiya Okada
  • Patent number: 4505232
    Abstract: A boiler tube having a double-tube structure constituted by an inner tube and an outer tube integrated with each other. The inner tube is made of an alloy consisting essentially of, by weight, 0.02 to 0.15% of C, 0.5 to 3.5% of Si, not greater than 2% of Mn, 25 to 40% of Ni, 20.5 to 27% of Cr, 0.5 to 3% of Mo, not greater than 1% of Nb and the balance Fe and having a substantially fully austenite structure. The outer tube is made of an alloy consisting essentially of, by weight, 0.02 to 0.2% of C, not greater than 3.5% of Si, not greater than 2% of Mn, 33 to 45% of Ni, 30 to 40% of Cr and the balance Fe and having a substantially fully austenite structure. The inner tube made of the alloy having the composition specified above exhibits a high resistance to steam oxidation without any reduction in high-temperature strength even at elevated steam temperature, while the outer tube made of the alloy having the composition specified above exhibits a superior resistance to corrosion by coal combustion gas.
    Type: Grant
    Filed: March 27, 1984
    Date of Patent: March 19, 1985
    Assignees: Hitachi, Ltd., Babcock-Hitachi Kabushiki Kaisha
    Inventors: Kenichi Usami, Seishin Kirihara, Hiroyuki Doi, Choichi Asano, Masayuki Sukekawa, Yasuhide Sakaguchi
  • Patent number: 4439567
    Abstract: There is provided a polyolefin resin composition for injection molding which comprises adding to polyolefin a condensate of sorbitol with an aldehyde compound and a lubricant of 1/20 to 1/2 parts by weight based on 1.0 part by weight of said condensate. Thereby polyolefin injection moldings with good transparency are obtained without bringing a foaming phenomenon.
    Type: Grant
    Filed: July 8, 1982
    Date of Patent: March 27, 1984
    Assignee: Mitsui Toatsu Chemicals, Inc.
    Inventors: Takeo Inoue, Jun Otsu, Tateyo Sasaki, Hiroyuki Doi, Keigo Suehiro