Abstract: The present invention provides an optical semiconductor sealing material comprising a radically polymerized polymer of a methacrylate ester having an alicyclic hydrocarbon group containing 7 or more carbon atoms, e.g. an adamantyl group, a norbornyl group, or a dicyclopentanyl group; and an optical semiconductor sealing material comprising a radically polymerized polymer of 50 to 97 mass % of the methacrylate ester and 3 to 50 mass % of acrylate ester having a hydroxyl group. The optical semiconductor sealing material of the present invention is highly transparent and stable to UV light and thus does not undergo yellowing. In addition, the material exhibits excellent compatibility between heat resistance and refractive index, does not undergo deformation or cracking during heating processes such as reflow soldering, and shows high processability.

Abstract: As an embodiment, a pair of first conductive films 12, 13 are formed from the side face to the bottom face of the sheet part 11a of a magnetic core 11, and one end 14b of the conductive wire of the coil 14 and the other end 14c of the conductive wire are joined to the side faces 12a, 13a of the first conductive films 12, 13, respectively. Also, as an embodiment, the joined parts 14b1, 14c1 are sandwiched by the side faces 12a, 13a of the first conductive films 12, 13 and the part 15a of the magnetic sheath 15 covering the side face of the sheet part 11a of the magnetic core 11, wherein the parts of the magnetic sheath 15 covering the joined parts 14b1, 14c1 are sandwiched by the side faces 12a, 13a of the first conductive films 12, 13 and the side faces 16a, 17a of second conductive films 16, 17 as well as the side faces 18a, 19a of third conductive films 18, 19.

Abstract: A lithium-ion battery cathode material includes a composite of sulfur and porous carbon, and glass particles and/or glass ceramic particles that satisfy a composition represented by the following formula (1), LiaMbPcSd??(1) wherein M is B, Zn, Si, Cu, Ga, or Ge, and a to d are the compositional ratio of each element, and satisfy a:b:c:d=1 to 12:0 to 0.2:1:2 to 9.

Abstract: The present invention provides solid dispersions or solid dispersion pharmaceutical preparations containing a water-soluble polymeric substance(s) and a phenylalanine compound of the formula (1) or pharmaceutically acceptable salts thereof, wherein A represents the formula (2) and the like, B represent an alkoxy group and the like, E represents a hydrogen atom and the like, D represents a substituted phenyl group and the like, T, U and V represent a carbonyl group and the like, Arm represents a benzene ring and the like, R1 represents an alkyl group and the like, R2, R3, and R4 may be the same or different from one another and each represent a hydrogen atom, a substituted amino group and the like, and J and J? represent a hydrogen atom and the like; production methods thereof; and solubilized pharmaceutical preparations containing a solubilizer(s) and the compound (I) or pharmaceutically acceptable salts thereof.

Abstract: A computer readable non-transitory medium storing a design aiding program causes a computer to execute a process of determining worst-case corner candidates for each of a plurality of condition sets. The design aiding program causes the computer to execute a process of mapping the worst-case corner candidates that are within an allowable range. The design aiding program causes a computer to execute a process of determining the worst-case corner candidates that minimize the number of the worst-case corner candidates mapped to the condition sets by handling the worst-case corner candidates thus mapped as a single worst-case corner candidate to be worst-case corners.

Abstract: A disclosed method includes: converting, for each sample point, a set of performance item values for a sample point into coordinate values of a mesh element containing the set among plural mesh elements obtained by dividing a space mapped by the performance items; generating a binary decision graph representing a group of the coordinate values of the sample points; calculating the number of sample points including second sample points that dominates a first sample point and the first sample point, by counting the number of paths in the binary decision graph from a root node to a leaf node representing “1” through at least one of certain nodes corresponding to coordinate values that are equal to or less than coordinate values of the first sample point; and calculating a yield of the first sample point by dividing the calculated number by the number of the plural sample points.

Abstract: The present invention provides an optical semiconductor sealing material comprising a radically polymerized polymer of a methacrylate ester having an alicyclic hydrocarbon group containing 7 or more carbon atoms, e.g. an adamantyl group, a norbornyl group, or a dicyclopentanyl group; and an optical semiconductor sealing material comprising a radically polymerized polymer of 50 to 97 mass % of the methacrylate ester and 3 to 50 mass % of acrylate ester having a hydroxyl group. The optical semiconductor sealing material of the present invention is highly transparent and stable to UV light and thus does not undergo yellowing. In addition, the material exhibits excellent compatibility between heat resistance and refractive index, does not undergo deformation or cracking during heating processes such as reflow soldering, and shows high processability.

Abstract: A waveform analyzer includes a converter which converts a logical function, where a pair of data including a time and a value at the time is variable, created according to data sets of a time and a value of a signal waveform at the time into a second function expressed by a binary decision diagram, an acquisition unit which obtains for each of characteristic points of a reference waveform a condition representative of constraints on a relationship between time information specified by the points and a value corresponding to the time information in the signal waveform according to a value of the reference waveform at the points and a specified tolerance given to a value of the reference waveform, and a searching unit which applies the condition for each of the points to the second function to obtain a time range which meets the entirety of the conditions.

Abstract: As an embodiment, a pair of first conductive films 12, 13 are formed from the side face to the bottom face of the sheet part 11a of a magnetic core 11, and one end 14b of the conductive wire of the coil 14 and the other end 14c of the conductive wire are joined to the side faces 12a, 13a of the first conductive films 12, 13, respectively. Also, as an embodiment, the joined parts 14b1, 14c1 are sandwiched by the side faces 12a, 13a of the first conductive films 12, 13 and the part 15a of the magnetic sheath 15 covering the side face of the sheet part 11a of the magnetic core 11, wherein the parts of the magnetic sheath 15 covering the joined parts 14b1, 14c1 are sandwiched by the side faces 12a, 13a of the first conductive films 12, 13 and the side faces 16a, 17a of second conductive films 16, 17 as well as the side faces 18a, 19a of third conductive films 18, 19.

Abstract: A semiconductor memory includes a memory cell array that includes data cells of x bits and redundant cells of y bits for each word; a position-data storage unit that stores, for each word, defective-cell position data of defective cells of the data cells and the redundant cells; and a read circuit that reads data from cells of x bits based on the defective-cell position data stored in the position-data storage unit for a specified word of which address is specified as read address, the cells of x bits being formed by the data cells of x bits and the redundant cells of y bits of the specified word other than the defective cells.

Abstract: A computer readable non-transitory medium storing a design aiding program causes a computer to execute a process of determining worst-case corner candidates for each of a plurality of condition sets. The design aiding program causes the computer to execute a process of mapping the worst-case corner candidates that are within an allowable range. The design aiding program causes a computer to execute a process of determining the worst-case corner candidates that minimize the number of the worst-case corner candidates mapped to the condition sets by handling the worst-case corner candidates thus mapped as a single worst-case corner candidate to be worst-case corners.

Abstract: A parameter correction method includes: obtaining, from a variability-aware simulation, a simulation result value of a predetermined product performance for a reference candidate value set concerning statistics of predetermined product characteristics; calculating a likelihood by substituting the reference candidate value set, the obtained simulation result value, statistics of measurement values of the predetermined product characteristics and a measurement value of the predetermined product performance into a likelihood function that is defined from a probability density function for the statistics of the predetermined product characteristics and a probability density function for the predetermined product performance, and is a function to calculate a combined likelihood of the statistics of the predetermined product characteristics and the predetermined product performance; and searching for a reference candidate value set in case where the calculated likelihood becomes maximum, by carrying out the obtaini

Abstract: Clock gating analysis of a target circuit having a plurality of clock gates, involves the calculation of a clock gate function for each of the clock gates. The clock gate functions indicate an activation state of the clock gates and a combination of output values from sequential circuit elements in the target circuit are substituted into each of the clock gate functions to obtained clock gate function values. Combinations of the clock gate function values form individual clock gating states. Each clock gating state indicates an activation state of each of the local clocks, collectively. A table indicating correlations between the combinations of output values and the clock gating states is generated and from the conversion table, a group that includes all of the clock gating states possible is output.

Abstract: The method for producing the porous sheet of the present invention includes the steps of (I) preparing a plurality of sheet materials that contain polytetrafluoroethylene and carbon particles and (II) stacking the plurality of sheet materials over one another and rolling the stacked sheet materials. In the method for producing the porous sheet of the present invention, step (I) and step (II) may be repeated alternately. Further, as the sheet materials to be used in the production method of the present invention, a base sheet obtained by forming a mixture containing polytetrafluoroethylene and carbon particles into sheet form also can be used, or a laminated sheet obtained by stacking a plurality of base sheets over one another and rolling them also can be used, for example.

Abstract: A reflective material which has a high UV light reflectance and maintains such a high reflectance even after heat treatment, and a reflector for LEDs are provided. A reflective material including a polymer obtained from a composition as a raw material which contains the following (a) and (b): (a) 95 to 30 mass % of a thermally polymerizable or photopolymerizable compound; and (b) 5 to 70 mass % of hollow particles which are formed of a material having an ultraviolet light transmittance of 50% or more at a wavelength of 350 nm.

Abstract: In an LSI analysis apparatus, a logic element pair extracting unit extracts an unselected logic element pair when an input unit receives circuit description input. A searching unit searches for an input pattern causing the extracted pair to perform concurrent transition. When an input pattern causing concurrent transition is found, the searching unit determines the extracted pair to be a pair capable of concurrent transition (concurrent transition pair), and holds the input pattern causing concurrent transition. When an input pattern causing concurrent transition is not found, the searching unit determines the extracted pair to be a non-concurrent transition pair. An input pattern operation ratio calculating unit calculates an input pattern operation ratio for each input pattern causing concurrent transition. A detecting unit detects an input pattern yielding the highest input pattern operation ratio. An output unit puts out the detected input pattern, non-concurrent transition pairs, etc.

Abstract: An apparatus for creating a simplified false-path description on a false path among paths in a target circuit extracts, from descriptions on the paths, a target path description on a target path. The apparatus judges whether the target path is a false path based on the target path description. The apparatus identifies, when it is judged that the target path is a false path, a sufficient set of elements from elements included in the target path. The settings for causing every element in the sufficient set to transmit a signal conflict. The apparatus creates the simplified false-path description on the false path by deleting, from the target path description, a description on elements that are not included in the sufficient set.

Abstract: Clock gating analysis of a target circuit having a plurality of clock gates, involves the calculation of a clock gate function for each of the clock gates. The clock gate functions indicate an activation state of the clock gates and a combination of output values from sequential circuit elements in the target circuit are substituted into each of the clock gate functions to obtained clock gate function values. Combinations of the clock gate function values form individual clock gating states. Each clock gating state indicates an activation state of each of the local clocks, collectively. A table indicating correlations between the combinations of output values and the clock gating states is generated and from the conversion table, a group that includes all of the clock gating states possible is output.

Abstract: A false path detection program whereby passing points of signal lines constituting false paths are directly detected, thereby shortening the processing time necessary for the false path detection and the processing time of tools utilizing false path information. A storing section stores, in a storage device, circuit information about a circuit designed by a designer. A signal value generating section generates an impossible signal value with respect to a signal line in the circuit. A signal propagation inspecting section assigns the signal value generated by the signal value generating section to an input of a gate connected to the signal line with respect to which the signal value has been generated, and examines whether signal is propagated through the other input of the gate only when accompanied by the signal value. If signal is propagated through the other input of the gate, a passing point acquiring section acquires a passing point of the other signal line connected to the other input of the gate.

Abstract: The present invention provides an optical semiconductor sealing material comprising a radically polymerized polymer of a methacrylate ester having an alicyclic hydrocarbon group containing 7 or more carbon atoms e.g. an adamantyl group, a norbornyl group or a dicyclopentanyl group; and an optical semiconductor sealing material comprising a radically polymerized polymer of 50 to 97 mass % of the methacrylate ester and 3 to 50 mass % of acrylate ester having a hydroxyl group. The optical semiconductor sealing material of the present invention is highly transparent and stable to UV light and thus does not undergo yellowing. In addition, the material exhibits excellent compatibility between heat resistance and refractive index, does not undergo deformation or cracking during heating processes such as reflow soldering, and shows high processability.