Patents by Inventor Hiroyuki MASUMOTO

Hiroyuki MASUMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128166
    Abstract: A semiconductor device includes a conductor having a plate shape with a first thickness, an insulator sealing a portion of the conductor, a semiconductor element sealed in the insulator and electrically connected to the portion of the conductor, and a terminal bonded to the conductor outside of the insulator. A length, along the conductor, from a section where the conductor and the terminal are bonded toward the semiconductor element to the insulator, is greater than the first thickness.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 18, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Patent number: 11806903
    Abstract: Each of a plurality of terminals has a first portion and a second portion being a connection target for a semiconductor element. A manufacturing method of a housing includes a first step arranging, for a lower mold provided with a plurality of holes each of which is a target into which the first portion is inserted, a nest having a third portion covering at least one of the holes, a second step arranging, for the lower mold with the nest being arranged therein, the plurality of terminals by inserting the first portion into the hole not covered by the third portion, a third step arranging an upper mold on the lower mold with the nest and the plurality of terminals being arranged therein, and a fourth step, which is executed after the third step, obtaining the housing by performing resin molding using the lower mold and the upper mold.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: November 7, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Masumoto
  • Patent number: 11784156
    Abstract: A semiconductor device includes: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, and including a first opposing portion and a second opposing portion located opposite each other with respect to the first semiconductor element in plan view; a first wire connected to the first semiconductor element and the first opposing portion; and a second wire connected to the first semiconductor element and the second opposing portion, and located opposite the first wire with respect to a connection point where the first wire and the first semiconductor element are connected to each other in plan view.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: October 10, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Kitabayashi, Hiroyuki Masumoto
  • Publication number: 20230207534
    Abstract: A semiconductor device includes an insulating layer; a foil conductor, a circuit pattern, a plurality of semiconductor elements, a first wiring board allowing an externally input current to flow through the circuit pattern, and a wiring board connecting the plurality of semiconductor elements and allowing the current that flowed through the plurality of semiconductor elements via the circuit pattern to flow. The plurality of semiconductor elements are arranged along an extending direction of the wiring board and, in a current path passing from the wiring board through the wiring board via the circuit pattern and the plurality of semiconductor elements, the electrical resistance of the current path passing through the semiconductor element arranged on the downstream side is lower than the electrical resistance of the current path passing through the semiconductor element arranged on the upstream side.
    Type: Application
    Filed: October 20, 2022
    Publication date: June 29, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Publication number: 20230130373
    Abstract: A semiconductor device includes: an insulating layer; a circuit pattern on an upper surface of the insulating layer; a semiconductor element bonded to an upper surface of the circuit pattern through a first bonding material; an insulating component bonded to the upper surface of the circuit pattern through a second bonding material; and a lead electrode connecting the semiconductor element to the insulating component, wherein an upper surface of the semiconductor element is bonded to a lower surface of the lead electrode through a third bonding material, an upper surface of the insulating component is bonded to the lower surface of the lead electrode through a fourth bonding material, and the first bonding material, the second bonding material, the third bonding material, and the fourth bonding material are made of a same material.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 27, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masayuki NISHIYAMA, Rei YONEYAMA, Naoki YOSHIMATSU, Shintaro ARAKI, Tatsuya KAWASE, Hiroyuki MASUMOTO
  • Patent number: 11587841
    Abstract: A semiconductor module includes: a case; a semiconductor chip provided inside the case; a seal material injected to inside of the case and sealing the semiconductor chip; and a lid provided inside the case and contacting an upper surface of the seal material, wherein a tapered portion is provided at an end portion of the lid on an upper surface side, a gap is provided between a side surface of the end portion of the lid and an inner side surface of the case, and the seal material crawls up to the tapered portion through the gap.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: February 21, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Masumoto
  • Publication number: 20230028808
    Abstract: A semiconductor device includes an insulating layer having a first surface and a second surface opposite to the first surface. The semiconductor device includes at least one semiconductor element located on a side of the first surface. The semiconductor device includes a first metal sinter and a second metal sinter. The first metal sinter is in contact with the first surface of the insulating layer and the semiconductor element, and bonds the insulating layer and the semiconductor element. The second metal sinter is in contact with the second surface of the insulating layer.
    Type: Application
    Filed: May 27, 2022
    Publication date: January 26, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Patent number: 11538727
    Abstract: A semiconductor module includes: a case; a semiconductor chip provided inside the case; a seal material injected to inside of the case and sealing the semiconductor chip; and a lid provided inside the case and contacting an upper surface of the seal material, wherein a tapered portion is provided at an end portion of the lid on an upper surface side, a gap is provided between a side surface of the end portion of the lid and an inner side surface of the case, and the seal material crawls up to the tapered portion through the gap.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: December 27, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Masumoto
  • Patent number: 11532590
    Abstract: A semiconductor device includes an insulation substrate including a circuit pattern, semiconductor chips mounted on the circuit pattern, a wire connecting between the semiconductor chips and between the semiconductor chip and the circuit pattern, and a conductive material serving as a conductor formed integrally with the wire.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: December 20, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Masumoto
  • Publication number: 20220336429
    Abstract: A semiconductor device includes: a metal sheet; an insulating pattern provided on the metal sheet; a power circuit pattern and a signal circuit pattern that are provided on the insulating pattern; a power semiconductor chip mounted on the power circuit pattern; and a control semiconductor chip that is mounted on the signal circuit pattern and controls the power semiconductor chip. The power semiconductor chip is bonded to the power circuit pattern with a first die bonding material comprised of copper, and the control semiconductor chip is bonded to the signal circuit pattern with a second die bonding material.
    Type: Application
    Filed: January 19, 2022
    Publication date: October 20, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Keisuke EGUCHI, Hiroyuki MASUMOTO
  • Publication number: 20220223511
    Abstract: A semiconductor device includes: an insulating substrate including a circuit pattern; a semiconductor chip mounted on the insulating substrate and connected to the circuit pattern; and an overcurrent interruption mechanism constituted with a same material as material of the circuit pattern, connected to the circuit pattern in series, wherein when an overcurrent flows, the overcurrent interruption mechanism melts and is cut.
    Type: Application
    Filed: July 9, 2021
    Publication date: July 14, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshitaka KIMURA, Hiroyuki MASUMOTO
  • Publication number: 20220165583
    Abstract: A manufacturing method of an insert case for a semiconductor device includes: placing a terminal inside a mold and fixing a central portion of the terminal by bringing a slide core into contact with the central portion of the terminal; with the central portion of the terminal fixed by the slide core, filling an inside of the mold with resin to mold an insert case; and separating the slide core from the terminal and taking out the insert case from the mold.
    Type: Application
    Filed: June 8, 2021
    Publication date: May 26, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Publication number: 20220141988
    Abstract: The power semiconductor module includes a power semiconductor assembly and a heat transfer member. The power semiconductor assembly includes a circuit board and a case. The circuit board includes an insulating substrate. The second attachment surface to which the heat transfer member is attached is recessed from the first attachment surface to which the heat sink is attached. The maximum recessed distance of the second attachment surface from the first attachment surface is smaller than the original thickness of the heat transfer member, and is greater than the lower limit thickness of the heat transfer member.
    Type: Application
    Filed: September 7, 2021
    Publication date: May 5, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Taketo NISHIYAMA, Hiroyuki MASUMOTO
  • Publication number: 20220134616
    Abstract: Each of a plurality of terminals has a first portion and a second portion being a connection target for a semiconductor element. A manufacturing method of a housing includes a first step arranging, for a lower mold provided with a plurality of holes each of which is a target into which the first portion is inserted, a nest having a third portion covering at least one of the holes, a second step arranging, for the lower mold with the nest being arranged therein, the plurality of terminals by inserting the first portion into the hole not covered by the third portion, a third step arranging an upper mold on the lower mold with the nest and the plurality of terminals being arranged therein, and a fourth step, which is executed after the third step, obtaining the housing by performing resin molding using the lower mold and the upper mold.
    Type: Application
    Filed: August 2, 2021
    Publication date: May 5, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Publication number: 20220102312
    Abstract: A semiconductor device includes: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, and including a first opposing portion and a second opposing portion located opposite each other with respect to the first semiconductor element in plan view; a first wire connected to the first semiconductor element and the first opposing portion; and a second wire connected to the first semiconductor element and the second opposing portion, and located opposite the first wire with respect to a connection point where the first wire and the first semiconductor element are connected to each other in plan view.
    Type: Application
    Filed: July 12, 2021
    Publication date: March 31, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya KITABAYASHI, Hiroyuki MASUMOTO
  • Publication number: 20210225731
    Abstract: A semiconductor device includes a base plate, a semiconductor chip, a case, a heat dissipation member, and a plurality of attachment portions. The semiconductor chip is held on a front surface side of the base plate. The case is provided on a front surface of the base plate so as to house the semiconductor chip inside. The heat dissipation member is provided on a back surface of the base plate and contactable with a heat sink for cooling the semiconductor chip. The plurality of attachment portions have a function of attaching the case to the heat sink. Ends of the heat dissipation member in a direction extending along a long side of a plurality of sides that form a shape defined by connecting positions of the plurality of attachment portions in plan view are located between the two attachment portions that form the long side.
    Type: Application
    Filed: October 23, 2020
    Publication date: July 22, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Publication number: 20210210401
    Abstract: A semiconductor module includes: a case; a semiconductor chip provided inside the case; a seal material injected to inside of the case and sealing the semiconductor chip; and a lid provided inside the case and contacting an upper surface of the seal material, wherein a tapered portion is provided at an end portion of the lid on an upper surface side, a gap is provided between a side surface of the end portion of the lid and an inner side surface of the case, and the seal material crawls up to the tapered portion through the gap.
    Type: Application
    Filed: July 21, 2020
    Publication date: July 8, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Publication number: 20210210404
    Abstract: The object of the technique disclosed in the specification is to provide a technique in which the production cost is reduced without impairing the mechanical strength of the resin, and the heat radiation is improved. The semiconductor device relates to the technique disclosed in the specification includes an insulating substrate, a semiconductor element disposed on an upper surface of the insulating substrate, a case connected to the insulating substrate, such that the semiconductor element is accommodated inside thereof, and resin filled inside of the case, such that the semiconductor element is embedded, on the upper surface of the resin in the inside of the case, a first concave part is formed, the first concave part is formed at a position covering an entire of the semiconductor element in plan view.
    Type: Application
    Filed: March 24, 2021
    Publication date: July 8, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya TAKAHASHI, Yoshitaka OTSUBO, Hiroyuki MASUMOTO
  • Patent number: 11037845
    Abstract: A semiconductor device includes: a semiconductor chip; a case storing the semiconductor chip; a wire bonded to the semiconductor chip; a cover fixed inside the case and including a concave portion disposed above the semiconductor chip and the wire; and a sealing resin potted inside the case and sealing the semiconductor chip, the wire and the cover, wherein the sealing resin is not filled in the concave portion so that a cavity is provided.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: June 15, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Masumoto
  • Publication number: 20200328178
    Abstract: A semiconductor device includes an insulation substrate including a circuit pattern, semiconductor chips mounted on the circuit pattern, a wire connecting between the semiconductor chips and between the semiconductor chip and the circuit pattern, and a conductive material serving as a conductor formed integrally with the wire.
    Type: Application
    Filed: March 13, 2020
    Publication date: October 15, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO