Patents by Inventor Hiroyuki MASUMOTO

Hiroyuki MASUMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200286799
    Abstract: A semiconductor device includes: a semiconductor chip; a case storing the semiconductor chip; a wire bonded to the semiconductor chip; a cover fixed inside the case and including a concave portion disposed above the semiconductor chip and the wire; and a sealing resin potted inside the case and sealing the semiconductor chip, the wire and the cover, wherein the sealing resin is not filled in the concave portion so that a cavity is provided.
    Type: Application
    Filed: October 4, 2019
    Publication date: September 10, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki MASUMOTO
  • Publication number: 20190229031
    Abstract: The object of the technique disclosed in the specification is to provide a technique in which the production cost is reduced without impairing the mechanical strength of the resin, and the heat radiation is improved. The semiconductor device relates to the technique disclosed in the specification includes an insulating substrate, a semiconductor element disposed on an upper surface of the insulating substrate, a case connected to the insulating substrate, such that the semiconductor element is accommodated inside thereof, and resin filled inside of the case, such that the semiconductor element is embedded, on the upper surface of the resin in the inside of the case, a first concave part is formed, the first concave part is formed at a position covering an entire of the semiconductor element in plan view.
    Type: Application
    Filed: November 6, 2018
    Publication date: July 25, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya TAKAHASHI, Yoshitaka OTSUBO, Hiroyuki MASUMOTO
  • Patent number: 9979105
    Abstract: A power semiconductor device includes: an outer case; at least one press-fit terminal buried in a top surface of the outer case; and a plurality of supporting portions formed so as to protrude from the top surface of the outer case. A top end of the press-fit terminal protrudes more than top surfaces of the supporting portions from the top surface of the outer case.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 22, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Minoru Egusa, Hidetoshi Ishibashi, Yoshitaka Otsubo, Hiroyuki Masumoto, Hiroshi Kawata
  • Publication number: 20160336245
    Abstract: A power semiconductor device includes: an outer case; at least one press-fit terminal buried in a top surface of the outer case; and a plurality of supporting portions formed so as to protrude from the top surface of the outer case. A top end of the press-fit terminal protrudes more than top surfaces of the supporting portions from the top surface of the outer case.
    Type: Application
    Filed: May 3, 2016
    Publication date: November 17, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Minoru EGUSA, Hidetoshi ISHIBASHI, Yoshitaka OTSUBO, Hiroyuki MASUMOTO, Hiroshi KAWATA
  • Patent number: 9355999
    Abstract: A semiconductor device includes: a substrate having an insulating resin and a metal pattern provided on the insulating resin; a mounted component mounted on the metal pattern; and an epoxy resin encapsulating the metal pattern and the mounted component, wherein a slit is provided in the metal pattern around the mounted component, and the insulating resin exposed from the metal pattern and the epoxy resin are brought into intimate contact with each other in the slit.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: May 31, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroyuki Masumoto, Hiroshi Kawata, Manabu Matsumoto, Yoshitaka Otsubo
  • Publication number: 20160071821
    Abstract: A semiconductor device includes: a substrate having an insulating resin and a metal pattern provided on the insulating resin; a mounted component mounted on the metal pattern; and an epoxy resin encapsulating the metal pattern and the mounted component, wherein a slit is provided in the metal pattern around the mounted component, and the insulating resin exposed from the metal pattern and the epoxy resin are brought into intimate contact with each other in the slit.
    Type: Application
    Filed: June 2, 2015
    Publication date: March 10, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki MASUMOTO, Hiroshi KAWATA, Manabu MATSUMOTO, Yoshitaka OTSUBO
  • Patent number: D814431
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: April 3, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Manabu Matsumoto, Yoshitaka Otsubo, Hiroyuki Masumoto