Abstract: A semiconductor integrated circuit, including a first master circuit, a second master circuit, a first slave circuit assigned to the first master circuit, and determines that an access request signal is sent from the first master circuit when an identification information is a first value, a first bus coupled to the first master circuit, the second master circuit, and the first slave circuit, a bus controller is configured to transmit the access request signal to the first slave circuit via the first bus, a system controller directs the bus controller to substitute the first value for a second value on the identification information of the access request signal received from the second master circuit when the first master circuit is in the deactivated state.

Abstract: A non-transitory computer readable recording medium that stores a print management program causing a computer to function as a retrieval unit that retrieves information about first functions of an image forming device and information about second functions of plural second devices; and a determination unit that determines whether the second functions of the second devices can process a print job, when the first functions of the image forming device cannot process the print job. Here, the image forming device and the second devices are connected to a print system including the computer. When the determination unit determines that the second functions of the second devices cannot process the print job, the print management program constrains the second functions of the second devices from being utilized.

Abstract: In a semiconductor LSI that sequentially performs predetermined processing on data input successively, a host CPU, a plurality of sequencers, and a data engine are connected in a hierarchical manner with the host CPU at top and the data engine at bottom. Each sequencer includes a memory that stores a parameter for execution of the sequencer, a memory controller, a loop counter, a sequence controller, and an interface unit that handles transmission and reception of signals with an external unit of the sequencer. The interface units of the plurality of sequencers have the same specifications.

Abstract: Disclosed is a multiprocessor apparatus including a plurality of processors connected to a common bus, a co-processor provided in common to the processors, an arbitration circuit that arbitrates contention among the processors with respect to use of a resource in the co-processor through a tightly coupled bus by the processors and a multiplexer coupled to the arbitration circuit, coupled to the processors through a local buses, and coupled to the co-processor through the local buses to transfer the commands received from the respective processors to the co-processor in accordance with a permission signal output by the arbitration circuit.

Abstract: A braking apparatus for a blind, used to reduce the speed of a shielding member of the blind when it is lifted and lowered, in which weights are stably supported and operated without an increase in the size of the braking apparatus. The braking apparatus has a casing, a rotor rotatably supported with in the casing, and weights adapted to rotate together with the rotor in such a way that they can be in contact with the inner peripheral surface of the casing. A cylindrical shaft portion and weight support portions radially projecting from the peripheral surface of the shaft portion at equal intervals in the circumferential direction are formed on the rotor. One end of each weight is swingably supported by the weight support portion extending over the axial-direction entire length of the weight.

Abstract: On a pivot bolt which rotatably and pivotally supports a side stand bar on a vehicle-body-side bracket, a switch unit which is constituted of a base and a rotary made of a resin and detects a rotational position of the side stand bar is mounted. A first engaging mechanism which is constituted of a groove and a projection is arranged between a cylindrical portion formed on the rotary and an engaging shaft and, at the same time, a second engaging mechanism which is constituted of a groove and a projection is arranged between the base and the cylindrical portion. The rotary on which a movable contact formed of a leaf spring is mounted allows a positioning pin which is formed on one end portion thereof to be engaged with a pin hole formed in a pivot portion and hence, the rotary is integrally rotated with the side stand bar.

Abstract: The present invention provides a method of cleaning a storage case to be used for storing or transporting mask substrates such as photomasks and photomask blanks, semiconductor substrates such as semiconductor wafers, pellicles, or the like. The present invention: facilitates a regular cleaning operation, can be used also for a storage case of a complicated shape, does not require a large scale equipment or an expensive equipment to facilitate an environmental countermeasure, and provides high cleaning effect. The method of cleaning a storage case polluted by adhesion of a foreign substance of an organic material, an ionic foreign substances or an ionic crystal foreign substance physically absorbed, comprises a step of placing the storage case still in air flow of cleaned air or an inert gas in a temperature range from room temperature to 80° C. for desorbing and removing the foreign substance adhered to the storage case.

Abstract: A stream processor includes a programmable main processor MP, and a coprocessor CP that executes an extension instruction, the extension instruction being different from a basic instruction executed by the main processor MP. The main processor MP includes a coprocessor controller CPC outputting the extension instruction to the coprocessor CP, and the coprocessor CP includes a task controller TC, the task controller controlling a task performed based on the extension instruction and outputting status information ST of the task on every clock. The coprocessor controller CPC controls the coprocessor CP based on the status information ST and a basic instruction executed by the main processor MP in background in advance.

Abstract: A braking apparatus for a blind, used to reduce the speed of a shielding member of the blind when it is lifted and lowered, in which weights are stably supported and operated without an increase in the size of the braking apparatus. The braking apparatus has a casing, a rotor rotatably supported with in the casing, and weights adapted to rotate together with the rotor in such a way that they can be in contact with the inner peripheral surface of the casing. A cylindrical shaft portion and weight support portions radially projecting from the peripheral surface of the shaft portion at equal intervals in the circumferential direction are formed on the rotor. One end of each weight is swingably supported by the weight support portion extending over the axial-direction entire length of the weight.

Abstract: A processor has an instruction set A and an instruction set B. A system instruction decoder decodes a system instruction that specifies the operating mode of the processor, the system instruction not being included in either the instruction set A or the instruction set B. A system instruction execution controller receives a decoded signal from the system instruction decoder, which has decoded an instruction requiring changeover of the instruction set, and sets the value of a instruction mode register. On the basis of the value in the instruction mode register, an instruction set changeover unit selects the instruction set to be used.

Abstract: Disclosed is a multiprocessor apparatus including a co-processor provided in common to a plurality of processors and including a plurality of resources and an arbitration circuit that arbitrates contention among the processors with respect to use of a resource in the co-processor by the processors through a co-processor bus, which is a tightly coupled bus, for each resource or each resource hierarchy according to instructions issued from the processors to the co-processor. Under control by the arbitration circuit, simultaneous use of a plurality of resources on a same hierarchy or different hierarchies in the co-processor by the processors through the tightly coupled bus is allowed.

Abstract: When a master circuit is in an inactive state, a slave circuit assigned to the master circuit is not used. Accordingly, the use efficiency of system recourses is decreased. To solve the above problem, a semiconductor integrated circuit reassigns a M2 region of a slave circuit, previously assigned to a first master circuit, to a second master circuit. That is to say, the M2 region of the slave circuit previously assigned to the first master circuit is reassigned to the second master circuit based on the operational status of the first master circuit. This improves the use efficiency of system resources of the semiconductor integrated circuit.

Abstract: On a pivot bolt which rotatably and pivotally supports a side stand bar on a vehicle-body-side bracket, a switch unit which is constituted of a base and a rotary made of a resin and detects a rotational position of the side stand bar is mounted. A first engaging mechanism which is constituted of a groove and a projection is arranged between a cylindrical portion formed on the rotary and an engaging shaft and, at the same time, a second engaging mechanism which is constituted of a groove and a projection is arranged between the base and the cylindrical portion. The rotary on which a movable contact formed of a leaf spring is mounted allows a positioning pin which is formed on one end portion thereof to be engaged with a pin hole formed in a pivot portion and hence, the rotary is integrally rotated with the side stand bar.

Abstract: A method for designing a system LSI includes the step of defining, for each of instructions of the processor, a behavior function description and an instruction description specifying the behavior function description, and the step of synthesizing the instructions by behavior synthesis to define the processor. The behavior function description and the instruction description are separately stored in a database as design resources for the next design of a system LSI. The instruction description is retrieved as accompanied by the associated behavior function description from the database.

Abstract: Disclosed is a multiprocessor apparatus including a plurality of processors connected to a common bus, a co-processor provided in common to the processors, and an arbitration circuit that arbitrates contention among the processors with respect to use of a resource in the co-processor through a tightly coupled bus by the processors.

Abstract: A method for designing a system LSI includes the steps of dividing an algorithmic description (D1) of the system LSI into software and hardware groups, synthesizing the hardware group by behavior synthesis to create an RTL description ((D5) and a simulation description (D6), examining the circuit scale of the system LSI based on the RTL description (D5), and simulating the system LSI based on the simulation description (D6) and a software description.

Abstract: The present invention provides a method of cleaning a storage case to be used for storing or transporting mask substrates such as photomasks and photomask blanks, semiconductor substrates such as semiconductor wafers, pellicles, or the like. The present invention: facilitates a regular cleaning operation, can be used also for a storage case of a complicated shape, does not require a large scale equipment or an expensive equipment to facilitate an environmental countermeasure, and provides high cleaning effect. The method of cleaning a storage case polluted by adhesion of a foreign substance of an organic material, an ionic foreign substances or an ionic crystal foreign substance physically absorbed, comprises a step of placing the storage case still in air flow of cleaned air or an inert gas in a temperature range from room temperature to 80° C. for desorbing and removing the foreign substance adhered to the storage case.

Abstract: The present invention has an object to enrich expression of contents of an e-mail message. In a mobile phone (1), text data (TxD) is input, and a 3D authoring operation is carried out. The text data (TxD) and 3D authoring instruction data (DD) are transmitted from the mobile phone (1) to a server (3), and then, scenario data (SD) which is control information about 3D graphics is generated in the server (3). The text data (TxD) and scenario data (SD) are stored in the server (3) as 3D message information (MD). When access information to the 3D message information (MD) is notified from the mobile phone (1) to a mobile phone (2), the mobile phone (2) makes access to the server (3) to download the 3D message information (MD) and a necessary 3D font. 3D character mail is thereby reproduced in the mobile phone (2).

Abstract: In an internal combustion engine for a vehicle having a drive clutch, a blowby control system includes a fresh air introducing channel, for introducing fresh air into a crankcase, and a blowby gas return channel for returning blowby gas from the crankcase to an air-intake system. A blowby control valve is provided in the fresh air introducing channel or the blowby gas return channel, for selectively restricting gas flow through the blowby system. A controller is also provided on the vehicle for controlling operation of the blowby control valve. The controller is programmed to switch the blowby control valve from the closed state to the open state, with the drive clutch connected, when the vehicle starts traveling. The blowby control system and method hereof can reduce variations in the engine speed occurring during engine idling and before clutch engagement, to improve ride quality of the vehicle.

Abstract: In a system large scale integrated circuit (LSI) according to one embodiment, management of the power supply, and the like, of a dedicated instruction processor can be carried out according to an instruction issued to a basic instruction processor at high speed. Further, the operational state of a dedicated instruction processor may be readily obtained by a basic instruction processor. In such a system LSI, a system controller (14) can include an instruction decoder (16) that decodes an instruction fetched by a basic instruction processor (11) and generates a decoder output. Such a decoder output can control a second power supply controlling unit (51), a second clock signal generating unit (52), a second program counter (53), and a second conditional flag (54) for a dedicated instruction processor (12).