Patents by Inventor Hiroyuki Nitta
Hiroyuki Nitta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10559586Abstract: A semiconductor memory device includes a semiconductor layer having a termination region surrounding a device region, the termination region including a first stacked body having a first, insulating, layer located on a surface of the substrate, a second, conductive, layer located over the first layer, and a third, insulating, layer located over the second layer, an opening extending through the first stacked body, a fourth, insulating, layer located in the opening in the first stacked body and over the surface of the semiconductor substrate in the opening, a fifth, insulating, layer, located over the fourth layer, and a wall surrounding the device region, the wall extending inwardly of the opening and contacting one of the surface of the semiconductor substrate or a nitride material on the surface of the substrate, wherein the composition of the third and fifth layers is different from that of the first and third layers.Type: GrantFiled: March 1, 2018Date of Patent: February 11, 2020Assignee: Toshiba Memory CorporationInventors: Taichi Iwasaki, Takeshi Sonehara, Hiroyuki Nitta
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Publication number: 20190006384Abstract: A semiconductor memory device includes a semiconductor layer having a termination region surrounding a device region, the termination region including a first stacked body having a first, insulating, layer located on a surface of the substrate, a second, conductive, layer located over the first layer, and a third, insulating, layer located over the second layer, an opening extending through the first stacked body, a fourth, insulating, layer located in the opening in the first stacked body and over the surface of the semiconductor substrate in the opening, a fifth, insulating, layer, located over the fourth layer, and a wall surrounding the device region, the wall extending inwardly of the opening and contacting one of the surface of the semiconductor substrate or a nitride material on the surface of the substrate, wherein the composition of the third and fifth layers is different from that of the first and third layers.Type: ApplicationFiled: March 1, 2018Publication date: January 3, 2019Inventors: Taichi IWASAKI, Takeshi SONEHARA, Hiroyuki NITTA
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Patent number: 10014346Abstract: According to one embodiment, a semiconductor memory device includes a first interconnect, a second interconnect, a first fringe and a second fringe. The first interconnect is connected to a first memory cell. The second interconnect is connected to a second memory cell and is arranged at a first interval from the first interconnect in a first direction. The first fringe is formed on one end of the first interconnect. The second fringe is formed on one end of the second interconnect. The first fringe and the second fringe are arranged at the first interval in a second direction orthogonal to the first direction.Type: GrantFiled: February 23, 2011Date of Patent: July 3, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventor: Hiroyuki Nitta
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Patent number: 9583030Abstract: A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.Type: GrantFiled: December 23, 2013Date of Patent: February 28, 2017Assignee: SYNAPTICS JAPAN GKInventors: Yoshiki Kurokawa, Yasuyuki Kudo, Hiroyuki Nitta, Kazuki Homma, Junya Takeda
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Patent number: 9293547Abstract: According to one embodiment, a part of a buried insulating film buried in a trench is removed; accordingly, an air gap is formed between adjacent floating gate electrodes in a word line direction, and the air gap is formed continuously along the trench in a manner of sinking below a control gate electrode.Type: GrantFiled: September 20, 2011Date of Patent: March 22, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Fumitaka Arai, Wataru Sakamoto, Fumie Kikushima, Hiroyuki Nitta
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Patent number: 8994632Abstract: A liquid crystal display device includes a plurality of video signal lines that extends in columns in a display area, a plurality of inversion control signal line each supplied with an inversion control signal for controlling inversion, a first selector that selects one of a pair of amplifiers different in the polarity from each other to input signals corresponding to a pair of adjacent video signal lines on the basis of the inversion control signal, and a second selector that selects one of a pair of the corresponding adjacent video signal lines to input signals output from the pair of amplifiers on the basis of the inversion control signal, in which at least one of the signals to be supplied to the plurality of inversion control signal lines is a signal different from other signals.Type: GrantFiled: March 27, 2013Date of Patent: March 31, 2015Assignee: Japan Display Inc.Inventors: Keitoku Kato, Hiroyuki Nitta, Gou Yamamoto
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Publication number: 20150060975Abstract: A nonvolatile semiconductor memory device includes first and second memory blocks which are disposed adjacent to each other in a first direction. The first and second memory blocks each include a plurality of bit lines, a plurality of word lines, which are disposed to extend in a second direction, and a memory cell, which is connected to any of the plurality of word lines. The first memory block includes a first selection gate line which is connected to one end of the memory cell, and the second memory block includes a second selection gate line in the same manner. An end portion of one end of the first selection gate line includes an L-shaped portion, and an end portion of one end of the second selection gate line includes a linear portion. A first contact is disposed on the L-shaped portion of the first selection gate.Type: ApplicationFiled: February 26, 2014Publication date: March 5, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hiroyuki NITTA, Yusuke OKUMURA, Yuji SETTA
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Patent number: 8957469Abstract: A semiconductor storage device according to an embodiment comprises a memory cell string in which a plurality of memory cells each having a gate are serially connected to each other. A selective transistor is connected to an end memory cell at an end of the memory cell string. A sidewall film covers a side surface of a gate of the end memory cell and a side surface of a gate of the selective transistor between the end memory cell and the selective transistor. An air gap is provided between the sidewall film of the end memory cell and the sidewall film of the selective transistor.Type: GrantFiled: February 21, 2012Date of Patent: February 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Ryosuke Isomura, Wataru Sakamoto, Hiroyuki Nitta
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Patent number: 8884444Abstract: According to the nonvolatile memory device in one embodiment, contact plugs connect between second wires and third wires in a memory layer and a first wire connected to a control element. Drawn wire portions connect the second wires and the third wires with the contact plug. The drawn wire portion connected to the second wires and the third wires of the memory layer is formed of a wire with a critical dimension same as the second wires and the third wires and is in contact with the contact plug on an upper surface and both side surfaces of the drawn wire portion.Type: GrantFiled: June 25, 2013Date of Patent: November 11, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Hiroyuki Nitta
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Patent number: 8878306Abstract: A method of manufacturing a semiconductor device involves process for forming gate insulating films of different thickness on a semiconductor substrate, depositing films that constitute a gate electrode, removing the gate insulating films having different thickness formed on an impurity diffusion region surface of a transistor including the gate electrode, and doping impurities into a portion where the gate insulating film is removed.Type: GrantFiled: January 17, 2013Date of Patent: November 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Minori Kajimoto, Mitsuhiro Noguchi, Hiroyuki Nitta
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Patent number: 8860116Abstract: A nonvolatile semiconductor memory of an aspect of the present invention including a plurality of first active areas which are provided in the memory cell array side-by-side in a first direction and which have a dimension smaller than a fabrication limit dimension obtained by lithography, a second active area provided between the first active areas adjacent in the first direction, a memory cell unit which is provided in each of the plurality of first active areas and which has memory cells and select transistors, and a linear contact which is connected to one end of the memory cell unit and which extends in the first direction, wherein an area in which the linear contact is provided is one semiconductor area to which the plurality of first active areas are connected by the plurality of second active areas, and the bottom surface of the linear contact is planar.Type: GrantFiled: August 25, 2009Date of Patent: October 14, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Sakaguchi, Hiroyuki Nitta
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Publication number: 20140104302Abstract: A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.Type: ApplicationFiled: December 23, 2013Publication date: April 17, 2014Applicant: Renesas Electronics CorporationInventors: Yoshiki Kurokawa, Yasuyuki Kudo, Hiroyuki Nitta, Kazuki Homma, Junya Takeda
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Patent number: 8649202Abstract: According to one embodiment, a resistance change memory includes a memory cell array area and a resistive element area on a substrate. A first memory cell array in the memory cell array area includes a first control line, a second control line above first control line, and a first cell unit between the first and second control lines. A second memory cell array on the first memory cell array includes the second control line, a third control line above the second control line, and a second cell unit between the second and the third control lines. And a resistive element in the resistive element area includes resistance lines, and a resistor connected to the resistance lines. The resistor includes the same member as one of a member of the cell unit and a member of a contact plug.Type: GrantFiled: February 7, 2011Date of Patent: February 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Sakaguchi, Hiroyuki Nitta
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Patent number: 8633951Abstract: A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.Type: GrantFiled: November 26, 2012Date of Patent: January 21, 2014Assignee: Renesas Electronics CorporationInventors: Yoshiki Kurokawa, Yasuyuki Kudo, Hiroyuki Nitta, Kazuki Homma, Junya Takeda
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Patent number: 8605482Abstract: According to one embodiment, a resistance change memory includes a memory cell array area and a resistive element area on a substrate. A first memory cell array in the memory cell array area includes a first control line, a second control line above first control line, and a first cell unit between the first and second control lines. A second memory cell array on the first memory cell array includes the second control line, a third control line above the second control line, and a second cell unit between the second and the third control lines. And a resistive element in the resistive element area includes resistance lines, and a resistor connected to the resistance lines. The resistor includes the same member as one of a member of the cell unit and a member of a contact plug.Type: GrantFiled: February 7, 2011Date of Patent: December 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Sakaguchi, Hiroyuki Nitta
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Publication number: 20130285255Abstract: According to the nonvolatile memory device in one embodiment, contact plugs connect between second wires and third wires in a memory layer and a first wire connected to a control element. Drawn wire portions connect the second wires and the third wires with the contact plug. The drawn wire portion connected to the second wires and the third wires of the memory layer is formed of a wire with a critical dimension same as the second wires and the third wires and is in contact with the contact plug on an upper surface and both side surfaces of the drawn wire portion.Type: ApplicationFiled: June 25, 2013Publication date: October 31, 2013Inventor: Hiroyuki NITTA
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Publication number: 20130271439Abstract: A liquid crystal display device includes a plurality of video signal lines that extends in columns in a display area, a plurality of inversion control signal line each supplied with an inversion control signal for controlling inversion, a first selector that selects one of a pair of amplifiers different in the polarity from each other to input signals corresponding to a pair of adjacent video signal lines on the basis of the inversion control signal, and a second selector that selects one of a pair of the corresponding adjacent video signal lines to input signals output from the pair of amplifiers on the basis of the inversion control signal, in which at least one of the signals to be supplied to the plurality of inversion control signal lines is a signal different from other signals.Type: ApplicationFiled: March 27, 2013Publication date: October 17, 2013Applicant: Japan Display East Inc.Inventors: Keitoku KATO, Hiroyuki NITTA, Gou YAMAMOTO
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Patent number: 8508975Abstract: A semiconductor memory device includes a control circuit. The control circuit applies a first voltage to a selected one of a upper interconnections, applies a second voltage to an unselected one of the upper interconnections, applies a third voltage to a first dummy upper interconnection and independently controls the first to third voltages to be set to different values.Type: GrantFiled: June 23, 2010Date of Patent: August 13, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Toba, Hiroyuki Nitta
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Patent number: 8502322Abstract: According to the nonvolatile memory device in one embodiment, contact plugs connect between second wires and third wires in a memory layer and a first wire connected to a control element. Drawn wire portions connect the second wires and the third wires with the contact plug. The drawn wire portion connected to the second wires and the third wires of the memory layer is formed of a wire with a critical dimension same as the second wires and the third wires and is in contact with the contact plug on an upper surface and both side surfaces of the drawn wire portion.Type: GrantFiled: March 10, 2011Date of Patent: August 6, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Hiroyuki Nitta
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Publication number: 20130076806Abstract: A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.Type: ApplicationFiled: November 26, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yoshiki Kurokawa, Yasuyuki Kudo, Hiroyuki Nitta, Kazuki Homma, Junya Takeda