Abstract: In a semiconductor device, a wiring pattern groove is formed in a surface portion of a silicon oxide film provided above a semiconductor substrate. A wiring layer is buried into the wiring pattern groove with a barrier metal film interposed therebetween. The barrier metal film is selectively removed from each sidewall portion of the wiring pattern groove. In other words, the barrier metal film is left only on the bottom of the wiring pattern groove. Thus, a damascene wiring layer having a hollow section whose dielectric constant is low between each sidewall of the wiring pattern groove and each side of the wiring layer can be formed in the semiconductor device.

Abstract: A nonvolatile semiconductor memory includes: a device region and a device isolating region, which have a pattern with a striped form that extends in a first direction, and are alternately and sequentially disposed at a first pitch in a second direction that is perpendicular to the first direction; and a contact made of a first conductive material, which is connected to the device region and disposed at the first pitch in the second direction. On a cross section of the second direction, the bottom width of the contact is longer than the top width of the contact, and the bottom width is longer than the width of the device region.

Abstract: A correction circuit produces correction data, which is used to shorten a response time in a display panel, using first display data received from an external device and second display data stored in a frame memory, and appends the correction data to the first display data. The correction circuit includes: a detection information production circuit that detects based on first color information, second color information, and third color information, which is inferred from the response characteristic of the display panel and represents a change of a gray-scale level from one level to other, whether a color gap is produced during the change of a gray-scale level from one level to other; and a production circuit that when the detection information production circuit detects that a color gap is produced during the change of a gray-scale level from one level to other, produces correction data for the purpose of preventing production of the color gap.

Abstract: A semiconductor memory device includes: a memory cell array having a plurality of data select lines disposed in parallel with each other, a plurality of data transfer line disposed in parallel with each other to intersect the data select lines, and electrically rewritable memory cells laid out at cross portions between the data select lines and data transfer lines; a data select line driver for driving the data select lines of the memory cell array; a sense amplifier circuit connected to the data transfer lines of the memory cell array, for performing data read of memory cells selected by one of the data select lines; and a control circuit used for timing control of data read of the memory cell array, for outputting at least two types of timing signals as being different in accordance with a selected data area of the memory cell array.

Abstract: In a semiconductor device, a wiring pattern groove is formed in a surface portion of a silicon oxide film provided above a semiconductor substrate. A wiring layer is buried into the wiring pattern groove with a barrier metal film interposed therebetween. The barrier metal film is selectively removed from each sidewall portion of the wiring pattern groove. In other words, the barrier metal film is left only on the bottom of the wiring pattern groove. Thus, a damascene wiring layer having a hollow section whose dielectric constant is low between each sidewall of the wiring pattern groove and each side of the wiring layer can be formed in the semiconductor device.

Abstract: A semiconductor memory device includes: a memory cell array having a plurality of data select lines disposed in parallel with each other, a plurality of data transfer line disposed in parallel with each other to intersect the data select lines, and electrically rewritable memory cells laid out at cross portions between the data select lines and data transfer lines; a data select line driver for driving the data select lines of the memory cell array; a sense amplifier circuit connected to the data transfer lines of the memory cell array, for performing data read of memory cells selected by one of the data select lines; and a control circuit used for timing control of data read of the memory cell array, for outputting at least two types of timing signals as being different in accordance with a selected data area of the memory cell array.

Abstract: A display control circuit divides M display data for M pixels assigned to each of plural display driving circuits among display data received in an order of an arrangement of pixels in a row, into plural display data sets each composed of N display data, rearranges the plural display data sets such that one of the plural display data sets assigned to one of the plural display driving circuits is followed by one of the plural display data sets assigned to another of the plural display driving circuits succeeding the one of the plural display driving circuits, and outputs the rearranged display data sets to the plural display driving circuits.

Abstract: A liquid crystal driving device for controlling a liquid crystal panel and a liquid crystal display apparatus. Reference voltages are generated in a data driver from input reference voltages, and reference voltages are selected in accordance with the settings of gray scale control registers thereby to control the gray scale voltages.

Abstract: A scan driver selects first four rows of pixels at a time and then sequentially selects second four rows of pixels for each row in double gate driving. A data driver supplies a tone voltage corresponding to black data to the first four row of pixels at a time and then sequentially supplies a tone voltage corresponding to display data to the second four rows of pixels.

Abstract: A display device of the present invention prevents the display flow of brightness lines on a screen. Lines of image data are inputted to a data driver circuit one after another for every horizontal scanning period of the image data. The data driver circuit alternately repeats (i) a first step for generating a display signal corresponding to each one of the lines of the image data one after another for a fixed period and outputting the display signal to a pixel array N-times (N being a natural number equal to or greater than 2) and (ii) a second step for generating a display signal which makes the luminance of the pixels lower than the luminance of the pixel in the first step for the fixed period and outputting the display signal to the pixel array M-times (M being a natural number smaller than N).

Abstract: A fast-write, high picture-quality LCD (Liquid Crystal Display) compatible with a high-resolution, large-sized liquid crystal panel. An output amplifier circuit of a liquid crystal driver circuit includes an amplifier configuration, which functions as an amplifier that amplifies the predetermined gray-scale voltage for output and as an amplifier that buffers the predetermined gray-scale voltage and outputs with no amplification, and a circuit for switching the above two types of amplifiers. In each horizontal period, a liquid crystal panel is driven by the amplified output for a predetermined period and by the buffered output for the rest of the period. A pre-charge control circuit is provided to check whether the gray-scale voltage is to be amplified depending upon display data.

Abstract: In a display device having a pixel array in which a plurality of pixels are arranged two-dimensionally along a first direction and a second direction, each of the pixels includes a pair of electrodes applying a voltage to liquid crystals, respective groups of the pixels arranged along the first direction form a plurality of pixel-rows juxtaposed along the second direction, and respective groups of the pixels arranged along the second direction form a plurality of pixel-columns juxtaposed along the first direction, the present invention repeats a first step for selecting every Y rows of the pixel-rows sequentially along the second direction N-times and applying an image signal to one of the pair of electrodes provided for each one of the pixels belonging to the each Y rows of the pixel-rows as selected, and a second step for selecting every Z rows of the pixel-rows sequentially along the second direction M-times and applying a blanking signal to the one of the pair of electrodes provided for each one of the pi

Abstract: A hold-type display device for eliminating blurring without damaging the display brightness of moving images. The display device includes a pixel array including a plurality of pixels, a plurality of first signal lines, a plurality of second signal lines, a first driving circuit outputting scanning signals to the plurality of first signal lines, and a second driving circuit outputting display signals to the plurality of second signal lines. The first driving circuit repeats a step for sequentially selecting the first signal lines every Y lines for every N times and a step for selecting the first signal lines every Z lines for every M times which follows the N times. The second driving circuit repeats outputting N times the display signals and outputting M times a blanking signal which masks an image displayed on corresponding pixels.

Abstract: A fast-write, high picture-quality LCD (Liquid Crystal Display) compatible with a high-resolution, large-sized liquid crystal panel. An output amplifier circuit of a liquid crystal driver circuit includes an amplifier configuration, which functions as an amplifier that amplifies the predetermined gray-scale voltage for output and as an amplifier that buffers the predetermined gray-scale voltage and outputs with no amplification, and a circuit for switching the above two types of amplifiers. In each horizontal period, a liquid crystal panel is driven by the amplified output for a predetermined period and by the buffered output for the rest of the period. A pre-charge control circuit is provided to check whether the gray-scale voltage is to be amplified depending upon display data.

Abstract: An information processing system includes a bus, a display data generating circuit coupled to the bus, and a display apparatus coupled to the bus. The display apparatus includes a display panel capable of displaying a grayscale image in accordance with display data in a form of a plurality of bits for each of a plurality of pixels of a display panel generated by the display data generating circuit, and a signal driver which supplies driving voltages corresponding to the display data to at least a part of the plurality of data lines to display a grayscale image on the display panel. The signal driver includes a display memory which stores the display data, and is embodied in an integrated circuit. The display data generating circuit transfers the display data to the display memory via the bus.

Abstract: In a hold-type display device such as a liquid crystal display device, a so-called blurring which appears on a profile of a displayed animated image or the like can be suppressed without damaging the brightness of the display image. According to the present invention, an image based on video data to be inputted to a display device is displayed for every frame period and, thereafter, the image is masked with a blanking image. Here, a ratio between an image display period of the video data and a blanking image display period in one frame period is adjusted based on the number of selection of pixel rows in a pixel array in response to a scanning clock for respective periods, frequency of the scanning clock, shortening of a horizontal period of display signal inputting to every pixel row with respect to a horizontal scanning period of the video data whereby the display image can be efficiently cancelled using the blanking image while ensuring the image display brightness of the video data.

Abstract: In a low power consumption data transmission circuit and method, and a liquid crystal display apparatus using the same, 24-bit display data is transmitted from a transceiver circuit to a receiver circuit through a transmission line so that the display data is displayed on a liquid crystal panel. The transceiver circuit has a holding circuit including an 8-stage shift register. The transceiver circuit outputs 24-bit data to the transmission line by use of first and second output circuits when data different from data held in the holding circuit is to be transmitted from the transmission line and outputs data indicative of a hold position in the holding circuit from the second output circuit when the same data as that held in the holding circuit is to be transmitted from the transmission line.

Abstract: A liquid crystal display device includes a liquid crystal panel; a plurality of data drivers for applying, to the pixel elements, graduation voltages corresponding to the display data; a gate driver for selecting a pixel element to which a graduation voltage is to be applied; and a liquid crystal control circuit for controlling the data drivers on the basis of a transfer clock. Each data driver includes a reproducing circuit for reproducing the transfer clock input to the data driver such that the deviations between the duties of the display data and the transfer clock input to the data driver and the duties of the display data and the transfer clock output from the data driver become small, and for generating a latch clock, and a latch circuit for latching the display data input to the data driver.

Abstract: The present invention can realize better display of a dynamic image, and in addition, can make storage capacity of a memory smaller. A data conversion circuit 112 compares display data 102 of an n-th frame from the outside and display data 116 of the (n−1)-th frame stored in the memory 104, to generate a driving data signal 117 to deliver to a driver. Each time when a memory control circuit 103 reads display data q0, q5, q10, q15 corresponding to 20 pixels out of the display data 116 of the (n−1)-th frame, the memory control circuit 103 compresses display data d0-d19 of 20 pixels out of the display data 102 of the n-th frame from the outside to generated d0, d5, d10, d15, and stores the generated data into the same area where the display data q0, q5, q10, q15 of the display data of the (n−1)-th frame have been stored.

Abstract: A display device for displaying display data including a display panel; a driving circuit which generates a gray-scale voltage corresponding to the display data and outputs the gray-scale voltage to the display panel; a scan driver which scans a line on the display panel to which the gray-scale voltage is output; and a control circuit which outputs the display data to the driving circuit and outputs a display control signal to the scan driver. A gray-scale display characteristic of the display data is changeable between a first state in which a difference in a brightness of the display panel between two adjacent display data values becomes smaller as a display data gray-scale increases, and a second state in which the difference in the brightness of the display panel between two adjacent display data values becomes larger as the display data gray-scale increases.