Patents by Inventor Hiroyuki Shiraki

Hiroyuki Shiraki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10347774
    Abstract: A problem addressed by an embodiment of the present invention lies in providing a UBM structure which includes thin layers and can prevent diffusion of solder into an electrode. The UBM structure according to an embodiment of the present invention includes: a first UBM layer on an electrode, a second UBM layer on the first UBM layer, and a passivated metal layer between the first UBM layer and the second UBM layer. The passivated metal layer functions as a barrier layer with respect to solder diffusion.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: July 9, 2019
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Noriyuki Kishi, Tatsuhiro Koizumi, Hiroyuki Shiraki, Mitsuru Tamashiro, Masaya Yamamoto
  • Publication number: 20190181081
    Abstract: A thermosetting resin composition according to the invention contains: a thermosetting resin component; and silica having an average particle diameter equal to or greater than 0.2 ?m and treated with isocyanate. It is preferable that the content of the silica is in a range of 50% by mass to 300% by mass with respect to the thermosetting resin component. It is also preferable that the thermosetting resin composition contains core shell rubber having content in a range of 20% by mass to 80% by mass with respect to the thermosetting resin component.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 13, 2019
    Inventors: Hiroki TAMIYA, Koji KISHINO, Ryuji TAKAHASHI, Yasunori HOSHINO, Takahiro YAMADA, Shimpei OBATA, Hiroyuki SHIRAKI, Shinya ARAKAWA, Shigetoshi FUJITA
  • Patent number: 9755098
    Abstract: An embodiment relates to a group II-VI semiconductor wafer of a radiation detector, and an embodiment relates to a method for producing same. An embodiment of the present invention provides a group II-VI semiconductor of a radiation detector enabling reduction or restriction of the edge effect (or the end surface effect) and a method for producing same. An embodiment of the present invention provides a radiation detector obtained by half-cutting or full-cutting a group II-VI semiconductor wafer having a zinc blende structure in which the wafer has a {001} plane main surface, and cut planes according to the half-cutting or full-cutting have an angle ? (?0°) relative to the slip direction of the wafer.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: September 5, 2017
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Noriyuki Kishi, Tatsuhiro Koizumi, Hiroyuki Shiraki, Mitsuru Tamashiro, Masaya Yamamoto
  • Publication number: 20160293538
    Abstract: A thermosetting resin composition according to the invention contains: a thermosetting resin component; and silica having an average particle diameter equal to or greater than 0.2 ?m and treated with isocyanate. It is preferable that the content of the silica is in a range of 50% by mass to 300% by mass with respect to the thermosetting resin component. It is also preferable that the thermosetting resin composition contains core shell rubber having content in a range of 20% by mass to 80% by mass with respect to the thermosetting resin component.
    Type: Application
    Filed: March 15, 2016
    Publication date: October 6, 2016
    Inventors: HIROKI TAMIYA, KOJI KISHINO, RYUJI TAKAHASHI, YASUNORI HOSHINO, TAKAHIRO YAMADA, SHIMPEI OBATA, HIROYUKI SHIRAKI, SHINYA ARAKAWA, SHIGETOSHI FUJITA
  • Publication number: 20160133776
    Abstract: An embodiment relates to a group II-VI semiconductor radiation detector, and an embodiment relates to a method for producing same. An embodiment of the present invention provides a radiation detector enabling reduction or restriction of the edge effect (or the end surface effect) and a method for producing same. An embodiment of the present invention provides a radiation detector obtained by half-cutting or full-cutting a group II-VI semiconductor wafer having a zinc blende structure in which the wafer has a {001} plane main surface, and cut planes according to the half-cutting or full-cutting have an angle ? (?°) relative to the slip direction of the wafer.
    Type: Application
    Filed: June 6, 2014
    Publication date: May 12, 2016
    Inventors: Noriyuki KISHI, Tatsuhiro KOIZUMI, Hiroyuki SHIRAKI, Mitsuru TAMASHIRO, Masaya YAMAMOTO
  • Publication number: 20150243801
    Abstract: A problem addressed by an embodiment of the present invention lies in providing a UBM structure which includes thin layers and can prevent diffusion of solder into an electrode. The UBM structure according to an embodiment of the present invention includes: a first UBM layer on an electrode, a second UBM layer on the first UBM layer, and a passivated metal layer between the first UBM layer and the second UBM layer. The passivated metal layer functions as a barrier layer with respect to solder diffusion.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 27, 2015
    Inventors: Noriyuki KISHI, Tatsuhiro KOIZUMI, Hiroyuki SHIRAKI, Mitsuru TAMASHIRO, Masaya YAMAMOTO
  • Publication number: 20130161773
    Abstract: A detector element is disclosed, including a semiconducting converter element and a number of pixilated contacts arranged thereon. A radiation detector is also disclosed including such a detector element, along with a medical device having one or more such radiation detectors. Finally, a method for producing a detector element is disclosed, which includes forming pixelated contacts by way of a photolithographic process on the semiconducting converter element using a lithographic mask arranged on a converter element protective layer.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 27, 2013
    Inventors: Fabrice DIERRE, Peter HACKENSCHMIED, Hiroshi KATAKABE, Noriyuki KISHI, Christian SCHRÖTER, Hiroyuki SHIRAKI, Matthias STRASSBURG, Mitsuru TAMASHIRO
  • Patent number: 8026182
    Abstract: In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: September 27, 2011
    Assignee: Sumco Corporation
    Inventors: Yoshinobu Nakada, Hiroyuki Shiraki, Takeshi Hasegawa
  • Patent number: 7670965
    Abstract: A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: March 2, 2010
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Yoshinobu Nakada, Hiroyuki Shiraki
  • Publication number: 20090127746
    Abstract: In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
    Type: Application
    Filed: December 19, 2008
    Publication date: May 21, 2009
    Applicant: SUMCO CORPORATION
    Inventors: Yoshinobu NAKADA, Hiroyuki Shiraki, Takeshi Hasegawa
  • Patent number: 7521381
    Abstract: A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: April 21, 2009
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Yoshinobu Nakada, Hiroyuki Shiraki
  • Patent number: 7481888
    Abstract: In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: January 27, 2009
    Assignee: Sumco Corporation
    Inventors: Yoshinobu Nakada, Hiroyuki Shiraki, Takeshi Hasegawa
  • Publication number: 20060208434
    Abstract: In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120° with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.
    Type: Application
    Filed: March 30, 2004
    Publication date: September 21, 2006
    Applicant: Sumco Corporation
    Inventors: Yoshinobu Nakada, Hiroyuki Shiraki, Takeshi Hasegawa
  • Patent number: 7026369
    Abstract: To provide an aqueous emulsion composition which has high adhesion strength for a wide variety of materials including molded products and affords sufficient wettability even for the object to be adhesive bonded of low surface polarity so that it can develop sufficient adhesiveness and whose emulsion is stable so satisfactorily as to provide good mechanical stability and storage stability, and to provide an adherent composition comprising the aqueous emulsion composition, at least ethylene-vinyl acetate copolymer or modified resin thereof, photo polymerization initiator, and unsaturated ethylenic monomer are mixed and dissolved or dispersed, to prepare oil drop component, followed by emulsifying the oil drop component in water by using a surface-active agent, whereby an aqueous emulsion composition, in which micelles each encapsulating at least the ethylene-vinyl acetate copolymer or modified resin thereof, the photo polymerization initiator and unsaturated ethylenic monomer are dispersed in water, is prepared
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: April 11, 2006
    Assignee: Mitsui Takeda Chemicals, Inc.
    Inventors: Kenji Kuroda, Susumu Okatani, Hiroyuki Shiraki
  • Patent number: 6979493
    Abstract: A polyurethane resin having a total concentration of the urethane group and the urea group of not less than 15% by weight is prepared by reacting a diisocyanate component (e.g., an aromatic diisocyanate) with a diol component (e.g., a C2–8alkylene glycol). The repeating unit of the polyurethane resin may contain a constitutive unit of an aromatic or alicyclic compound. The polyurethane resin may be shaped into a film for use as a gas barrier film. The film may be a gas barrier composite film composed of a base film layer and a resin layer at least comprising the polyurethane resin. The present invention provides a polyurethane resin excellent in gas barrier properties against water vapor, oxygen, aromatics, and others, and a film containing the same.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: December 27, 2005
    Assignee: Mitsui Takeda Chemical Inc.
    Inventors: Takashi Uchida, Tsutomu Tawa, Hiroyuki Shiraki
  • Publication number: 20050130452
    Abstract: A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.
    Type: Application
    Filed: February 9, 2005
    Publication date: June 16, 2005
    Applicant: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Yoshinobu Nakada, Hiroyuki Shiraki
  • Patent number: 6881788
    Abstract: Polyurethane resin water dispersion being good in storage stability and excellent in initial adhesion and resistance to moist heat, and aqueous polyurethane adhesive employing the polyurethane resin water dispersion. The polyurethane resin water dispersion is produced in the manner that polyisocyanate is allowed to react with polycaprolactone polyol comprising polycaprolactone polyol having a number average molecular weight of not less than 3,000 and active-hydrogen-group-containing compound having anionic group, to synthesize isocyanate terminated prepolymer, first, and, then, the isocyanate terminated prepolymer thus produced is allowed to react with polyamine in water. The use of the polyurethane resin water dispersion can produce the aqueous polyurethane adhesive having improved storage stability, initial adhesion and resistance to moist heat.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: April 19, 2005
    Assignee: Mitsui Takeda Chemicals, Inc.
    Inventors: Hyoue Shimizu, Hiroyuki Shiraki
  • Patent number: 6818197
    Abstract: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: November 16, 2004
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Kazuhiro Ikezawa, Ken Nakajima, Tamiya Karashima, Hiroyuki Shiraki
  • Patent number: 6693286
    Abstract: A first chopper between a laser device and a semiconductor substrate chops an excitation light at a specific frequency, and a second chopper between the first chopper and the semiconductor substrate chops the excitation light at a variable frequency higher than the first chopper. A photoluminescence light emitted by the semiconductor substrate when the semiconductor substrate is intermittently irradiated with the excitation light is introduced into a monochromator. A controller obtains the decay time constant T of the photoluminescence light from variation of the average intensity of the photoluminescence light when gradually increasing the chopping frequency of the excitation light by controlling the second chopper, and computes the life time &tgr; of the semiconductor substrate from an expression “&tgr;=T/C”, where C is a constant.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: February 17, 2004
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Takeshi Hasegawa, Terumi Ito, Hiroyuki Shiraki
  • Publication number: 20030207122
    Abstract: A polyurethane resin having a total concentration of the urethane group and the urea group of not less than 15% by weight is prepared by reacting a diisocyanate component (e.g., an aromatic diisocyanate) with a diol component (e.g., a C2-8alkylene glycol). The repeating unit of the polyurethane resin may contain a constitutive unit of an aromatic or alicyclic compound. The polyurethane resin may be shaped into a film for use as a gas barrier film. The film may be a gas barrier composite film composed of a base film layer and a resin layer at least comprising the polyurethane resin. The present invention provides a polyurethane resin excellent in gas barrier properties against water vapor, oxygen, aromatics, and others, and a film containing the same.
    Type: Application
    Filed: April 10, 2003
    Publication date: November 6, 2003
    Inventors: Takashi Uchida, Tsutomu Tawa, Hiroyuki Shiraki