Patents by Inventor Hiroyuki Tsurumi

Hiroyuki Tsurumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11437958
    Abstract: A power amplifying device according to an embodiment includes three or more BTL amplifiers and a closed loop section. The three or more BTL amplifiers include bridge-connected first and second output amplifiers and output a first output signal obtained by amplifying a first input signal. Switch circuits respectively corresponding to the three or more BTL amplifiers are connected in series in the closed loop section. The closed loop section is capable of forming a closed loop. An output terminal of the second output amplifier is connected to one end of the switch circuit corresponding to the second output amplifier. The switch circuit is turned on to establish connection between an output terminal of the first output amplifier and the output terminal of the second output amplifier and is turned off to break the connection between the output terminals.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: September 6, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Patent number: 11171617
    Abstract: A power amplifying device according to an embodiment includes first to fourth BTL amplifiers and first to third switch circuits. The first to fourth BTL amplifiers outputs a first to fourth output signal. The first switch circuit is turned on or off connection between an output of the second output amplifier and an output of the third output amplifier. The second switch circuit is turned on or off connection between an output of the fifth output amplifier and an output of the eighth output amplifier. The third switch circuit is turned on or off connection between an output of the fourth output amplifier and an output of the seventh output amplifier. The first to third switch circuits are turned on when the amplitudes of the first to fourth input signals are smaller than a first threshold.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: November 9, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices and Storage Corporation
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Publication number: 20210297045
    Abstract: A power amplifying device according to an embodiment includes three or more BTL amplifiers and a closed loop section. The three or more BTL amplifiers include bridge-connected first and second output amplifiers and output a first output signal obtained by amplifying a first input signal. Switch circuits respectively corresponding to the three or more BTL amplifiers are connected in series in the closed loop section. The closed loop section is capable of forming a closed loop. An output terminal of the second output amplifier is connected to one end of the switch circuit corresponding to the second output amplifier. The switch circuit is turned on to establish connection between an output terminal of the first output amplifier and the output terminal of the second output amplifier and is turned off to break the connection between the output terminals.
    Type: Application
    Filed: September 11, 2020
    Publication date: September 23, 2021
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Publication number: 20200162040
    Abstract: A power amplifying device according to an embodiment includes first to fourth BTL amplifiers and first to third switch circuits. The first to fourth BTL amplifiers outputs a first to fourth output signal. The first switch circuit is turned on or off connection between an output of the second output amplifier and an output of the third output amplifier. The second switch circuit is turned on or off connection between an output of the fifth output amplifier and an output of the eighth output amplifier. The third switch circuit is turned on or off connection between an output of the fourth output amplifier and an output of the seventh output amplifier. The first to third switch circuits are turned on when the amplitudes of the first to fourth input signals are smaller than a first threshold.
    Type: Application
    Filed: September 6, 2019
    Publication date: May 21, 2020
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Patent number: 9735762
    Abstract: An amplifier includes a first voltage generating circuit that generates a first clamp voltage based on a reference voltage and a first voltage, a second voltage generating circuit that generates a second clamp voltage based on the reference voltage and a second voltage that is lower than the first voltage, a third voltage generating circuit that generates a second AC voltage that changes with the same voltage amplitude in a vertical direction of the reference voltage, based on an input first AC voltage, within a voltage range of the first voltage and the first clamp voltage, or within a voltage range of the second clamp voltage and the second voltage, and an amplification circuit that amplifies the voltage amplitude of the second AC voltage and generates a third AC voltage.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: August 15, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuhiro Yasuda, Hiroyuki Tsurumi
  • Patent number: 9692371
    Abstract: The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: June 27, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Publication number: 20170149421
    Abstract: An amplifier includes a first voltage generating circuit that generates a first clamp voltage based on a reference voltage and a first voltage, a second voltage generating circuit that generates a second clamp voltage based on the reference voltage and a second voltage that is lower than the first voltage, a third voltage generating circuit that generates a second AC voltage that changes with the same voltage amplitude in a vertical direction of the reference voltage, based on an input first AC voltage, within a voltage range of the first voltage and the first clamp voltage, or within a voltage range of the second clamp voltage and the second voltage, and an amplification circuit that amplifies the voltage amplitude of the second AC voltage and generates a third AC voltage.
    Type: Application
    Filed: March 11, 2016
    Publication date: May 25, 2017
    Inventors: Katsuhiro Yasuda, Hiroyuki Tsurumi
  • Patent number: 9602070
    Abstract: The power amplifying device includes a first potential line to which a first potential is supplied, a second potential line to which a second potential that is lower than the first potential is supplied and a third potential line to which a third potential that is between the first potential and the second potential is supplied. The power amplifying device includes a first BTL amplifier unit. The power amplifying device includes a second BTL amplifier unit. The power amplifying device includes a third BTL amplifier unit. The power amplifying device includes a fourth BTL amplifier unit that has a seventh output amplifier and an eighth output amplifier.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: March 21, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroyuki Tsurumi
  • Publication number: 20160276993
    Abstract: The power amplifying device includes a first potential line to which a first potential is supplied, a second potential line to which a second potential that is lower than the first potential is supplied and a third potential line to which a third potential that is between the first potential and the second potential is supplied. The power amplifying device includes a first BTL amplifier unit. The power amplifying device includes a second BTL amplifier unit. The power amplifying device includes a third BTL amplifier unit. The power amplifying device includes a fourth BTL amplifier unit that has a seventh output amplifier and an eighth output amplifier.
    Type: Application
    Filed: September 8, 2015
    Publication date: September 22, 2016
    Inventor: Hiroyuki Tsurumi
  • Publication number: 20150270815
    Abstract: The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal.
    Type: Application
    Filed: June 8, 2015
    Publication date: September 24, 2015
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Patent number: 9083295
    Abstract: The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: July 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Patent number: 9036312
    Abstract: A semiconductor device for protecting loads from power surges includes a first resistor having a first end connected to a first supply terminal, a capacitor connected to a second end of the first resistor and a second supply terminal. There is a first transistor with a source connected to the first supply terminal and a gate connected to a point between the first resistor and the capacitor. A second resistor is connected between the drain of the first transistor and the second supply terminal, and a first diode is connected between the gate and the source of the first transistor. A second transistor has a drain connected to the first supply terminal, a source connected to the second supply terminal, and a gate connected to the drain of the first transistor. There is a second diode connected between the gate and the source of the second transistor.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: May 19, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Kato, Hiroyuki Tsurumi, Yukio Sato, Takehito Ikimura, Akira Kumamoto, Hiroyuki Yamamoto, Shoichi Imakake, Tooru Asakawa
  • Patent number: 8908886
    Abstract: The power amplifying apparatus includes a first comparator that compares the first detection signal and the fourth detection signal and outputs a first comparison signal depending on whether or not a difference between the first current and the fourth current is equal to or greater than a first predetermined value. The power amplifying apparatus includes a second comparator that compares the second detection signal and the third detection signal and outputs a second comparison signal depending on whether or not a difference between the second current and the third current is equal to or greater than a second predetermined value.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: December 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Publication number: 20140167850
    Abstract: The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal.
    Type: Application
    Filed: August 29, 2013
    Publication date: June 19, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Patent number: 8604842
    Abstract: The high-side switch circuit includes a first output MOS transistor that is connected, at a first end thereof, to a power supply terminal. The high-side switch circuit includes a second output MOS transistor that is connected to a second end of the first output MOS transistor at a first end thereof and to a voltage output terminal at a second end thereof. The high-side switch circuit includes a current detecting circuit that detects a current flowing through the first output MOS transistor and outputs a detection signal. The high-side switch circuit includes a first gate driver that applies a first control voltage to a gate of the first output MOS transistor. The high-side switch circuit includes a second gate driver that applies a second control voltage to a gate of the second output MOS transistor.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: December 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuki Sato, Hiroyuki Tsurumi
  • Patent number: 8552799
    Abstract: A power amplifying circuit includes first and second operational amplifiers. The power amplifying circuit includes first to fourth feedback resistor. The power amplifying circuit includes a fully differential operational amplifier that is connected to the output terminal of the first operational amplifier at a non-inverting input terminal thereof, to the output terminal of the second operational amplifier at an inverting input terminal thereof, to a first signal output terminal at a non-inverting output terminal thereof, and to a second signal output terminal at an inverting output terminal thereof and maintains a constant differential gain. The power amplifying circuit includes a switching circuit. The power amplifying circuit includes first and second input resistors. The power amplifying circuit includes a midpoint potential controlling circuit that monitors a power supply voltage and controls the switching circuit.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: October 8, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroyuki Tsurumi
  • Publication number: 20130242449
    Abstract: A semiconductor device for protecting loads from power surges includes a first resistor having a first end connected to a first supply terminal, a capacitor connected to a second end of the first resistor and a second supply terminal. There is a first transistor with a source connected to the first supply terminal and a gate connected to a point between the first resistor and the capacitor. A second resistor is connected between the drain of the first transistor and the second supply terminal, and a first diode is connected between the gate and the source of the first transistor. A second transistor has a drain connected to the first supply terminal, a source connected to the second supply terminal, and a gate connected to the drain of the first transistor. There is a second diode connected between the gate and the source of the second transistor.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 19, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro KATO, Hiroyuki TSURUMI, Yukio SATO, Takehito IKIMURA, Akira KUMAMOTO, Hiroyuki YAMAMOTO, Shoichi IMAKAKE, Tooru ASAKAWA
  • Publication number: 20130195289
    Abstract: The power amplifying apparatus includes a first comparator that compares the first detection signal and the fourth detection signal and outputs a first comparison signal depending on whether or not a difference between the first current and the fourth current is equal to or greater than a first predetermined value. The power amplifying apparatus includes a second comparator that compares the second detection signal and the third detection signal and outputs a second comparison signal depending on whether or not a difference between the second current and the third current is equal to or greater than a second predetermined value.
    Type: Application
    Filed: June 5, 2012
    Publication date: August 1, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira YAMAUCHI, Hiroyuki TSURUMI
  • Publication number: 20130049813
    Abstract: The high-side switch circuit includes a first output MOS transistor that is connected, at a first end thereof, to a power supply terminal. The high-side switch circuit includes a second output MOS transistor that is connected to a second end of the first output MOS transistor at a first end thereof and to a voltage output terminal at a second end thereof. The high-side switch circuit includes a current detecting circuit that detects a current flowing through the first output MOS transistor and outputs a detection signal. The high-side switch circuit includes a first gate driver that applies a first control voltage to a gate of the first output MOS transistor. The high-side switch circuit includes a second gate driver that applies a second control voltage to a gate of the second output MOS transistor.
    Type: Application
    Filed: March 21, 2012
    Publication date: February 28, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuki Sato, Hiroyuki Tsurumi
  • Publication number: 20130038395
    Abstract: A power amplifying circuit includes first and second operational amplifiers. The power amplifying circuit includes first to fourth feedback resistor. The power amplifying circuit includes a fully differential operational amplifier that is connected to the output terminal of the first operational amplifier at a non-inverting input terminal thereof, to the output terminal of the second operational amplifier at an inverting input terminal thereof, to a first signal output terminal at a non-inverting output terminal thereof, and to a second signal output terminal at an inverting output terminal thereof and maintains a constant differential gain. The power amplifying circuit includes a switching circuit. The power amplifying circuit includes first and second input resistors. The power amplifying circuit includes a midpoint potential controlling circuit that monitors a power supply voltage and controls the switching circuit.
    Type: Application
    Filed: March 13, 2012
    Publication date: February 14, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hiroyuki TSURUMI