Patents by Inventor Hiroyuki Uchida

Hiroyuki Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150295252
    Abstract: A metallic separator for fuel cells having a metal plate, an electroconductive coating layer covering at least a surface in front and back surfaces of the metal plate which contacts a raw material and/or a reaction product, and an electroconductive channel-forming member disposed on a surface of the coating layer and forming a channel for the raw material and/or the reaction product and/or a channel for a cooling medium for cooling. A surface layer on the metal plate has a tensile residual stress within such a range that no stress-corrosion cracking occurs.
    Type: Application
    Filed: June 24, 2015
    Publication date: October 15, 2015
    Applicant: UNIVERSITY OF YAMANASHI
    Inventors: Masahiro WATANABE, Hiroyuki UCHIDA, Hisao YAMASHITA, Kenji MIYATAKE
  • Publication number: 20150295169
    Abstract: Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least alloy of CoPt, FePt, and Ru.
    Type: Application
    Filed: June 26, 2015
    Publication date: October 15, 2015
    Inventors: Hiroyuki OHMORI, Masanori HOSOMI, Kazuhiro BESSHO, Yutaka HIGO, Kazutaka YAMANE, Hiroyuki UCHIDA, Tetsuya ASAYAMA
  • Patent number: 9147455
    Abstract: A storage element includes: a storage layer which has magnetization perpendicular to a film surface, the direction of the magnetization being changed in accordance with information; a magnetization fixed layer which has magnetization perpendicular to a film surface used as a base of information stored in the storage layer; and an insulating layer of a nonmagnetic substance provided between the storage layer and the magnetization fixed layer. In the storage element described above, the magnetization of the storage layer is reversed using a spin torque magnetization reversal generated by a current flowing in a lamination direction of a layer structure including the storage layer, the insulating layer, and the magnetization fixed layer to store information, and the storage layer has a laminate structure including a magnetic layer and a conductive oxide.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: September 29, 2015
    Assignee: SONY CORPORATION
    Inventors: Kazuhiro Bessho, Masanori Hosomi, Hiroyuki Ohmori, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9135210
    Abstract: In one embodiment of the present invention, processor 1000 comprising a plurality of processor cores for processing an instruction-execution sequence is provided. Signal path 140 that is able to communicate an inter-core interrupt signal fint is connected to at least two processor cores 100A and 100B. Each core of the at least two cores has an inter-core interrupt count setting register (ICSR) 110 and a FIFO counter 120. Inter-core interrupt synchronization function, inter-core interrupt generation function, and FIFO counter updating function are implemented to the every core. In embodiments of the present invention, a core and a method therefor are also provided.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: September 15, 2015
    Assignee: TOPS SYSTEMS CORPORATION
    Inventors: Yukoh Matsumoto, Hiroyuki Uchida
  • Publication number: 20150255134
    Abstract: Provided is a storage cell that makes it possible to enhance magnetic characteristics of magnetization pinned layer, a storage device and a magnetic head that include the storage cell. The storage cell includes a layer structure including a base layer, a storage layer in which a direction of magnetization is varied in correspondence with information, a magnetization pinned layer that is formed above the base layer and has magnetization that is perpendicular to a film surface and serves as a reference of information stored in the storage layer, and an intermediate layer that is provided between the storage layer and the magnetization pinned layer and is made of a nonmagnetic body. The base layer has a laminated structure of ruthenium and a nonmagnetic body having a face-centered cubic lattice, and the ruthenium is formed at a location adjacent to the magnetization pinned layer.
    Type: Application
    Filed: August 22, 2013
    Publication date: September 10, 2015
    Inventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Kazutaka Yamane
  • Publication number: 20150253914
    Abstract: A glass film laminate (1) for a touch panel includes a glass film (2), a glass film (3), a glass film (4), and transparent adhesive layers (5). The glass films (2), (4) form both outermost layers. The glass film (3) has a transparent conductive layer (6) formed on each of both surfaces thereof. The glass films (2), (3), (4) each have a thickness of 200 ?m or less. The glass film laminate (1) for a touch panel itself assumes a curved state without the application of an external force, in which a curved concave surface (21) and a curved convex surface (41) are formed. The curved concave surface (21) has formed therein a compressive stress, and the curved convex surface (41) has formed therein a tensile stress.
    Type: Application
    Filed: September 25, 2013
    Publication date: September 10, 2015
    Applicant: Nippon Electric Glass Co., Ltd.
    Inventors: Seiji Hamada, Hiroyuki Uchida, Hiroaki Tanaka, Michiharu Eta
  • Publication number: 20150249207
    Abstract: Provided is a storage cell that makes it possible to improve TMR characteristics, a storage device and a magnetic head that include the storage cell. The storage cell includes a layer structure including a storage layer in which a direction of magnetization is varied in correspondence with information, a magnetization pinned layer having magnetization that is perpendicular to a film surface and serves as a reference of information stored in the storage layer, and an intermediate layer that is provided between the storage layer and the magnetization pinned layer and is made of a nonmagnetic body. Carbon is inserted in the intermediate layer, and feeding a current in a laminating direction of the layer structure allows the direction of magnetization in the storage layer to be varied, to allow information to be recorded in the storage layer.
    Type: Application
    Filed: August 22, 2013
    Publication date: September 3, 2015
    Inventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Kazutaka Yamane
  • Publication number: 20150235688
    Abstract: According to some aspects, a layered structure includes a memory layer, a magnetization-fixed layer, and a tunnel insulating layer. The memory layer has magnetization perpendicular to a film face in which a direction of the magnetization is configured to be changed according to information by applying a current in a lamination direction of the layered structure. The magnetization-fixed layer has magnetization parallel or antiparallel to the magnetization direction of the memory layer and comprises a laminated ferripinned structure including a plurality of ferromagnetic layers and one or more non-magnetic layers, and includes a layer comprising an antiferromagnetic material formed on a first ferromagnetic layer of the plurality of ferromagnetic layers and situated between the first ferromagnetic layer and the non-magnetic layer. The tunnel insulating layer is located between the memory layer and the magnetization-fixed layer.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Applicant: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Publication number: 20150228889
    Abstract: There is provided a storage element including a layered construction including a storage layer that has magnetization perpendicular to a surface of the storage layer and whose direction of magnetization is changed corresponding to information, a pinned magnetization layer that has magnetization perpendicular to a surface of the pinned magnetization layer and serves as a standard for information stored in the storage layer, and an insulating layer that is composed of a non-magnetic material and is provided between the storage layer and the pinned magnetization layer.
    Type: Application
    Filed: August 9, 2013
    Publication date: August 13, 2015
    Applicant: SONY CORPORATION
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Publication number: 20150221862
    Abstract: A magnetoresistive element includes a laminated structure including a plurality of fixed layers, an intermediate layer formed of a non-magnetic material, and a recording layer, the plurality of fixed layers being laminated via a non-magnetic layer, the plurality of fixed layers having at least a first fixed layer and a second fixed layer, the following formula being satisfied: S1>S2 (wherein S1 is an area of a portion of the first fixed layer adjacent to the intermediate layer, which faces the intermediate layer, and S2 is an area of the fixed layer having the smallest area out of the fixed layers other than the first fixed layer).
    Type: Application
    Filed: January 28, 2015
    Publication date: August 6, 2015
    Inventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane
  • Patent number: 9099690
    Abstract: A metallic separator for fuel cells having a metal plate, an electroconductive coating layer covering at least a surface in front and back surfaces of the metal plate which contacts a raw material and/or a reaction product, and an electroconductive channel-forming member disposed on a surface of the coating layer and forming a channel for the raw material and/or the reaction product and/or a channel for a cooling medium for cooling. A surface layer on the metal plate has a tensile residual stress within such a range that no stress-corrosion cracking occurs.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: August 4, 2015
    Assignee: University of Yamanashi
    Inventors: Masahiro Watanabe, Hiroyuki Uchida, Hisao Yamashita, Kenji Miyatake
  • Patent number: 9099642
    Abstract: Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least one alloy of Co, Fe, Pd, and Pt.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: August 4, 2015
    Assignee: SONY CORPORATION
    Inventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9093211
    Abstract: A storage element includes a storage layer having a magnetization perpendicular to a layer surface and storing information according to a magnetization state of a magnetic material; a fixed magnetization layer having the magnetization as a reference of the information of the storage layer and perpendicular to the layer surface; an interlayer formed of a nonmagnetic material and interposed between the storage layer and the fixed magnetization layer; a coercive force enhancement layer adjacent to the storage layer, opposite to the interlayer, and formed of Cr, Ru, W, Si, or Mn; and a spin barrier layer formed of an oxide, adjacent to the coercive force enhancement layer, and opposite to the storage layer. The storage layer magnetization is reversed using spin torque magnetization reversal caused by a current in a lamination direction of a layer structure including the storage layer, the interlayer, and the fixed magnetization layer, thereby storing information.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: July 28, 2015
    Assignee: SONY CORPORATION
    Inventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9070462
    Abstract: A memory element has a layered structure, including a memory layer that has magnetization perpendicular to a film face in which a magnetization direction is changed depending on information, and includes a Co—Fe—B magnetic layer, the magnetization direction being changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer, a magnetization-fixed layer having magnetization perpendicular to a film face that becomes a base of the information stored in the memory layer, and an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, a first oxide layer and a second oxide layer.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: June 30, 2015
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Patent number: 9053800
    Abstract: There is provided a memory element having a layered structure, including a memory layer having magnetization perpendicular to a film face in which a magnetization direction is changed corresponding to information, and including a Co—Fe—B magnetic layer and at least on non-magnetic layer; the magnetization direction being changed by flowing a current in a lamination direction of the layered structure to record the information in the memory layer, a magnetization-fixed layer having magnetization perpendicular to the film face that becomes a base of the information stored in the memory layer, and an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, further including a laminated structure where an oxide layer, the Co—Fe—B magnetic layer and the non-magnetic layer are laminated is formed.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: June 9, 2015
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Patent number: 9048416
    Abstract: According to some aspects, a layered structure includes a memory layer, a magnetization-fixed layer, and a tunnel insulating layer. The memory layer has magnetization perpendicular to a film face in which a direction of the magnetization is configured to be changed according to information by applying a current in a lamination direction of the layered structure. The magnetization-fixed layer has magnetization parallel or antiparallel to the magnetization direction of the memory layer and comprises a laminated ferripinned structure including a plurality of ferromagnetic layers and one or more non-magnetic layers, and includes a layer comprising an antiferromagnetic material formed on a first ferromagnetic layer of the plurality of ferromagnetic layers and situated between the first ferromagnetic layer and the non-magnetic layer. The tunnel insulating layer is located between the memory layer and the magnetization-fixed layer.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: June 2, 2015
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Publication number: 20150145080
    Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and in regard to the insulating layer and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film.
    Type: Application
    Filed: January 6, 2015
    Publication date: May 28, 2015
    Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
  • Publication number: 20150137288
    Abstract: Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least one alloy of Co, Fe, Pd, and Pt.
    Type: Application
    Filed: December 3, 2014
    Publication date: May 21, 2015
    Inventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9025362
    Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and in regard to the insulating layer and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: May 5, 2015
    Assignee: Sony Corporation
    Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
  • Publication number: 20150109851
    Abstract: A memory device includes multiple bit lines extending in a first direction, multiple word lines extending in a second direction crossing the first direction, and multiple memory cells each coupled to corresponding two word lines and corresponding two bit lines. Each memory cell includes a memory element configured to store information on the basis of changes in resistance and two select transistors. One terminal of the memory element is coupled to one of the two bit lines corresponding to the memory cell; the other terminal is coupled to respective drains of the select transistors; respective sources of the select transistors are coupled to the other bit line; a gate of one of the select transistors is coupled to one of the two word lines corresponding to the memory cell; and a gate of the other is coupled to the other word line.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 23, 2015
    Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida