Patents by Inventor Hisao Asakura

Hisao Asakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6020228
    Abstract: The method of manufacturing a semiconductor integrated circuit device, which has an n-channel MIS transistor and a p-channel MIS transistor formed in the same semiconductor substrate, comprises ion implantation processes using the same photoresist as masks. The ion implantation processes include a step of injecting an impurity ion into the semiconductor substrate 1 to form the source and drain of an n-channel MOSFET 3n, a p type semiconductor region 4p for suppressing the short channel effect, and an n-well power supply region 10n, and a step of injecting an impurity ion into the semiconductor substrate 1 to form the source and drain of a p-channel MOSFET 3p, an n type semiconductor region 4n for suppressing the short channel effect, and a p-well power supply region 10p.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: February 1, 2000
    Assignee: Hitachi, Ltd.
    Inventor: Hisao Asakura
  • Patent number: 4633187
    Abstract: A demodulating circuit for an amplitude-modulated signal comprises an input terminal to be supplied with an input signal comprising at least a modulated carrier signal amplitude-modulated by an information signal, the modulated carrier signal having a predetermined phase; an oscillator for generating a first demodulating carrier the phase of which is displaced from that of the modulated carrier signal by 90.degree.
    Type: Grant
    Filed: April 26, 1985
    Date of Patent: December 30, 1986
    Assignee: Sony Corporation
    Inventors: Yoshikazu Nishimura, Yoshimi Yasukouchi, Hisao Asakura