Patents by Inventor Hisao Okada

Hisao Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5621426
    Abstract: A driving circuit for driving a display apparatus, includes: a control signal generating unit for generating a plurality of control signals in accordance with digital video data; a voltage signal output unit for receiving the plurality of control signals and selectively outputting at least one of a plurality of voltage signals supplied from a voltage supply unit in response to the plurality of control signals; and a signal delay unit, when a predetermined change occurs for each of the plurality of control signals, for transmitting the predetermined change to the voltage signal output unit with a predetermined period .DELTA.t delayed.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: April 15, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Tadatsugu Nishitani, Toshihiro Yanagi
  • Patent number: 5608421
    Abstract: A drive circuit for a display apparatus having parallel signal electrodes has at least one voltage selecting circuit, a plurality of signal voltage circuits, and one selection signal circuit. The voltage selecting circuit selects one of voltages having different levels in accordance with an input digital video signal. The signal voltage circuits are respectively provided for the signal electrodes, and include one signal line which is disposed between the voltage circuit and the respective signal electrode. The signal line is provided with an input switch, a capacitor and an output switch. The selection signal circuit generates a signal for controlling the input switches of the signal voltage circuits to be sequentially closed.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: March 4, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hisao Okada
  • Patent number: 5583531
    Abstract: A method of driving a display apparatus includes the steps of receiving output requests at a interval and outputting an oscillating voltage to a source line connected to display section, the oscillating voltage including a component which oscillates during one output period of time defined by the output requests.
    Type: Grant
    Filed: August 25, 1994
    Date of Patent: December 10, 1996
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Takeshi Takarada, Tadatsugu Nisitani, Toshihiro Yanagi, Hirofumi Fukuoka, Yoshiharu Kanatani, Kuniaki Tanaka
  • Patent number: 5561442
    Abstract: A method for driving a display device including a display medium; a pair of substrates opposed to each other and interposing the display medium therebetween; a common electrode provided on one of the pair of substrates; and a switching element, a scanning electrode for applying a voltage for controlling the switching element to be in one of an ON state and an OFF state, and a signal electrode for applying a voltage in accordance with image data to the display medium, all of which are provided on the other substrate of the pair of substrates.
    Type: Grant
    Filed: October 16, 1995
    Date of Patent: October 1, 1996
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Toshihiro Yanagi, Yuji Yamamoto
  • Patent number: 5548375
    Abstract: A printing system capable of automatically controlling a plurality of printing devices with a minimized number of operators, includes a common handling mechanism for transporting and supplying coloring agents to the plurality of printing devices, a mechanism for handling printed media therebetween, each printing device being provided with printing media loader, and a common expendables handler for transporting expendables to the plurality of printing devices having automatic expendable loaders. The printing system further includes cutters for cutting printed media and collecting them from the printing devices, and a common handler for transporting the collected printed media to the post-process device, thereby, maintaining the operating environment of the printing devices clean and safe at a reduced cost and with the least possible workload.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: August 20, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Teruaki Mitsuya, Hisao Okada, Nobuyoshi Hoshi
  • Patent number: 5537129
    Abstract: A common electrode driving circuit for use in a display apparatus including a first substrate; a second substrate opposed to the first substrate with a display medium interposed therebetween; a plurality of pixel electrodes, a plurality of common electrode driving terminals provided on a surface of the first substrate opposed to the second substrate; and at least one common electrode provided on a surface of the second substrate opposed to the first substrate. The common electrode is opposed to the plurality of pixel electrodes and is connected to the plurality of common electrode driving terminals respectively through a plurality of common electrode transfer resistances.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: July 16, 1996
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Tadatsugu Nishitani, Yuji Yamamoto, Takeshi Takarada
  • Patent number: 5521611
    Abstract: In the driving circuit for a display apparatus according to the present invention, a charging circuit applies a voltage equal to or higher than the highest positive gradation voltage to each data line for a predetermined period of time before the start of a period for applying a positive gradation voltage. After that, a positive gradation voltage in accordance with data is applied to each data line. Then, a period for the applying a negative gradation voltage is started, when a negative gradation voltage in accordance with data is applied to each data line. Accordingly, after being charged with a voltage applied by the charging circuit at the beginning of each cycle of the AC driving, each data line is applied with an equal or lower gradation voltage. Alternatively, a discharging circuit first applies a voltage equal to or lower than the lowest negative gradation voltage to each data line for a predetermined period of time before the start of a period for applying a negative gradation voltage.
    Type: Grant
    Filed: October 27, 1993
    Date of Patent: May 28, 1996
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Takeshi Takarada, Masaru Tanaka
  • Patent number: 5473387
    Abstract: The field decision circuit includes: a field information generating circuit for outputting one of a plurality of signals as a first field information for each field in response to a pulse signal; a comparator for outputting a comparison result indicating whether the first field information agrees with second field information from an external circuit for each field; a memory for storing a predetermined number of comparison results over the predetermined number of fields; an evaluation circuit for outputting an evaluation result obtained by evaluating whether the predetermined number of comparison results satisfy a predetermined relationship; and a correction circuit for supplying the pulse signal to the field information generating circuit in accordance with the evaluation result.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: December 5, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Yuji Yamamoto
  • Patent number: 5440323
    Abstract: A drive circuit for a display apparatus having parallel signal electrodes has at least one voltage selecting circuit, a plurality of signal voltage circuits, and one selection signal circuit. The voltage selecting circuit selects one of voltages having different levels in accordance with an input digital video signal. The signal voltage circuits are respectively provided for the signal electrodes, and include one signal line which is disposed between the voltage circuit and the respective signal electrode. The signal line is provided with an input switch, a capacitor and an output switch. The selection signal circuit generates a signal for controlling the input switches of the signal voltage circuits to be sequentially closed.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: August 8, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hisao Okada
  • Patent number: 5402142
    Abstract: A drive circuit for a display apparatus includes an input section for receiving a digital video signal, a voltage supply section for generating a common electrode voltage and a plurality of gradation voltages, a driving section for selecting one of the plurality of gradation voltages according to the input digital video signal and applying the selected gradation voltage to one of the pixel electrodes, and for applying the common electrode voltage to the common electrode, the common electrode voltage being shifted based on a certain relationship so that a central value of the common electrode voltage is different from central values of the gradation voltages.
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: March 28, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Yuji Yamamoto, Tadatsugu Nishitani, Toshihiro Yanagi
  • Patent number: 5367314
    Abstract: A drive circuit for a display apparatus having parallel signal electrodes has at least one voltage selecting circuit, a plurality of signal voltage circuits, one selection signal circuit, and one control signal circuit. The voltage selecting circuit selects one of voltages having different levels in accordance with an input digital video signal. The signal voltage circuits are respectively provided for the signal electrodes, and include two signal lines which are disposed between the voltage selecting circuit and the respective signal electrode. Each of the two signal lines is provided with a input switch, a capacitor and an output switch. The selection signal circuit generates a signal for controlling the two input switches of one of the signal voltage circuits to alternatingly receive a selected voltage from the voltage selecting circuit.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: November 22, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Kuniaki Tanaka
  • Patent number: 5331387
    Abstract: A printing and binding system and method utilize an electrophotographic apparatus for performing a printing operation so that a plurality of booklets can be simultaneously printed and bound even if the quantity to be printed is not large. Rolled paper is cut in a pre-treatment portion i a direction in which the rolled paper is supplied, into sizes each corresponding to a desired booklet so as to prepare cut paper sheets, then the same pages of booklets of a number which can be printed are simultaneously printed on the cut paper sheets in a printing portion, and then the next pages of the booklets are sequentially printed on the next cut paper sheets. After the pages of a plurality of booklets which can be printed simultaneously have been printed, the printed paper sheets for a plurality of the booklets are conveyed to a post-treatment portion so as to be cut into individual booklets so that desired booklets are bound. If the required number of the booklets has not been bound, the aforesaid steps are repeated.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: July 19, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hisao Okada, Kunio Satoh, Takao Umeda
  • Patent number: 5258841
    Abstract: In a horizontal synchronizing signal separation circuit, from a composite synchronizing signal which includes a horizontal synchronizing signal and a vertical synchronizing signal, a detection signal indicative of detection of a rising edge of the composite synchronizing signal is generated. A gate is provided through which the detection signal is passed in accordance with a control signal. The control signal is a pulse signal having a predetermined pulse width, which is generated by a circuit to which the output of the gate is input. The output of the gate is also supplied to another circuit which generates a separated horizontal synchronizing signal.
    Type: Grant
    Filed: August 8, 1991
    Date of Patent: November 2, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Kuniaki Tanaka, Shigeyuki Uehira
  • Patent number: 5247359
    Abstract: Field information for a predetermined number of fields produced by another field judgment circuit is stored in a first memory. The output of the field decision circuit which is indicative of the field information for the predetermined number of fields is stored in a second memory. The contents of the first memory are compared with those of the second memory. When the contents of the first memory disagree with the contents of the second memory for all of the predetermined number of fields, the field information is output as the field information from the field decision circuit.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: September 21, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Yuji Yamamoto
  • Patent number: 5245431
    Abstract: In a synchronizing signal selection circuit, in response to the input of a vertical synchronizing signal extracted from a composite synchronizing signal, a control signal is generated. The control signal is in a predetermined state during a period which begins when a first predetermined time period has elapsed after the input of the vertical synchronizing signal, and which terminates when a second predetermined time period has elapsed after the input of the vertical synchronizing signal. The composite synchronizing signal is output when the control signal is in the predetermined state, and a horizontal synchronizing signal separated the composite synchronizing signal is output when the control signal is in a state other than the predetermined state.
    Type: Grant
    Filed: August 8, 1991
    Date of Patent: September 14, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Shigeyuki Uehira, Kuniaki Tanaka, Katumi Miki, Miki Fukuyama
  • Patent number: 5132794
    Abstract: The horizontal synchronizing signal separation circuit extracts pulses indicative of horizontal synchronizing timing from a composite synchronizing signal which includes a horizontal synchronizing signal and a vertical synchronizing signal. When detecting the rising edge of the composite synchronizing signal, a rising edge detection circuit generates a pulse signal. A counter counts the number of the pulses in a clock signal. The output of the counter is supplied to a decoder which decodes the output of the counter and outputs timing signals. Using the timing signals, a control signal is generated to control a gate to which the output of the rising edge detection circuit is supplied. The output of the gate is used for generating a separated horizontal synchronizing signal.
    Type: Grant
    Filed: June 11, 1991
    Date of Patent: July 21, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hisao Okada, Kuniaki Tanaka
  • Patent number: 5107335
    Abstract: A second IF signal is counted either directly or indirectly. An AFC operation is performed based on the counting result. A plurality of count periods (A1, C1) are provided within a video signal period (Y+H) including a horizontal blanking period, and the plurality of count periods (A1, C1) are randomly shifted for each field. An AFC operation is performed based on a plurality of counting results in a plurality of field periods which correspond to one cycle of an energy diffusion signal.
    Type: Grant
    Filed: September 27, 1990
    Date of Patent: April 21, 1992
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takao Nishiyama, Hisao Okada, Tatsuaki Doumura
  • Patent number: 5024093
    Abstract: A fan-shaped scanning flaw detecting apparatus which includes a probe provided with an ultrasonic wave transmitting-and-receiving array transducer arranged along a circular arc and an acoustic lens for converging and converting an ultrasonic beam transmitted/received by the array transducer into a substantially parallel beam. The apparatus also includes a scanning function section that sequentially switches the transmitting and receiving operation of a group of operative transducer elements of the array transducer so as to make the ultrasonic beam perform fan-shaped scanning. A picturizing processor section forms a sectional image of an object to be examined on the basis of an echo signal obtained from the object to be examined and a display section displays the sectional image. A position detecting section detects a position where the ultrasonic beam is incident to the object to be examined when the probe is moved along a surface of the object to be examined.
    Type: Grant
    Filed: March 2, 1990
    Date of Patent: June 18, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Souji Sasaki, Hirotoshi Kino, Yoshinori Musha, Jun Kubota, Hisao Okada
  • Patent number: 5024094
    Abstract: In a system for irradiating an ultrasonic beam and imaging the insides of plate-shaped and layer-shaped samples, by using the difference between the sound velocities of a liquid medium and a sample from an ultrasonic transducer to the surface of the sample, the focusing condition is arithmetically operated from the distance between the transducer and the imaging surface which is obtained from the surface echo, and a focal point is set to an arbitrary surface in the sample, thereby correcting a phenomenon such that the focal point of the ultrasonic beam focused into the sample non-linearly moves. Thus, even if the sample is distorted, curved, or inclined, the surface can be imaged at a high resolution and a finer imaging picture can be obtained.
    Type: Grant
    Filed: December 12, 1988
    Date of Patent: June 18, 1991
    Assignee: Hitaci, Ltd.
    Inventors: Jun Kubota, Hirotoshi Kino, Yosinori Musha, Hisao Okada
  • Patent number: 4813069
    Abstract: A computer system is disclosed which has an automatic answering telephone function. The system comprises a main control unit, a telephone control unit, a voice information storage medium, a program unit for automatic telephone answering and processing, a program unit for performing data processing, and a mode setting circuit for setting the automatic telephone answering and the data processing to be performed. Either of the above program units may be started for operation by the mode setting circuit.
    Type: Grant
    Filed: November 13, 1986
    Date of Patent: March 14, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Nobuo Tanaka, Satoshi Tominaga, Hisao Okada, Toshihiko Yoshida