Abstract: A field-emission cold cathode having emitters 9 formed on silicon substrate 1, and a gate electrode film 7 formed on insulation film 6 and having openings over the emitters, further includes trenches 3 formed in silicon substrate 1, a plurality of emitters formed on regions surrounded by trenches 3, and n-type regions 5 formed on the silicon substrate directly below the emitters. Breakdowns caused by field concentrations brought about by the spread of current directly below the emitters can thus be prevented, and thus the emitter pitch within regions surrounded by trenches can be determined at will. When high voltage is impressed due to a discharge, the resistance connected to the emitters prevents the flow of large currents to the emitters and the occurrence of short-circuit damage.

Abstract: In a multi-emitter electron gun of a field-emission type constructed by the integrated circuit technique, each emitter comprising an emission electrode having an emissive point, an extracting gate electrode, and a focusing electrode, the focusing electrode in a peripheral zone of the multi-emitter electron gun is brought to a lower electric potential as compared with that in a central zone so that the emitter in the peripheral zone has a beam convergence higher than that of the emitter in the central zone. Instead, the focusing electrode in the peripheral zone has a greater thickness as compared with that in the central zone. Alternatively, the focusing electrode in the peripheral zone has a smaller aperture as compared with that in the central zone. Alternatively, the interval between the extracting gate electrode and the focusing electrode is wider in the emitter in the central zone as compared with that in the peripheral zone.

Abstract: The present invention provides an emitter structure of a field emission electron gun. The emitter structure comprises an emitter being electrically conductive and being pointed at the top, wherein the top of the emitter has the highest resistance of every other part, so that the top of the emitter has the highest heat energy of every other part when the emitter emits electrons.

Abstract: A variable-capacitance device has an n-type diffusion layer which has an impurity concentration profile such that a region where the impurity concentration remains substantially constant and a region where the impurity concentration changes abruptly are alternately repeated, and the impurity concentration increases as the deepness from the surface increases. The impurity concentration profile can be achieved by implanting n-type impurity atoms a plurality of times with different energies in an ion implantation process or varying the concentration of n-type impurity atoms such as of phosphorus added upon epitaxial layer growth. The variable-capacitance device, and a semiconductor integrated circuit device composed of a plurality of such variable-capacitance devices can be fabricated on a semiconductor substrate, and are highly stable.

Abstract: A method for making a field-emission type electron gun has the steps of: a) forming insulating film on a main plane of a silicon substrate; b) selectively etching the insulating film within a region where a gate electrode will be formed to form a mask of the insulating film; c) removing the silicon substrate within the region with using the mask to form a concave portion, wherein the insulating film leaves on an edge of the concave portion and an edge of the insulating film extends in the form of a cantilever from the edge of the concave portion; d) oxidizing a surface of the silicon substrate by thermal oxidation to form an emitter with a sharpened tip; e) depositing film for forming a gate electrode to fill the concave portion; f) removing an unnecessary part of the film for forming the gate electrode; and g) selectively removing the oxidized surface of the silicon substrate on the emitter to expose the tip of the emitter.

Abstract: In a bipolar junction transistor of an epitaxial planar type comprising a base region, an emitter region formed in the base region, and a poly-silicon layer as an emitter poly-silicon electrode layer overlying the emitter region, the poly-silicon layer being used as an impurity diffusion source for forming the emitter region in fabrication of the transistor, the emitter poly-silicon electrode layer comprises a poly-silicon film containing an additive of one of C, O, and P overlying the emitter region and a poly-silicon layer overlying the poly-silicon film. An impurity is doped in the poly-silicon layer and is diffused into the base region through the poly-silicon film to form the emitter region in the base region in fabrication of the transistor. The poly-silicon film contains the additive and serves to prevent the poly-silicon film and the poly-silicon layer from grain growth which badly affects the impurity diffusion for forming the emitter region.

Abstract: To selectively grow a P type silicon layer and a Si/Ge.sub.x Si.sub.1-x superlattice layer under low temperature conditions in the area encircled with a groove, at least the side walls of which consist of silicon oxide film, which is formed in the silicon substrate. Thereby, the leak at the side of the superlattice layer can be reduced. Furthermore, by burying a metal film in the groove, the loss of light at the side of the superlattice layer can be suppressed to the minimum. Thus a light receiver having silicon/germanium silicon-mixed-crystal layer is stably formed in a silicon semiconductor substrate and optical absorption efficiency can be improved.

Abstract: A variable-capacitance device has an n-type diffusion layer which has an impurity concentration profile such that a region where the impurity concentration remains substantially constant and a region where the impurity concentration changes abruptly are alternately repeated, and the impurity concentration increases as the deepness from the surface increases. The impurity concentration profile can be achieved by implanting n-type impurity atoms a plurality of times with different energies in an ion implantation process or varying the concentration of n-type impurity atoms such as of phosphorus added upon epitaxial layer growth. The variable-capacitance device, and a semiconductor integrated circuit device composed of a plurality of such variable-capacitance devices can be fabricated on a semiconductor substrate, and are highly stable.

Abstract: A method of manufacturing a semiconductor integrated circuit device includes the steps of: sequentially forming a silicon oxide film, a silicon nitride film, a polysilicon film; and a protective film on a silicon substrate, etching and removing the protective film from a shallow groove formation region to expose a surface of the polysilicon film; etching and removing the protective film, the polysilicon film, the silicon nitride film, and the silicon oxide film from a deep groove formation region to expose asurface of the silicon substrate; etching the silicon substrate and the polysilicon film, both of which are exposed, using the protective film as a mask to form agroove having a predetermined depth in the deep groove formation region; etching and removing at least the silicon oxide film left in the shallow groove formation region to expose a surface of the silicon substrate; and simultaneously etching the silicon substrate in the deep and shallow groove formation regions using the protective film as a mask

Abstract: A silicon film 9 and an N.sup.+ -type impurity region 9a are provided between a base region 11 and an epitaxial growth layer 3. A silicon oxide film 12 is provided on the inner sidewalls of an opening 16, and an N-type polycrystalline silicon film 13 and an emitter region 15 are provided in the region surrounded by the silicon oxide film 12.The silicon film 9 is formed by means of a molecular beam epitaxy and the N-type impurity region 9a is formed prior to the formation of the base region 11 by means of ion implantation that uses a silicon oxide film 7 as the mask. As a result, it is possible to suppress the reduction in the cut-off frequency, and reduce the capacity between the base and the collector, so that a high speed operation of the bipolar transistor becomes possible.

Abstract: A semiconductor device comprising an insulating isolation groove which comprises a groove in a substrate, an insulating film on the inner surface of the groove, a polycrystal silicon film and a boron phosphosilicate glass film in order embedded within the groove, and a silicon oxide film on the boron phosphosilicate glass film.Since the polycrystal silicon film and boron phosphosilicate glass film are embedded within the groove, the crystal defect due to thermal expansion does not occur. And, since it is not necessary to oxidize the surface of the polycrystal silicon film within the groove, deformation due to an increased build-up at the time of oxidation does not occur.