Patents by Inventor Hisataka Hayashi
Hisataka Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8545670Abstract: A plasma processing apparatus for processing a substrate using plasma includes a first electrode configured to mount the substrate, a second electrode disposed to face the first electrode with a predetermined space, a chamber containing the first electrode and the second electrode, the chamber being capable of adjusting an inside atmosphere, a first electric power source device configured to apply a first RF voltage for controlling a self-bias voltage generated on the substrate to the first electrode, the first electric power source device applying a substantially constant width and a substantially constant value in a peak-to-peak voltage of an RF voltage of a first frequency at intervals, and a second electric power source device configured to apply a second RF voltage of a second frequency for generating plasma between the first and second electrodes to one of the first electrode and the second electrode.Type: GrantFiled: September 12, 2008Date of Patent: October 1, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akihiro Kojima, Hisataka Hayashi, Akio Ui
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Patent number: 8536061Abstract: According to one embodiment, a semiconductor device manufacturing method includes collectively etching layers of a multilayered film including silicon layers and silicon oxide films alternately stacked on a semiconductor substrate. The etching gas of the etching contains at least two types of group-VII elements and one of a group-III element, a group-IV element, a group-V element, and a group-VI element, the energy of ions entering the semiconductor substrate when performing the etching is not less than 100 eV, and an addition ratio of the group-III element, the group-IV element, the group-V element, the group-VI element, and the group-VII element to the group-VII element is 0.5 (inclusive) to 3.0 (inclusive).Type: GrantFiled: March 11, 2011Date of Patent: September 17, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hisataka Hayashi, Yusuke Kasahara, Tsubasa Imamura
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Patent number: 8524609Abstract: An aspect of the present embodiment, there is provided a method of fabricating a semiconductor device including providing a film to be processed above a semiconductor substrate, providing a negative-type resist and a photo-curable resist in order, pressing a main surface of a template onto the photo-curable resist, the main surface of the template having a concavo-convex pattern with a light shield portion provided on at least a part of a convex portion, irradiating the template with light from a back surface of the template, developing the negative-type resist and the photo-curable resist so as to print the concavo-convex pattern of the template on the negative-type resist and the photo-curable resist, and etching the film to be processed by using the concavo-convex pattern printed on the negative-type resist and the photo-curable resist as a mask.Type: GrantFiled: September 12, 2011Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Satoshi Inada, Mitsuhiro Omura, Hisataka Hayashi
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Publication number: 20120228263Abstract: In one embodiment, a substrate processing apparatus, includes: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber to face the first electrode, and to hold a substrate; an RF power supply to apply an RF voltage with a frequency of 50 MHz or more to the second electrode; and a pulse power supply to repeatedly apply a voltage waveform including a negative voltage pulse and a positive voltage pulse of which delay time from the negative voltage pulse is 50 nano-seconds or less to the second electrode while superposing on the RF voltage.Type: ApplicationFiled: March 20, 2012Publication date: September 13, 2012Inventors: Akio UI, Hisataka Hayashi, Keisuke Kikutani
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Patent number: 8252193Abstract: A substrate plasma processing apparatus includes a chamber of which an interior is evacuated under a predetermined vacuum condition; an RF electrode which is disposed in the chamber and configured so as to hold a substrate to be processed on a main surface thereof; an opposing electrode which is disposed opposite to the RF electrode in the chamber; an RF voltage applying device for applying an RF voltage with a predetermined frequency to the RF electrode; and a pulsed voltage applying device for applying a pulsed voltage to the RF electrode so as to be superimposed with the RF voltage and which includes a controller for controlling a timing in application of the pulsed voltage and defining a pause period of the pulsed voltage.Type: GrantFiled: March 20, 2008Date of Patent: August 28, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Akio Ui, Takashi Ichikawa, Naoki Tamaoki, Hisataka Hayashi, Akihiro Kojima
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Publication number: 20120214308Abstract: An aspect of the present embodiment, there is provided a method of fabricating a semiconductor device including providing a film to be processed above a semiconductor substrate, providing a negative-type resist and a photo-curable resist in order, pressing a main surface of a template onto the photo-curable resist, the main surface of the template having a concavo-convex pattern with a light shield portion provided on at least a part of a convex portion, irradiating the template with light from a back surface of the template, developing the negative-type resist and the photo-curable resist so as to print the concavo-convex pattern of the template on the negative-type resist and the photo-curable resist, and etching the film to be processed by using the concavo-convex pattern printed on the negative-type resist and the photo-curable resist as a mask.Type: ApplicationFiled: September 12, 2011Publication date: August 23, 2012Inventors: Satoshi INADA, Mitsuhiro OMURA, Hisataka HAYASHI
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Publication number: 20120080408Abstract: A substrate processing method using a substrate processing apparatus includes a first step and a second step. The first step is to apply a negative voltage pulse from a pulsed power supply to be included in the apparatus. The second step is to apply floating potential for an interval of time between the negative voltage pulse and a positive voltage pulse from the pulsed power supply subsequent to the negative voltage pulse. In addition, the apparatus includes a chamber, a first electrode, a second electrode, an RF power supply, and the pulsed power supply. The second electrode is provided so that the second electrode faces the first electrode to hold a substrate. The RF power supply applies an RF voltage having a frequency of 50 MHz or higher to the second electrode. The pulsed power supply repeatedly applies a voltage waveform with the RF voltage to the second electrode.Type: ApplicationFiled: March 18, 2011Publication date: April 5, 2012Inventors: Akio UI, Hisataka Hayashi
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Publication number: 20120034785Abstract: According to one embodiment, a semiconductor device manufacturing method includes collectively etching layers of a multilayered film including silicon layers and silicon oxide films alternately stacked on a semiconductor substrate. The etching gas of the etching contains at least two types of group-VII elements and one of a group-III element, a group-IV element, a group-V element, and a group-VI element, the energy of ions entering the semiconductor substrate when performing the etching is not less than 100 eV, and an addition ratio of the group-III element, the group-IV element, the group-V element, the group-VI element, and the group-VII element to the group-VII element is 0.5 (inclusive) to 3.0 (inclusive).Type: ApplicationFiled: March 11, 2011Publication date: February 9, 2012Inventors: Hisataka HAYASHI, Yusuke Kasahara, Tsubasa Imamura
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Patent number: 8084360Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film containing boron (B) on a member to be etched, the member being a semiconductor substrate, or a film formed on the semiconductor substrate, and forming a second film formed of a silicon oxide film on the first film. The method further includes pressing an original plate having a pattern formed in an uneven shape onto the second film to transfer the pattern to the second film, and etching the first film by using the second film where the pattern is transferred as a mask, with an etching gas that contains fluoromethane (CH3F) and oxygen (O2) and has an oxygen concentration of 50 to 90 at. %, to transfer the pattern to the first film. The method further includes etching the member by using the first film where the pattern is transferred as a mask, to form a concave portion having the pattern in the member.Type: GrantFiled: December 9, 2010Date of Patent: December 27, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yusuke Kasahara, Hisataka Hayashi
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Publication number: 20110269290Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film containing boron (B) on a member to be etched, the member being a semiconductor substrate, or a film formed on the semiconductor substrate, and forming a second film formed of a silicon oxide film on the first film. The method further includes pressing an original plate having a pattern formed in an uneven shape onto the second film to transfer the pattern to the second film, and etching the first film by using the second film where the pattern is transferred as a mask, with an etching gas that contains fluoromethane (CH3F) and oxygen (O2) and has an oxygen concentration of 50 to 90 at. %, to transfer the pattern to the first film. The method further includes etching the member by using the first film where the pattern is transferred as a mask, to form a concave portion having the pattern in the member.Type: ApplicationFiled: December 9, 2010Publication date: November 3, 2011Inventors: Yusuke KASAHARA, Hisataka Hayashi
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Publication number: 20110223750Abstract: According to an embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes: arranging a semiconductor substrate on a first electrode out of first and second electrodes arranged to be opposed to each other in a vacuum container; applying negative first pulse voltage and radio-frequency voltage to the first electrode, the negative first pulse voltage being superimposed with the radio-frequency voltage; applying negative second pulse voltage to the second electrode in an off period of the first pulse voltage; and processing the semiconductor substrate or a member on the semiconductor substrate by plasma formed between the first and second electrodes.Type: ApplicationFiled: March 8, 2011Publication date: September 15, 2011Inventors: Hisataka HAYASHI, Takeshi Kaminatsui, Akio Ui
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Patent number: 7749914Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and plasma-etching the organic-material film of the substrate by means of the plasma partway in order to form a groove having a flat bottom. A frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.Type: GrantFiled: October 8, 2004Date of Patent: July 6, 2010Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Masanobu Honda, Kazuya Nagaseki, Hisataka Hayashi
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Patent number: 7727899Abstract: A manufacturing method of a semiconductor device is carried out as follows. A first mask layer having a first linear opening pattern is formed above the first interlayer insulating layer. A second mask layer having a plurality of second linear opening patterns and first dummy opening patterns is formed above the first mask layer. The plurality of second linear opening patterns are aligned above the first linear opening pattern at given intervals to cross the first linear opening pattern. The first dummy opening patterns are arranged in close proximity to a first pattern remaining region that is present between the second linear opening patterns adjacent to each other. The first interlayer insulating layer that is present below opening patterns obtained by overlap portions of the first linear opening pattern and the second linear opening patterns is etched to form holes.Type: GrantFiled: April 6, 2007Date of Patent: June 1, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Hisataka Hayashi
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Publication number: 20100072172Abstract: There are provided a substrate processing apparatus and a substrate processing method realizing an effective reduction of a voltage change of a substrate on an electrode to reduce the variation of incident energy of ions entering the substrate. The substrate processing apparatus includes: a first electrode holding a substrate on a main surface of the first electrode; a second electrode facing the first electrode; a RF power source applying to the first electrode a RF voltage whose frequency is equal to or higher than 40 MHz; and a pulse voltage applying unit applying to the first electrode a pulse voltage decreasing in accordance with a lapse of time, by superimposing the pulse voltage on the RF voltage.Type: ApplicationFiled: September 18, 2009Publication date: March 25, 2010Inventors: Akio Ui, Hisataka Hayashi, Takeshi Kaminatsui, Shinji Himori, Norikazu Yamada, Takeshi Ohse, Jun Abe
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Patent number: 7658859Abstract: A method of forming an organic film disposes a substrate on which the organic film is formed in a chamber capable of reducing a pressure therein, introduces a gas including a deuterium compound or a trideuterium compound in the chamber, to generate a plasma by ionizing the gas; and etches and patterning the organic film by the plasma.Type: GrantFiled: February 7, 2006Date of Patent: February 9, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Hisataka Hayashi
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Publication number: 20100024983Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.Type: ApplicationFiled: October 13, 2009Publication date: February 4, 2010Applicants: TOKYO ELECTRON LIMITED, KABUSHIKI KAISHA TOSHIBAInventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
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Patent number: 7625494Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.Type: GrantFiled: June 4, 2004Date of Patent: December 1, 2009Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
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Publication number: 20090194508Abstract: A substrate plasma processing apparatus includes a substrate holding electrode and a counter electrode which are arranged in a chamber, a high frequency generating device which applies a high frequency of 50 MHZ or higher to the substrate holding electrode, a DC negative pulse generating device which applies a DC negative pulse voltage in a manner of superimposing on the high frequency, and a controller controlling to cause intermittent application of the high frequency and cause intermittent application of the DC negative pulse voltage according to the timing of on or off of the high frequency.Type: ApplicationFiled: January 30, 2009Publication date: August 6, 2009Inventors: Akio UI, Naoki TAMAOKI, Takashi ICHIKAWA, Hisataka HAYASHI, Takeshi KAMINATSUI, Shinji HIMORI, Norikazu YAMADA, Takeshi OHSE, Jun ABE
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Publication number: 20090078678Abstract: A plasma processing apparatus for processing a substrate using plasma includes a first electrode configured to mount the substrate, a second electrode disposed to face the first electrode with a predetermined space, a chamber containing the first electrode and the second electrode, the chamber being capable of adjusting an inside atmosphere, a first electric power source device configured to apply a first RF voltage for controlling a self-bias voltage generated on the substrate to the first electrode, the first electric power source device applying a substantially constant width and a substantially constant value in a peak-to-peak voltage of an RF voltage of a first frequency at intervals, and a second electric power source device configured to apply a second RF voltage of a second frequency for generating plasma between the first and second electrodes to one of the first electrode and the second electrode.Type: ApplicationFiled: September 12, 2008Publication date: March 26, 2009Inventors: Akihiro Kojima, Hisataka Hayashi, Akio Ui
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Publication number: 20080237185Abstract: A substrate plasma processing apparatus includes a chamber of which an interior is evacuated under a predetermined vacuum condition; an RF electrode which is disposed in the chamber and configured so as to hold a substrate to be processed on a main surface thereof; an opposing electrode which is disposed opposite to the RF electrode in the chamber; an RF voltage applying device for applying an RF voltage with a predetermined frequency to the RF electrode; and a pulsed voltage applying device for applying a pulsed voltage to the RF electrode so as to be superimposed with the RF voltage and which includes a controller for controlling a timing in application of the pulsed voltage and defining a pause period of the pulsed voltage.Type: ApplicationFiled: March 20, 2008Publication date: October 2, 2008Inventors: Akio UI, Takashi Ichikawa, Naoki Tamaoki, Hisataka Hayashi, Akihiro Kojima