Patents by Inventor Ho-Ching Chien

Ho-Ching Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060148119
    Abstract: The present invention is CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS type photodiode with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.
    Type: Application
    Filed: February 23, 2006
    Publication date: July 6, 2006
    Inventors: Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chien-Hsien Tseng, Jeng-Shyan Lin
  • Patent number: 7067891
    Abstract: Each of an elevated diode sensor optoelectronic product and a method for fabricating the elevated diode sensor optoelectronic product employs a sidewall passivation dielectric layer passivating a sidewall of a patterned conductor layer which serves as a bottom electrode for an elevated diode within the elevated diode sensor optoelectronic product. The sidewall passivation dielectric layer eliminates contact between the patterned conductor layer and an intrinsic diode material layer within the elevated diode, thus providing enhanced performance of the elevated diode sensor optoelectronic product.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: June 27, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Dunn-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Yi-Shing Chang
  • Patent number: 7061028
    Abstract: A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The first dielectric layer has a first refractive index. A second dielectric layer is formed overlying the spaces but not the diodes. The second dielectric layer has a second refractive index that is larger than the first refractive index. A new image sensor device is disclosed.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: June 13, 2006
    Assignee: Taiwan Semiconductor Manufacturing, Co., Ltd.
    Inventors: Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chein-Hsien Tseng
  • Publication number: 20060092301
    Abstract: An image sensor cell includes a first MOS transistor coupled to an operating voltage for providing an output voltage of the image sensor cell with the output voltage changing conformingly with a voltage on a gate of the first MOS transistor. A photodiode is coupled to a floating node which further controls the voltage of the gate of the first MOS transistor. A photoconductor is coupled between the operating voltage and the floating node. The photoconductor has its resistance varying in response to a magnitude change of an imposed illumination so that the floating node is provided with additional electrical charges conformingly through the photoconductor while the photodiode drains electrical charges, thereby decreasing a voltage reduction rate of the voltage on the gate of the first MOS transistor.
    Type: Application
    Filed: November 3, 2004
    Publication date: May 4, 2006
    Inventors: Dun-Nian Yaung, Ho-Ching Chien, Tzu-Hsuan Hsu
  • Publication number: 20060076580
    Abstract: An image sensor with a vertically integrated thin-film photodiode includes a bottom doped layer of a PIN photodiode imbedded in a dielectric layer, wherein a bottom surface of the bottom doped layer completely contacts its corresponding underlying pixel electrode. The bottom doped layers of the PIN photodiodes are formed by a self-aligned and damascene method, therefore the pixel electrodes are not exposed to the I-type amorphous silicon layer of the PIN photodiodes. Moreover, the transparent electrode connects the PIN photodiodes to an external ground voltage power through a ground pad which is a portion of a top metal layer.
    Type: Application
    Filed: November 18, 2005
    Publication date: April 13, 2006
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien
  • Publication number: 20060073629
    Abstract: A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The first dielectric layer has a first refractive index. A second dielectric layer is formed overlying the spaces but not the diodes. The second dielectric layer has a second refractive index that is larger than the first refractive index. A new image sensor device is disclosed.
    Type: Application
    Filed: November 22, 2005
    Publication date: April 6, 2006
    Inventors: Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chein-Hsien Tseng
  • Publication number: 20060063294
    Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.
    Type: Application
    Filed: November 10, 2005
    Publication date: March 23, 2006
    Inventors: Tzu-Hsuan Hsu, Shou-Gwo Wuu, Ho-Ching Chien, Dun-Nian Yaung
  • Publication number: 20060054939
    Abstract: A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 ?m. At least one dielectric layer is disposed on the substrate covering the pixel. A color filter is disposed on the least one dielectric layer. A microlens array is disposed on the color filter of the pixel, and the sum of the thickness of all dielectric layers and the color filter divided by the pixel width is equal to or less than approximately 1.87.
    Type: Application
    Filed: November 4, 2004
    Publication date: March 16, 2006
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Wen-De Wang, Ho-Ching Chien, Shou-Gwo Wuu
  • Publication number: 20060033127
    Abstract: A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped region of a second conductivity type. Each doped region of the first conductivity type is beneath a corresponding trench. Each doped region of the second conductivity type is sandwiched between the corresponding doped region and the substrate of the first conductivity type. No edge of any doped region of the first or second conductivity type extends to the trench corners. A method of fabricating the photo sensor is also provided.
    Type: Application
    Filed: August 16, 2004
    Publication date: February 16, 2006
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien, Chien-Hsien Tseng, Jeng-Shyan Lin
  • Patent number: 6995411
    Abstract: An image sensor has a vertically integrated thin-film photodiode.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: February 7, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien
  • Patent number: 6982443
    Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: January 3, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Shou-Gwo Wuu, Ho-Ching Chien, Dun-Nian Yaung
  • Publication number: 20050199921
    Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.
    Type: Application
    Filed: March 12, 2004
    Publication date: September 15, 2005
    Inventors: Tzu-Hsuan Hsu, Shou-Gwo Wuu, Ho-Ching Chien, Dun-Nian Yaung
  • Publication number: 20050179063
    Abstract: An image sensor with a vertically integrated thin-film photodiode includes a bottom doped layer of a PIN photodiode imbedded in a dielectric layer, wherein a bottom surface of the bottom doped layer completely contacts its corresponding underlying pixel electrode. The bottom doped layers of the PIN photodiodes are formed by a self-aligned and damascene method, therefore the pixel electrodes are not exposed to the I-type amorphous silicon layer of the PIN photodiodes. Moreover, the transparent electrode connects the PIN photodiodes to an external ground voltage power through a ground pad which is a portion of a top metal layer.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 18, 2005
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien
  • Publication number: 20050164440
    Abstract: A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer and first and second doped regions. The second MOS has a second gate structure, a second spacer and third and fourth doped regions. Anisotropic etching is performed to remove part of the organic layer until the oxide layer on the first and the second gate structures is exposed, wherein a remaining organic layer is left above the substrate. The oxide layer on the first and the second gate structures is removed. The remaining organic layer is removed. The oxide layer on the first, second, and third doped regions is removed. Thus, a silicide layer cannot form on the fourth doped region.
    Type: Application
    Filed: March 18, 2005
    Publication date: July 28, 2005
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien
  • Publication number: 20050133837
    Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.
    Type: Application
    Filed: April 5, 2004
    Publication date: June 23, 2005
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu Hsu, Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chien-Hsien Tseng, Jeng-Shyan Lin
  • Publication number: 20050093086
    Abstract: Each of an elevated diode sensor optoelectronic product and a method for fabricating the elevated diode sensor optoelectronic product employs a sidewall passivation dielectric layer passivating a sidewall of a patterned conductor layer which serves as a bottom electrode for an elevated diode within the elevated diode sensor optoelectronic product. The sidewall passivation dielectric layer eliminates contact between the patterned conductor layer and an intrinsic diode material layer within the elevated diode, thus providing enhanced performance of the elevated diode sensor optoelectronic product.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 5, 2005
    Inventors: Dunn-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Yi-Shing Chang
  • Publication number: 20050062118
    Abstract: The present invention is a CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.
    Type: Application
    Filed: September 24, 2003
    Publication date: March 24, 2005
    Inventors: Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chien-Hsien Tseng, Jeng-Shyan Lin
  • Publication number: 20040211987
    Abstract: An image sensor optoelectronic product and a method for fabrication thereof comprise a photodiode region overlapping a source/drain region of the same polarity within a reset metal oxide semiconductor field effect transistor device. The image sensor optoelectronic product also comprises a bridging implant region of the same polarity as the photodiode region and the source/drain region. The bridging implant region overlaps the photodiode region, encompasses the source/drain region and extends laterally into the channel region of the reset metal oxide semiconductor field effect transistor device. The bridging implant region provides the image sensor optoelectronic product with attenuated leakage and attenuated white pixel cell susceptibility.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 28, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ho-Ching Chien, Shou-Gwo Wuu, Chien-Hsien Tseng, Dun-Nian Yuang, Jeng-Shyan Lin
  • Publication number: 20040188771
    Abstract: A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer and first and second doped regions. The second MOS has a second gate structure, a second spacer and third and fourth doped regions. Anisotropic etching is performed to remove part of the organic layer until the oxide layer on the first and the second gate structures is exposed, wherein a remaining organic layer is left above the substrate. The oxide layer on the first and the second gate structures is removed. The remaining organic layer is removed. The oxide layer on the first, second, and third doped regions is removed. Thus, a silicide layer cannot form on the fourth doped region.
    Type: Application
    Filed: March 31, 2003
    Publication date: September 30, 2004
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien
  • Publication number: 20040180461
    Abstract: A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The first dielectric layer has a first refractive index. A second dielectric layer is formed overlying the spaces but not the diodes. The second dielectric layer has a second refractive index that is larger than the first refractive index. A new image sensor device is disclosed.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 16, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chien-Hsien Tseng