Abstract: The subject disclosure relates to solar energy collection and use in communications systems and to enhancements thereof. In an aspect, dual function antennas are disclosed that can simultaneously function as an antenna and as a solar energy collection system. In further aspects, disclosed embodiments can focus incident solar radiation to increase output voltage of conventional solar cells. Measured and simulated results demonstrate various aspects of the subject disclosure.

Abstract: A semiconductor package includes a dielectric layer, a plurality of traces, a plurality of electrical pads, a plurality of studs and at least a semiconductor device. The dielectric layer has a first dielectric surface and a second dielectric surface opposite the first dielectric surface. The traces are disposed in the dielectric layer and are exposed on the second dielectric surface. The electrical pads are disposed on the first dielectric surface. The studs are disposed in the dielectric layer and are exposed on the first dielectric surface. The studs are electrically connected to the traces and the electrical pads. The semiconductor device is disposed on the second dielectric surface and electrically connected to the traces.

Abstract: A semiconductor package, a substrate and a manufacturing method thereof are provided. The substrate comprises a conductive carrier, a first metal layer and a second metal layer. The first metal layer is formed on the conductive carrier and comprises an lead pad having an upper surface. The second metal layer is formed on the first metal layer and comprises a bond pad. The bond pad overlaps and is in contact with the upper surface of the first metal layer. The upper surface of the lead pad is partially exposed. A part of the bond pad overhang outward from the edge of the lead pad.

Abstract: A method of vehicle navigation guidance includes: receiving at least three satellite positioning data; receiving road marking data from a driver assistance device; calculating a first position of a vehicle according to the at least three satellite positioning data and according to the road marking data; determining a turning action of the vehicle according to the road marking data; determining an acceleration force of the vehicle according to the road marking data; and calculating a second position of the vehicle according to the first position, according to the turning action, and according to the acceleration force.

Abstract: The semiconductor device carrier comprises a conductive carrier, a dielectric layer, a conductive trace layer, a conductive stud layer and the plating conductive layer. The conductive carrier comprises at least one cavity. The dielectric layer has a first dielectric surface and a second dielectric surface opposite the first dielectric surface. The conductive trace layer disposes in the dielectric layer and is exposed on the second dielectric surface. The conductive stud layer disposes in the dielectric layer and is exposed on the first dielectric surface, wherein the conductive stud layer is electrically connected to the conductive trace layer. The plating conductive layer is disposed on the first dielectric surface and the exposed conductive stud layer. The cavity exposes the conductive trace layer and the dielectric layer.

Abstract: A method of producing nanostructures by supplying particulate solid and gaseous reactants to a reactor, heating the reactor to an elevated temperature and causing relative movement of the solid reactants such as to promote the growth of nanostructures. A high temperature reactor for performing the method includes a reactor chamber having an inlet and an outlet, multiple drums for accommodating solid reactant material, a drive system that causes rotation of the drums and a heating system for heating the chamber. There is also disclosed a method of producing Silicon Nitride nanostructures by supplying solid reactants to a reactor including a carbon source and SiO2, supplying reactant gas to the reactor and maintaining a reactant gas flow rate so as to achieve a desired dwell time and heating the reactor to an elevated temperature.

Abstract: A semiconductor package includes a trace molding compound layer and a chip molding compound layer. The trace molding compound layer has a first surface and a second surface, wherein the trace molding compound layer encapsulates a plurality of traces and studs between the first and second surface. The chip molding compound layer has a first surface and a second surface, wherein the chip molding compound layer encapsulates a semiconductor chip between the first and second surface of the chip molding compound layer. The chip molding compound layer is disposed on the trace molding compound layer, the second surface of the chip molding compound layer adheres to the first surface of the trace molding compound layer, and the chip molding compound layer and the trace molding compound layer comprise substantially the same molding compound material.

Abstract: A manufacturing method includes the follow steps. Firstly, a carrier is provided. Then, a plurality of traces are formed on the carrier. Then, a trace molding compound layer is formed on the carrier by a first molding process. Then, the carrier is removed from the trace molding compound layer to expose an etched surface of the trace molding compound layer and trace upper surfaces of the traces. Then, at least a chip is disposed on the etched surface of the trace molding compound layer and the chip is connected to the trace upper surfaces. Then, a chip molding compound layer is formed on the etched surface by a second molding process substantially similar to the first molding process, wherein the chip molding compound layer and the trace molding compound layer are formed of substantially the same molding compound material.

Abstract: An aesthetic dielectric antenna (e.g., a dielectric resonator antenna) includes an aesthetically shaped decoration having at least one shaped dielectric (swan, apple or building shape) with a dielectric constant of more than one. A waveguide, feedline, probe or other means of excitation is electronically coupled to the dielectric to emit a radiation pattern for carrying analog or digital information.

Abstract: A method for fabricating a flip-chip semiconductor package. The method comprises processing a semiconductor device, for example a semiconductor chip and processing a device carrier, for example a substrate. The semiconductor device comprises bump structures formed on a surface thereof. The substrate comprises bond pads formed on a surface thereof. Processing of the semiconductor chip results in heating of the semiconductor chip to a chip process temperature. The chip process temperature melts solder portions on the bump structures Processing of the substrate results in heating of the substrate to a substrate process temperature. The method comprises spatially aligning the semiconductor chip in relation to the substrate to correspondingly align the bump structures in relation to the bump pads. The semiconductor chip is then displaced towards the substrate for abutting the bump structures of the semiconductor chip with the bond pads of the substrate to thereby form bonds therebetween.

Abstract: A manufacturing method of semiconductor substrate includes following steps: providing a base layer; forming a plurality of traces on the base layer; forming a plurality of studs correspondingly on the traces; forming a molding material layer on the base layer to encapsulate the traces and studs; forming a concave portion on the molding material layer; and, removing the base layer.

Abstract: A semiconductor package, a substrate and a manufacturing method thereof are provided. The substrate comprises a conductive carrier, a first metal layer and a second metal layer. The first metal layer is formed on the conductive carrier and comprises an lead pad having an upper surface. The second metal layer is formed on the first metal layer and comprises a bond pad. The bond pad overlaps and is in contact with the upper surface of the first metal layer. The upper surface of the lead pad is partially exposed. A part of the bond pad overhang outward from the edge of the lead pad.

Abstract: Provided is a circuit for an electronic device having a non-planar transparent resonator. The transparent resonator is mounted on said circuit so as to at least partially occupy a footprint of another component of the circuit. The transparent resonator forms part of a light pathway on said circuit for transmitting light to or from said another component. Also provided is a transparent dielectric resonator antenna (DRA) for optical applications. Since the DRA is transparent, it can let light pass through itself and, thus, the light can be utilized by an optical part of a system or device. The transparent DRA can be placed on top of a solar cell. Since the DRA does not block the light, the light can reach the solar cell panel and power can be generated for the system or device. The system or device so obtained is very compact because no extra footprint is needed within the system or device for the DRA. It finds application in compact wireless applications that need a self-sustaining power device.

Abstract: A semiconductor package, a substrate and a manufacturing method thereof are provided. The substrate comprises a conductive carrier, a first metal layer and a second metal layer. The first metal layer is formed on the conductive carrier and comprises an lead pad having an upper surface. The second metal layer is formed on the first metal layer and comprises a bond pad. The bond pad overlaps and is in contact with the upper surface of the first metal layer. The upper surface of the lead pad is partially exposed. A part of the bond pad overhang outward from the edge of the lead pad.

Abstract: The subject disclosure relates to solar energy collection and use in communications systems and to enhancements thereof. In an aspect, dual function antennas are disclosed that can simultaneously function as an antenna and as a solar energy collection system. In further aspects, disclosed embodiments can focus incident solar radiation to increase output voltage of conventional solar cells. Measured and simulated results demonstrate various aspects of the subject disclosure.

Abstract: The semiconductor device carrier comprises a conductive carrier, a dielectric layer, a conductive trace layer, a conductive stud layer and the plating conductive layer. The conductive carrier comprises at least one cavity. The dielectric layer has a first dielectric surface and a second dielectric surface opposite the first dielectric surface. The conductive trace layer disposes in the dielectric layer and is exposed on the second dielectric surface. The conductive stud layer disposes in the dielectric layer and is exposed on the first dielectric surface, wherein the conductive stud layer is electrically connected to the conductive trace layer. The plating conductive layer is disposed on the first dielectric surface and the exposed conductive stud layer. The cavity exposes the conductive trace layer and the dielectric layer.

Abstract: A manufacturing method of semiconductor substrate includes following steps: providing a base layer; forming a plurality of traces on the base layer; forming a plurality of studs correspondingly on the traces; forming a molding material layer on the base layer to encapsulate the traces and studs; forming a concave portion on the molding material layer; and, removing the base layer.

Abstract: A conductive carrier having a first surface and a second surface is provided. The conductive trace layer is formed on the second surface of the conductive carrier. A conductive stud layer is formed on the conductive trace layer. A dielectric layer is formed on the conductive layer to encapsulate the conductive trace layer and the conductive stud layer. The conductive stud layer is exposed. A plating conductive layer is formed to envelop the conductive carrier, the dielectric layer and the exposed end of the conductive stud layer. A cavity is formed on the conductive carrier, wherein the conductive trace layer and the dielectric layer are exposed in the cavity. A surface finishing is formed on at least an exposed portion of the conductive stud layer. The plating conductive layer is removed.

Abstract: The subject disclosure relates to solar energy collection and use in communications systems and to enhancements thereof. In an aspect, dual function antennas are disclosed that can simultaneously function as an antenna and as a solar energy collection system. In further aspects, disclosed embodiments can focus incident solar radiation to increase output voltage of conventional solar cells. Measured and simulated results demonstrate various aspects of the subject disclosure.