Patents by Inventor Hoe-Ku Jung

Hoe-Ku Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080264676
    Abstract: A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.
    Type: Application
    Filed: October 22, 2007
    Publication date: October 30, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Jeong-Woo Park, Ji-Eun Kim
  • Publication number: 20080102410
    Abstract: A method of manufacturing a printed circuit board is disclosed, in which a cavity is formed for embedding a component, which includes: providing a core board, in which an inner circuit is buried; forming a first via in the core board for interlayer conduction; selectively forming a first photoresist in a position on the core board in correspondence with a position of the cavity; stacking a first build-up layer, on which a first outer circuit is formed, on the core board; and selectively removing the first build-up layer in correspondence with the position of the cavity and removing the first photoresist. Utilizing the method, a board can be manufactured with greater precision, as the thickness tolerance of the cavity may be obtained by controlling the thickness of the photoresist, and the overall thickness of the board can be controlled by controlling the height of the cavity.
    Type: Application
    Filed: October 22, 2007
    Publication date: May 1, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ji-Eun Kim, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Jong-Gyu Choi, Jeong-Woo Park, Sang-Duck Kim
  • Publication number: 20080098596
    Abstract: A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.
    Type: Application
    Filed: October 19, 2007
    Publication date: May 1, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang-Duck Kim, Jung-Hyun Park, Hoe-Ku Jung, Jong-Gyu Choi, Ji-Eun Kim, Jeong-Woo Park
  • Publication number: 20080098597
    Abstract: A method of manufacturing a circuit board is disclosed. A method of manufacturing a circuit board that includes forming a first circuit pattern on the insulation layer of a carrier, in which an insulation layer and a first seed layer are stacked in order; stacking and pressing the carrier and an insulation board with the side of the carrier having the first circuit pattern facing the insulation board; removing the carrier to transfer the first circuit pattern and the insulation layer onto the insulation board; and forming a second circuit pattern on the insulation layer transferred to the insulation board, allows fine pitch circuit patterns to enable the manufacture of fine circuit patterns of high density on the board, and allows the manufacture of a multi-layer circuit board with a simple process.
    Type: Application
    Filed: October 19, 2007
    Publication date: May 1, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hoe-Ku Jung, Je-Gwang Yoo, Myung-Sam Kang, Ji-Eun Kim, Jeong-Woo Park, Jung-Hyun Park
  • Publication number: 20080101045
    Abstract: A method of manufacturing a circuit board, which includes a bump pad on which a solder bump may be placed, may include forming a solder pad on a surface of a first carrier; forming a metal film, which covers the solder pad and which extends to a bump pad forming region; forming a circuit layer and a circuit pattern, which are electrically connected with the metal film, on a surface of the first carrier; pressing the first carrier and an insulator such that a surface of the first carrier and the insulator faces each other; and removing the first carrier. Utilizing this method, the amount of solder for the contacting of a flip chip can be adjusted, and solder can be filled inside the board, so that after installing a chip, the overall thickness of the package can be reduced.
    Type: Application
    Filed: October 19, 2007
    Publication date: May 1, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hoe-Ku Jung, Je-Gwang Yoo, Myung-Sam Kang, Ji-Eun Kim, Jeong-Woo Park, Jung-Hyun Park
  • Publication number: 20080009128
    Abstract: A buried pattern substrate and a manufacturing method thereof are disclosed. A method of manufacturing a buried pattern substrate having a circuit pattern formed on a surface, in which the circuit pattern is connected electrically by a stud bump, includes (a) forming the circuit pattern and the stud bump by depositing a plating layer selectively on a seed layer of a carrier film, where the seed layer is laminated on a surface of the carrier film, (b) laminating and pressing the carrier film on an insulation layer such that the circuit pattern and the stud bump face the insulation layer, and (c) removing the carrier film and the seed layer, allows the circuit interconnection to be realized using a copper (Cu) stud bump, so that a drilling process for interconnection is unnecessary, the degree of freedom for circuit design is improved, a via land is made unnecessary and the size of a via is small, to allow higher density in a circuit.
    Type: Application
    Filed: February 21, 2007
    Publication date: January 10, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Ji-Eun Kim
  • Publication number: 20080006942
    Abstract: A bottom substrate of package on package and manufacturing method thereof is disclosed. A bottom substrate of a package on package electrically connected to a top substrate by means of a solder ball, including a core board, a solder ball pad formed on a surface of the core board in correspondence with a location of the solder ball, an insulation layer laminated on the core board, a through hole formed by removing a part of the insulation layer such that the solder ball pad is exposed, and a metallic layer filled in the through hole and connected electrically with the solder ball, allows the number of ICs mounted on a bottom substrate to be increased without increasing the size of a solder ball, and allows the size and pitch of the solder balls to be made smaller by controlling the thickness of the insulation layer laminated on the bottom substrate, whereby more signal transmission is possible between a top substrate and a bottom substrate.
    Type: Application
    Filed: February 21, 2007
    Publication date: January 10, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung-Hyun Park, Byoung-Youl Min, Je-Gwang Yoo, Myung-Sam Kang, Hoe-Ku Jung, Ji-Eun Kim
  • Publication number: 20070281390
    Abstract: The present invention relates to a manufacturing method of a package substrate. A manufacturing method of a package substrate for mounting an electric component by connecting electrodes of the electric component to bonding pads, includes: manufacturing a buried pattern substrate having a circuit pattern and bonding pads buried in an insulating layer and having a seed layer laminated on the insulating layer, laminating a dry film onto the seed layer and removing the seed layer and the dry film of the upper side of the bonding pads, performing surface-treatment using the remaining seed layer as a plating lead; and removing the remaining seed layer and the dry film such that the circuit pattern is exposed.
    Type: Application
    Filed: March 28, 2007
    Publication date: December 6, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Myung-Sam Kang, Je-Gwang Yoo, Jung-Hyun Park, Ji-Eun Kim, Hoe-Ku Jung, Jin-Yong An
  • Publication number: 20070210439
    Abstract: An aspect of the present invention features a manufacturing method of a board on chip package. The method can comprise: (a) laminating a dry film on a carrier film, one side of which is laminated by a thin metal film; (b) patterning the dry film in accordance with a circuit wire through light exposure and developing process, and forming a solder ball pad and a circuit wire; (c) removing the dry film; (d) laminating an upper photo solder resist excluding a portion where the solder ball pad is formed; (e) etching the thin metal film formed on a portion where the upper photo solder resist is not laminated; (f) mounting a semiconductor chip on the solder ball pad by a flip chip bonding; (g) molding the semiconductor chip with a passivation material; (h) removing the carrier film and the thin metal film; and (i) laminating a lower photo solder resist under the solder ball pad.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 13, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Myung-Sam Kang, Chang-Sup Ryu, Jung-Hyun Park, Hoe-Ku Jung, Ji-Eun Kim
  • Publication number: 20070190764
    Abstract: An aspect of the present invention features a method for manufacturing a substrate having a cavity. The method can comprises: (a) forming an upper layer circuit on an upper seed layer; (b) laminating a dry film on a portion of the-upper seed layer where a cavity is to be formed; (c) fabricating an upper outer layer by forming an insulation layer on top of the upper seed layer and on top and sides of the upper layer circuit; (d) stacking the upper outer layer on one side of a core layer where an internal circuit is formed; (e) removing the upper seed layer; and (f) forming the cavity by removing the dry film. The method for manufacturing a substrate with a cavity according to the present invention can reduce the total thickness of the substrate while the thickness of an insulation layer remains the same, by forming the insulation layer on sides of an external circuit.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Hoe-Ku Jung, Myung-Sam Kang, Ji-Eun Kim, Jung-Hyun Park
  • Publication number: 20070065988
    Abstract: A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit patter on both sides of a seed layer by use of a first dry film, the seed layer being for forming a circuit pattern on both sides; (b) laminating a second dry film on the first dry film on both sides of the seed layer, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed on both sides of the seed layer, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 22, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hoe-Ku Jung, Myung-Sam Kang, Jung-Hyun Park
  • Publication number: 20070065986
    Abstract: A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit pattern on one side of a seed layer by use of a first dry film; (b) laminating a second dry film on the first dry film, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method in accordance with the present invention can mount a plurality of integrated circuits by reducing the thickness of a substrate on a package on package.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 22, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hoe-Ku Jung, Myung-Sam Kang, Jung-Hyun Park
  • Publication number: 20070059918
    Abstract: The present invention relates to a rigid-flexible multi-layer printed circuit board comprising: a flexible substrate of which circuits are formed on both sides and which is bendable; a rigid substrate which is laminated on the flexible substrate and circuits are formed on both sides and a cavity within which a semiconductor chip is mounted is formed; and a bonding sheet adhering the flexible substrate and the rigid substrate and having a insulating property. According the present invention, when the same numbers of the semiconductor chips are mounted or the POP is embodied, the whole thickness of the package can be lower. Also, two more semiconductor chips can be mounted using the space as the thickness of the core layer, and the structure impossible when the number of semiconductor chip mounted on the bottom substrate becomes two from one in conventional technology can be embodied.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 15, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hoe-Ku Jung, Myung-Sam Kang, Jung-Hyun Park