Abstract: A protected chip stack having a first chip and a second chip on the first chip. A functional layer in at least the first chip or the second chip. On the first chip and on the second chip there is in each case a connecting element, the connecting element on the first chip forming with the connecting element on the second chip a mechanical connection between the two chips. The connecting element and the functional layer are made of the same material. At least in the case of the first chip or in the case of the second chip, the connecting element is in direct contact with the functional layer.

Abstract: A device for soldering contacts on semiconductor chips. A chip is held on a chip mount by a chuck and is heated from a side facing away from the wafer by means of a radiation source, so that a solder applied to a side facing the wafer is melted. A flushing device, having a plate with a window, a gas channel, and a gas outlet opening for a forming gas, is arranged at the window, is fitted parallel to the wafer. The chip is moved vertically in relation to the wafer, pressed onto the wafer through the window, and soldered on by means of isothermal solidification.

Abstract: Semiconductor component, having a first chip arranged on a second chip, in which the first and second chips in each case have, on one of their main areas, first and second metalizations, respectively, which face one another. First regions of the metalizations are provided for the production of an electrical connection between the first and second chips. Second regions of the metalization are provided as an additional electrical functional plane outside the first and second chips.

Abstract: A method for connecting at least two metal layers by means of a diffusion soldering process, wherein each of the metal layers that is to be connected is plated with a respective solder layer prior to the diffusion soldering process.

Abstract: A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by insulation layers that are patterned in such a way that an interconnect layer applied as bridge makes contact with the interconnects applied previously.

Abstract: A the semiconductor chip stack in which an intermediate space between semiconductor chips is filled at least along one edge of the upper face of a top chip by a spacer composed of a polymer which can be structured photographically, of photoresist, of an encapsulation compound or an adhesive, and is sealed from the outside. During the passivating process, the connecting contact pads are kept free of the material of this spacer for bonding wires or other external connections on the upper face of the bottom chip.

Abstract: A protected chip stack having a first chip and a second chip on the first chip. A functional layer in at least the first chip or the second chip. On the first chip and on the second chip there is in each case a connecting element, the connecting element on the first chip forming with the connecting element on the second chip a mechanical connection between the two chips. The connecting element and the functional layer are made of the same material. At least in the case of the first chip or in the case of the second chip, the connecting element is in direct contact with the functional layer.

Abstract: A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by insulation layers that are patterned in such a way that an interconnect layer applied as bridge makes contact with the interconnects applied previously.

Abstract: A the semiconductor chip stack in which an intermediate space between semiconductor chips is filled at least along one edge of the upper face of a top chip by a spacer composed of a polymer which can be structured photographically, of photoresist, of an encapsulation compound or an adhesive, and is sealed from the outside. During the passivating process, the connecting contact pads are kept free of the material of this spacer for bonding wires or other external connections on the upper face of the bottom chip.

Abstract: Semiconductor component, having a first chip arranged on a second chip, in which the first and second chips in each case have, on one of their main areas, first and second metalizations, respectively, which face one another. First regions of the metalizations are provided for the production of an electrical connection between the first and second chips. Second regions of the metalization are provided as an additional electrical functional plane outside the first and second chips.

Abstract: A device for soldering contacts on semiconductor chips. A chip is held on a chip mount by a chuck and is heated from a side facing away from the wafer by means of a radiation source, so that a solder applied to a side facing the wafer is melted. A flushing device, having a plate with a window, a gas channel, and a gas outlet opening for a forming gas, is arranged at the window, is fitted parallel to the wafer. The chip is moved vertically in relation to the wafer, pressed onto the wafer through the window, and soldered on by means of isothermal solidification.

Abstract: For the purpose of contact-connecting an electrical component, in particular a semiconductor component, on a substrate having a conductor structure, a joining temperature is chosen in such a way that the substrate, with a pressure being exerted on the electrical component, experiences a plastic deformation, with the result that the electrical component is pressed together with the conductor structure into the substrate in a positively locking manner. In order to produce the connection between the component and the substrate, use is preferably made of a thin diffusion solder layer which can be processed at temperatures lying below the melting point of the substrate.

Abstract: A soldering agent for use in diffusion soldering processes contains, in a soldering paste, a mixture of at least partially metallic grains of a high-melting metal and a solder metal. In a diffusion soldering process, the solder metal reacts completely with the high-melting metal and metals belonging to parts that are to be joined to one another by the soldering process, to form an intermetallic phase.

Abstract: In the three-dimensional integration of integrated circuits, a thinned semiconductor substrate is arranged on a second semiconductor substrate and is mechanically and electrically connected thereto. To that end, in the second, thinned semiconductor substrate, continuous contact holes are formed proceeding from a substrate rear side as far as a first metal wiring plane on a substrate front side. In order to align the contact holes with the structures arranged on the front side, a structure is arranged on the front side of the substrate, which can be used as an alignment mark on the front side. The structure is overgrown with a useful layer and uncovered proceeding from the rear side of the substrate, so that the structure can also be used as an alignment mark from the rear side. This avoids an alignment error between the structures arranged on the front side and the rear side.

Abstract: The invention relates to an electronic component including a housing and a first substrate having at least one integrated circuit, a multiplicity of contact surfaces arranged in an arbitrary distribution on the surface of the first substrate. A second substrate forms a housing and is mechanically joined to the surface of the first substrate in a surface-to-surface contact, via an insulating joining layer. The second substrate has contact connection surfaces that are surface-to-surface connected to the contact surfaces of the first substrate in an electrically conductive manner. The second substrate has symmetrically arranged external contact surfaces that are conductively connected to the contact connection surfaces via through-contacts in the second substrate.

Abstract: A method and apparatus for the reversible contacting of a semiconductor circuit level to assist in performing a function test. The apparatus includes a testing head having test points arranged at a test side lying opposite the contact surfaces of a semiconductor circuit level. The test points are formed of liquid contacts in recesses in the test side of the testing head wherein the liquid contacts form menisci that project beyond the surface of the testing head. The recesses, in turn, are provided for metallizations which are connected to electrically-conductive leads. In addition, the surface may be provided with a roughening or with etched trenches.

Abstract: A substrate wafer having components (13) is bonded onto a mount (3) and is thinned from the rear side. After producing a photoresist mask on the rear side of the substrate wafer, the latter is separated in an etching process into individual components (13). After removal of the photoresist mask, a further component (6), in particular a component stack, is applied onto at least one of the individual components (13) and is firmly connected to the individual component (13a).

Abstract: A terminal metallization (8) is applied onto and structured on a layer structure on the upper side of the component, the terminal metallization is applied on the upper side of an insulating layer (7) with an opening on a metallization (6) provided for electrical connection. By filling a hole produced in a covering dielectric with metal, a contact rod (12) seated on this terminal metallization (8) is formed. This contact rod is resiliently movable in a surrounding opening (14) of the component on the free part of the terminal metallization (8) anchored in the layer structure. This enables the reversible contacting of the component to a further component arranged vertically thereto, whereby the planar upper sides lying opposite one another can be brought into intimate contact because the contact rod (12) pressed against a contact (15) of the other component is pressed back into the opening (14) and an adequately firm connection of the contacts is achieved by the spring power of the terminal metallization (8).

Abstract: In order to produce a three-dimensional circuit arrangement, two substrates (21, 26) which have components in the region of their boundary surfaces (22, 27) which touch one another are stacked one on top of the other. The substrates (21, 26) are firmly connected to one another via these boundary surfaces (22, 27). One of the substrates (21) can subsequently be thinned from the rear side (212) and can be provided with rear-side contacts (213), the other substrate (26) acting as a stabilizing supporting plate.

Abstract: The method produces liquid contacts in contact holes on a top side of a semiconductor component. The top side is not wettable by material provided for the liquid contacts. The walls and edges of the contact holes are wettable by the material. The contact holes are filled as follows. The material provided for the liquid contacts is applied to the top side by a doctor blade. There is situated on a longitudinal edge of the doctor blade an adhesion strip which is made of a material which is wettable by the material provided for the liquid contacts. The longitudinal edge of the doctor blade is guided at a distance over the top side. The material provided for the liquid contacts is moved in the form of a cylinder between the adhesion stip and the surface of the component.