Patents by Inventor Holger Schulze

Holger Schulze has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11410950
    Abstract: A semiconductor substrate has a bond pad. The bond pad includes a layer of an aluminum alloy having a chemical composition including at least 0.3% by weight of at least one of Zn, Mg, Sc, Zr, Ti, Ag and/or Mn, with the balance being at least Al and incidental impurities.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: August 9, 2022
    Assignee: Infineon Technologies AG
    Inventors: Gert Pfahl, Daniel Bolowski, Marian Sebastian Broll, Michael Kreuz, Evelyn Napetschnig, Holger Schulze, Stefan Woehlert
  • Publication number: 20210193800
    Abstract: A power semiconductor device includes: a semiconductor body; a first load terminal structure coupled to the body front side and a second load terminal structure coupled to the body backside; an active area for conducting a load current between the load terminal structures; a drift region having a first conductivity type; a backside region arranged at the backside and including, inside the active area, first and second backside emitter zones. At least one of the backside emitter zones includes: first sectors each having at least one first region of a second conductivity type, the first region arranged in contact with the second load terminal structure and having a smallest lateral extension of at most 50 ?m; and/or second sectors each having a second region of the second conductivity type arranged in contact with the second load terminal structure and having a smallest lateral extension of at least 50 ?m.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 24, 2021
    Inventors: Roman Baburske, Moritz Hauf, Hans-Joachim Schulze, Holger Schulze, Benedikt Stoib
  • Patent number: 10998402
    Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: May 4, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alexander Breymesser, Hans-Joachim Schulze, Holger Schulze, Werner Schustereder
  • Publication number: 20210091025
    Abstract: A semiconductor substrate has a bond pad. The bond pad includes a layer of an aluminum alloy having a chemical composition including at least 0.3% by weight of at least one of Zn, Mg, Sc, Zr, Ti, Ag and/or Mn, with the balance being at least Al and incidental impurities.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 25, 2021
    Inventors: Gert Pfahl, Daniel Bolowski, Marian Sebastian Broll, Michael Kreuz, Evelyn Napetschnig, Holger Schulze, Stefan Woehlert
  • Patent number: 10957764
    Abstract: A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. The first portion has a different layer composition than the second portion and/or a thickness which differs from the thickness of the second portion.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: March 23, 2021
    Assignee: Infineon Technologies AG
    Inventors: Franz Josef Niedernostheide, Manfred Pfaffenlehner, Hans-Joachim Schulze, Holger Schulze, Frank Umbach, Christoph Weiss
  • Patent number: 10777506
    Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a silicon carbide semiconductor body and a metal adhesion and barrier structure between the metal structure and the silicon carbide semiconductor body. The metal adhesion and barrier structure includes a layer comprising titanium and tungsten.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: September 15, 2020
    Assignee: Infineon Technologies AG
    Inventors: Frank Hille, Ravi Keshav Joshi, Michael Fugger, Oliver Humbel, Thomas Laska, Matthias Müller, Roman Roth, Carsten Schaeffer, Hans-Joachim Schulze, Holger Schulze, Juergen Steinbrenner, Frank Umbach
  • Patent number: 10651037
    Abstract: One embodiment of the invention relates to a method for fabricating a doped semiconductor zone in a semiconductor body. The method includes implanting dopant particles via one side into the semiconductor body or applying a layer containing dopant particles to one side of the semiconductor body. The method also includes irradiating the semiconductor body via the one side with further particles at least in the region containing the dopant particles. The method finally includes carrying out a thermal treatment by means of which the semiconductor body is heated, at least in the region containing the dopant particles, to a predetermined temperature in order to activate the implanted dopant particles, said temperature being less than 700° C.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: May 12, 2020
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Anton Mauder, Helmut Strack, Holger Schulze
  • Patent number: 10585913
    Abstract: A system has a master node with instructions executed by a master node processor to receive a query over a network from a client machine and distribute query segments over the network. Worker nodes receive the query segments. Each worker node includes instructions executed by a worker node processor to construct from a columnar file a term map characterizing a term from the columnar file, row identifications from the columnar file and a Boolean indicator for each row identification that characterizes whether the term is present in the row specified by the row identification. The term map is cached in dynamic memory. Values responsive to the query segment are collected from the term map. The values are sent to the master node. The master node aggregates values from the worker nodes to form a result that is returned to the client machine over the network.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: March 10, 2020
    Assignee: Datameer, Inc.
    Inventors: Matthew McManus, Peter Voss, Holger Schulze, Johannes Zillmann, Martin Nettling
  • Publication number: 20200013722
    Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a silicon carbide semiconductor body and a metal adhesion and barrier structure between the metal structure and the silicon carbide semiconductor body. The metal adhesion and barrier structure includes a layer comprising titanium and tungsten.
    Type: Application
    Filed: September 20, 2019
    Publication date: January 9, 2020
    Inventors: Frank Hille, Ravi Keshav Joshi, Michael Fugger, Oliver Humbel, Thomas Laska, Matthias Müller, Roman Roth, Carsten Schaeffer, Hans-Joachim Schulze, Holger Schulze, Juergen Steinbrenner, Frank Umbach
  • Publication number: 20190378895
    Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.
    Type: Application
    Filed: August 22, 2019
    Publication date: December 12, 2019
    Inventors: Alexander Breymesser, Hans-Joachim Schulze, Holger Schulze, Werner Schustereder
  • Patent number: 10475743
    Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a metal adhesion and barrier structure between the metal structure and the semiconductor body. The metal adhesion and barrier structure includes a first layer having titanium and tungsten, and a second layer having titanium, tungsten, and nitrogen on the first layer having titanium and tungsten.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: November 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Frank Hille, Ravi Keshav Joshi, Michael Fugger, Oliver Humbel, Thomas Laska, Matthias Mueller, Roman Roth, Carsten Schaeffer, Hans-Joachim Schulze, Holger Schulze, Juergen Steinbrenner, Frank Umbach
  • Patent number: 10475881
    Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: November 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Alexander Breymesser, Hans-Joachim Schulze, Holger Schulze, Werner Schustereder
  • Publication number: 20180268000
    Abstract: A system has a master node with instructions executed by a master node processor to receive a query over a network from a client machine and distribute query segments over the network. Worker nodes receive the query segments. Each worker node includes instructions executed by a worker node processor to construct from a columnar file a term map characterizing a term from the columnar file, row identifications from the columnar file and a Boolean indicator for each row identification that characterizes whether the term is present in the row specified by the row identification. The term map is cached in dynamic memory. Values responsive to the query segment are collected from the term map. The values are sent to the master node. The master node aggregates values from the worker nodes to form a result that is returned to the client machine over the network.
    Type: Application
    Filed: March 20, 2017
    Publication date: September 20, 2018
    Applicant: Datameer, Inc.
    Inventors: Matthew McManus, Peter Voss, Holger Schulze, Johannes Zillmann, Martin Nettling
  • Patent number: 10069016
    Abstract: A semiconductor diode includes a semiconductor body and trench structures extending from a surface of the semiconductor body into the semiconductor body. The semiconductor body includes a doped layer of a first conductivity type and a doped zone of a second conductivity type opposite to the first conductivity type. The doped zone is formed between the doped layer and a first surface of the semiconductor body. The trench structures are arranged between electrically connected portions of the semiconductor body. The trench structures do not include conductive structures that are both electrically insulated from the semiconductor body and electrically connected with another structure outside the trench structures.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: September 4, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz-Josef Niedernostheide, Hans-Joachim Schulze, Holger Schulze
  • Patent number: 10049912
    Abstract: A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: August 14, 2018
    Assignee: Infineon Technologies AG
    Inventors: Alexander Breymesser, Andre Brockmeier, Elmar Falck, Francisco Javier Santos Rodriguez, Holger Schulze
  • Patent number: 9972689
    Abstract: According to one embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface, an insulation layer having a laterally varying thickness on the first surface, and a metal layer on the first surface. The insulation layer has ripples in its surface facing the metal layer. According to another embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface and including at least one of a laterally varying thickness and an inclined first surface. The first surface of the semiconductor substrate has ripples.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: May 15, 2018
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Johannes Laven, Holger Schulze
  • Publication number: 20180040691
    Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Inventors: Alexander Breymesser, Hans-Joachim Schulze, Holger Schulze, Werner Schustereder
  • Patent number: 9887125
    Abstract: A method of manufacturing a semiconductor device includes forming a field stop zone by irradiating a portion of a semiconductor body with a laser beam through a first surface of the semiconductor body. The portion has an oxygen concentration in a range of 5×1016 cm?3 and 5×1017 cm?3. Then the semiconductor body is irradiated with protons through the first surface and annealed in a temperature range of 300° C. to 550° C.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: February 6, 2018
    Assignee: Infineon Technologies AG
    Inventors: Holger Schulze, Hans-Joachim Schulze
  • Patent number: 9825136
    Abstract: A semiconductor component includes an element composed of a conductive material, which is arranged above a surface of a semiconductor substrate. The element includes an element region not adjoined by any electrical contacts to an overlying or underlying electrically conductive plane. In this case, a surface of the element facing away from the semiconductor substrate is patterned with elevations or depressions and a surface of the element region facing the semiconductor substrate is patterned to a lesser extent or is not patterned.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: November 21, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Josef Niedernostheide, Manfred Pfaffenlehner, Frank Dieter Pfirsch, Hans-Joachim Schulze, Holger Schulze, Christoph Weiss
  • Patent number: 9777337
    Abstract: Provided is a method for detecting analyte in a sample, which method comprises: (a) contacting the sample with a peptide nucleic acid (PNA) probe; (b) performing an electrochemical impedance spectrometry (EIS) measurement on the sample; (c) determining the presence, absence, quantity and/or identity of the analyte from the EIS measurement; wherein the analyte comprises nucleic acid; and wherein the quantity of analyte in the sample when the sample is taken is substantially the same as the quantity of analyte in the sample when the sample is subjected to the EIS measurement.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: October 3, 2017
    Assignee: ITI Scotland Limited
    Inventors: Holger Schulze, Damion Corrigan, Till Bachmann