Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.

Abstract: A method of manufacturing a semiconductor device includes forming a field stop zone by irradiating a portion of a semiconductor body with a laser beam through a first surface of the semiconductor body. The portion has an oxygen concentration in a range of 5×1016 cm?3 and 5×1017 cm?3. Then the semiconductor body is irradiated with protons through the first surface and annealed in a temperature range of 300° C. to 550° C.

Abstract: A semiconductor component includes an element composed of a conductive material, which is arranged above a surface of a semiconductor substrate. The element includes an element region not adjoined by any electrical contacts to an overlying or underlying electrically conductive plane. In this case, a surface of the element facing away from the semiconductor substrate is patterned with elevations or depressions and a surface of the element region facing the semiconductor substrate is patterned to a lesser extent or is not patterned.

Abstract: Provided is a method for detecting analyte in a sample, which method comprises: (a) contacting the sample with a peptide nucleic acid (PNA) probe; (b) performing an electrochemical impedance spectrometry (EIS) measurement on the sample; (c) determining the presence, absence, quantity and/or identity of the analyte from the EIS measurement; wherein the analyte comprises nucleic acid; and wherein the quantity of analyte in the sample when the sample is taken is substantially the same as the quantity of analyte in the sample when the sample is subjected to the EIS measurement.

Abstract: According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a metal adhesion and barrier structure between the metal structure and the semiconductor body. The metal adhesion and barrier structure includes a first layer having titanium and tungsten, and a second layer having titanium, tungsten, and nitrogen on the first layer having titanium and tungsten.

Abstract: A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.

Abstract: A method for forming a semiconductor device comprises forming an amorphous or polycrystalline semiconductor layer adjacently to at least one semiconductor doping region having a first conductivity type located in a semiconductor substrate. The method further comprises incorporating dopants into the amorphous or polycrystalline semiconductor layer during or after forming the amorphous or polycrystalline semiconductor layer. The method further comprises annealing the amorphous or polycrystalline semiconductor layer to transform at least a part of the amorphous or polycrystalline semiconductor layer into a substantially monocrystalline semiconductor layer and to form at least one doping region having the second conductivity type in the monocrystalline semiconductor layer, such that a p-n junction is formed between the at least one semiconductor doping region having the first conductivity type and the at least one doping region having the second conductivity type.

Abstract: A semiconductor device includes at least one first contact region of a vertical device between a semiconductor substrate and an electrically conductive structure arranged adjacent to the semiconductor substrate, and at least one second contact region of the vertical device between the semiconductor substrate of the semiconductor device and the electrically conductive structure. The at least one first contact region is arranged adjacent to the at least one second contact region. The electrically conductive structure includes a first electrically conductive material in contact with the semiconductor substrate in an area of the at least one first contact region and a second electrically conductive material in contact with the semiconductor substrate in an area of the at least one second contact region, so that a first contact characteristic within the at least one first contact region differs from a second contact characteristic within the at least one second contact region.

Abstract: A semiconductor device includes a semiconductor body with a first surface at a first side, a second surface opposite to the first surface and an edge surface connecting the first and second surfaces. An edge termination structure includes a glass structure and extends along the edge surface, at least from a plane coplanar with the first surface towards the second surface. A conductive structure extends parallel to the first surface and overlaps the glass structure at the first side.

Abstract: A semiconductor body having a first surface is provided. A deep doped region of the semiconductor body is formed using masked ion implantation to implant dopant atoms into a discrete region within the semiconductor body. A structured anti-reflective coating region is formed on a portion of the first surface that is aligned with the deep doped region in a lateral direction of the semiconductor body, the lateral direction being parallel to the first surface. A laser thermal anneal of the deep doped region of the semiconductor body is performed through the anti-reflective coating region thereby activating the implanted dopant atoms in the deep doped region.

Abstract: A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged along a lateral direction at the second side. The first and second semiconductor regions are of opposite first and second conductivity types and are electrically coupled to an electrode at the second side. The semiconductor diode further includes a third semiconductor region of the second conductivity type buried in the semiconductor body at a distance from the second side. The second and third semiconductor regions are separated from each other.

Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.

Abstract: A semiconductor device includes at least one first contact region of a vertical device between a semiconductor substrate and an electrically conductive structure arranged adjacent to the semiconductor substrate, and at least one second contact region of the vertical device between the semiconductor substrate of the semiconductor device and the electrically conductive structure. The at least one first contact region is arranged adjacent to the at least one second contact region. The electrically conductive structure includes a first electrically conductive material in contact with the semiconductor substrate in an area of the at least one first contact region and a second electrically conductive material in contact with the semiconductor substrate in an area of the at least one second contact region, so that a first contact characteristic within the at least one first contact region differs from a second contact characteristic within the at least one second contact region.

Abstract: A method of manufacturing a semiconductor device includes forming a field stop zone by irradiating a portion of a semiconductor body with a laser beam through a first surface of the semiconductor body. The portion has an oxygen concentration in a range of 5×1016 cm?3 and 5×1017 cm?3. Then the semiconductor body is irradiated with protons through the first surface and annealed in a temperature range of 300° C. to 550° C.

Abstract: A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. The first portion has a different layer composition than the second portion and/or a thickness which differs from the thickness of the second portion.

Abstract: A semiconductor device includes a semiconductor body with a first surface at a first side, a second surface opposite to the first surface and an edge surface connecting the first and second surfaces. An edge termination structure includes a glass structure and extends along the edge surface, at least from a plane coplanar with the first surface towards the second surface. A conductive structure extends parallel to the first surface and overlaps the glass structure at the first side.

Abstract: A semiconductor component includes an element composed of a conductive material, which is arranged above a surface of a semiconductor substrate. The element includes an element region not adjoined by any electrical contacts to an overlying or underlying electrically conductive plane. In this case, a surface of the element facing away from the semiconductor substrate is patterned with elevations or depressions and a surface of the element region facing the semiconductor substrate is patterned to a lesser extent or is not patterned.

Abstract: A semiconductor device includes at least one ohmic contact region between a semiconductor substrate of the semiconductor device and an electrically conductive structure arranged adjacent to the semiconductor substrate. Further, the semiconductor device includes at least one Schottky contact region between the semiconductor substrate of the semiconductor device and the electrically conductive structure. The at least one ohmic contact region is arranged adjacent to the at least one Schottky contact region. The semiconductor substrate includes a first doping layer arranged adjacent to the electrically conductive structure. An average doping concentration of the surface region of the first doping layer in an area of the at least one ohmic contact region differs from an average doping concentration of the surface region of the first doping layer in an area of the at least one Schottky contact region by less than 10%.

Abstract: A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged along a lateral direction at the second side. The first and second semiconductor regions are of opposite first and second conductivity types and are electrically coupled to an electrode at the second side. The semiconductor diode further includes a third semiconductor region of the second conductivity type buried in the semiconductor body at a distance from the second side. The second and third semiconductor regions are separated from each other.

Abstract: Provided is a method for detecting analyte in a sample, which method comprises: (a) contacting the sample with a peptide nucleic acid (PNA) probe; (b) performing an electrochemical impedance spectrometry (EIS) measurement on the sample; (c) determining the presence, absence, quantity and/or identity of the analyte from the EIS measurement; wherein the analyte comprises nucleic acid; and wherein the quantity of analyte in the sample when the sample is taken is substantially the same as the quantity of analyte in the sample when the sample is subjected to the EIS measurement.