Patents by Inventor Holger Woerner

Holger Woerner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7391103
    Abstract: The invention relates to an electronic module having plug contacts, which has a semiconductor chip embedded in a plastics composition with its rear side and its edge sides. An active top side of the semiconductor chip forms, together with the plastics composition, an overall top side, there being arranged on the latter a rewiring layer with plug contact areas and rewiring lines that connect the plug contact areas to contact areas of the top side of the semiconductor chip.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: June 24, 2008
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Bernd Goller, Robert-Christian Hagen, Simon Jerebic, Jens Pohl, Holger Woerner, Peter Strobel
  • Publication number: 20080050907
    Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.
    Type: Application
    Filed: October 26, 2007
    Publication date: February 28, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Ulrich Bachmaier, Michael Bauer, Robert Hagen, Jens Pohl, Rainer Steiner, Peter Strobel, Hermann Vilsmeier, Holger Woerner, Bernhard Zuhr
  • Patent number: 7327023
    Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: February 5, 2008
    Assignee: Infineon Technologies AG
    Inventors: Ulrich Bachmaier, Michael Bauer, Robert-Christian Hagen, Jens Pohl, Rainer Steiner, Peter Strobel, Hermann Vilsmeier, Holger Woerner, Bernhard Zuhr
  • Publication number: 20070278639
    Abstract: A semiconductor stack and a semiconductor base device with a wiring substrate and an intermediate wiring board for a semiconductor device stack is disclosed. In one embodiment, a semiconductor chip is arranged between the intermediate wiring board and the wiring substrate which is electrically connected by way of the wiring substrate on the one hand to external contacts on the underside of the wiring substrate and on the other hand to contact terminal areas in the edge regions of the wiring substrate. The intermediate wiring board has angled-away external flat conductors, which are electrically connected in the contact terminal areas of the wiring board. Furthermore, on the upper side of the intermediate wiring board, arranged on the free ends of the internal flat conductors are external contact terminal areas, which correspond in size and arrangement to external contacts of a semiconductor device to be stacked.
    Type: Application
    Filed: July 21, 2005
    Publication date: December 6, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Bauer, Ulrich Bachmaier, Robert-Christian Hagen, Jens Pohl, Rainer Steiner, Hermann Vilsmeier, Holger Woerner, Bernhard Zuhr
  • Patent number: 7276783
    Abstract: An electronic component with a plastic package and to a method for its production, includes a semiconductor chip. An underside of the plastic package has external contacts. The external contacts are connected to contact areas on an active upper side of the semiconductor chip by contact pillars of the semiconductor chip and wiring lines arranged on the plastic package molding compound. In this case, the contact pillars represent an electrically conducting elevation of the contact areas.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: October 2, 2007
    Assignee: Infineon Technologies AG
    Inventors: Bernd Goller, Robert Christian Hagen, Gerald Ofner, Christian Stuempfl, Josef Thumbs, Stefan Wein, Holger Woerner
  • Publication number: 20070194459
    Abstract: A wiring substrate of a semiconductor component includes: an underside with a wiring structure; a top side with cutouts; a rubber-elastic material arranged in the cutouts; and external contact pads arranged on the rubber-elastic material and configured to be coupled to external contacts. A method for producing a wiring substrate of this type, involves pressing the rubber-elastic material pads into a precursor of a polymer plastic during the production process.
    Type: Application
    Filed: February 20, 2007
    Publication date: August 23, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Bauer, Rainer Steiner, Holger Woerner
  • Publication number: 20070145555
    Abstract: A semiconductor structure includes: a carrier plate; a thermosensitive adhesive coupled to a top surface of the carrier plate, which is removable from the carrier plate at a predetermined, defined temperature at which the thermosensitive adhesive loses its adhesive action; semiconductor chips having active top surfaces and back surfaces, where the active top surfaces include contact surfaces disposed on the thermosensitive adhesive; and a plastic embedding compound on the carrier plate, in which the semiconductor chips are embedded.
    Type: Application
    Filed: March 12, 2007
    Publication date: June 28, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Edward Fuergut, Thomas Kalin, Holger Woerner, Carsten Von Koblinski
  • Publication number: 20070126122
    Abstract: A semiconductor device with a wiring substrate as a stacking element for a semiconductor device stack is described herein. The wiring substrate includes a plastic frame of a first plastic compound and a central region of a second plastic compound. A semiconductor chip is embedded with its back side and its edge sides in the second plastic compound, the active upper side of the semiconductor device being in a coplanar area with the first and second plastic compounds.
    Type: Application
    Filed: November 6, 2006
    Publication date: June 7, 2007
    Inventors: Michael Bauer, Edward Fuergut, Simon Jerebic, Holger Woerner
  • Publication number: 20070128754
    Abstract: A sensor component and a panel used for the production thereof is disclosed. The sensor component has, in addition to a sensor chip with a sensor region, a rear side and passive components. These are embedded jointly in a plastics composition, in such a way that their respective electrodes can be wired from an overall top side of a plastic plate.
    Type: Application
    Filed: June 4, 2004
    Publication date: June 7, 2007
    Inventors: Edward Fuergut, Bernd Goller, Robert-Christian Hagen, Simon Jerebic, Jens Pohl, Peter Strobel, Holger Woerner
  • Publication number: 20070099345
    Abstract: A method is described for producing through-contacts through a panel-shaped composite body including semiconductor chips and a plastic mass filled with conductive particles. The panel-shaped composite body is introduced between two high-voltage point electrodes. The point electrodes are oriented at positions at which through-contacts are to be introduced through the plastic mass. A high voltage is applied to the point electrodes thereby, forming the through-contacts through the plastic mass.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 3, 2007
    Inventors: Michael Bauer, Edward Fuergut, Simon Jerebic, Holger Woerner
  • Publication number: 20070096305
    Abstract: A semiconductor component includes a thin semiconductor chip and a wiring substrate that carries the semiconductor chip on its upper side and includes external contacts on its underside and/or its edge sides. The semiconductor chip is preferably produced from monocrystalline silicon having a thickness d?25 ?m.
    Type: Application
    Filed: September 1, 2006
    Publication date: May 3, 2007
    Inventors: Edward Fuergut, Holger Woerner
  • Patent number: 7202107
    Abstract: A process for producing a semiconductor component having a plastic housing in which at least one semiconductor chip is arranged includes providing a semiconductor wafer having semiconductor chips which are arranged in rows and columns and have active top surfaces and back surfaces, the active top surfaces being provided with contact surfaces. The semiconductor wafer are divided into individual semiconductor chips, which are mounted on a carrier plate that has a thermosensitive adhesive on its top surface, such that the active top surfaces of the individual semiconductor chips are placed onto the top surface of the carrier plate. A common carrier is produced from a plastic embedding compound on the carrier plate, with the semiconductor chips being embedded in the plastic embedding compound. The carrier plate is removed by heating the thermosensitive adhesive to a predetermined, defined temperature at which the thermosensitive adhesive loses its adhesive action.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 10, 2007
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Thomas Kalin, Holger Woerner, Carsten Von Koblinski
  • Publication number: 20070057372
    Abstract: An external contact material for external contacts of a semiconductor device and a method for producing the same are described. The external contact material includes a lead-free solder material. Provided in the solder material is a filler which forms a plurality of gas pores and/or has plastic particles which are arranged in the volume of the solder material.
    Type: Application
    Filed: September 13, 2006
    Publication date: March 15, 2007
    Inventors: Michael Bauer, Irmgard Escher-Poeppel, Edward Fuergut, Simon Jerebic, Bernd Rakow, Peter Strobel, Holger Woerner
  • Patent number: 7190059
    Abstract: The invention relates to a method for producing an electronic component, a stack of semiconductor chips, and an electronic component including a stack of semiconductor chips. The stack has at least a lower electronic module connected via flipchip connections to a central area of a rewiring substrate. The stack also has at least an upper electronic module with external contact surfaces connected via bonding connections to outer areas of the rewiring substrate.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: March 13, 2007
    Assignee: Infineon Technologies AG
    Inventors: Robert-Christian Hagen, Holger Woerner
  • Publication number: 20060278978
    Abstract: A semiconductor component includes a media channel and at least the following components: a semiconductor chip on a wiring substrate, electric connecting elements disposed between the semiconductor chip and the wiring substrate, and a plastic housing mass that embeds these components. The media channel is impressed into the plastic housing mass and extends along the interfaces between the plastic housing mass and the components. The media channel is produced by applying a sacrificial polymer including a media channel structure to the components before embedding the components in the plastic housing mass. The sacrificial polymer is then destroyed after the components are embedded, thereby forming the media channel.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 14, 2006
    Inventor: Holger Woerner
  • Publication number: 20060255435
    Abstract: One aspect of the invention relates to a method for encapsulating a semiconductor device which has at least one semiconductor chip arranged on a substrate. The method includes application of an elastic dam to the semiconductor chip, introduction of the semiconductor chip arranged on the substrate into a mold including a lower mold half and an upper mold half, closing of the mold so that the elastic dam is completely contacted by an inner surface of the upper mold half, and encapsulation of the semiconductor device with a molding compound.
    Type: Application
    Filed: March 24, 2006
    Publication date: November 16, 2006
    Inventors: Edward Fuergut, Holger Woerner
  • Publication number: 20060246624
    Abstract: The invention relates to a semiconductor device with a semiconductor chip and a rewiring layer, the semiconductor chip being embedded in a housing plastics composition by its rear side contact. The active top side of the semiconductor chip forms a coplanar overall top side with the top side of the housing plastics composition. The rear side contact is led to the overall top side via a flat conductor sheet tape, so that the rear side contact of the semiconductor chip can be accessed from the overall top side.
    Type: Application
    Filed: June 28, 2006
    Publication date: November 2, 2006
    Inventors: Edward Fuergut, Hermann Vilsmeier, Holger Woerner
  • Publication number: 20060192298
    Abstract: A semiconductor device with surface-mountable outer contacts and to a process for producing it is disclosed. In one embodiment, surface-mountable outer contacts are arranged on outer contact connection surfaces on the underside of the semiconductor device. In their respective center region, the outer contact connection surfaces have at least one recess which has a dovetail-like profile, the areal extent of the recess being smaller than the maximum cross section of an outer contact. In a one process, the recess in the center region is achieved by selective deposition of correspondingly patterned metal layers.
    Type: Application
    Filed: February 7, 2006
    Publication date: August 31, 2006
    Inventors: Michael Bauer, Irmgard Escher-Poeppel, Edward Fuergut, Simon Jerebic, Holger Woerner
  • Publication number: 20060183269
    Abstract: A process for producing a semiconductor component having a plastic housing in which at least one semiconductor chip is arranged includes providing a semiconductor wafer having semiconductor chips which are arranged in rows and columns and have active top surfaces and back surfaces, the active top surfaces being provided with contact surfaces. The semiconductor wafer are divided into individual semiconductor chips, which are mounted on a carrier plate that has a thermosensitive adhesive on its top surface, such that the active top surfaces of the individual semiconductor chips are placed onto the top surface of the carrier plate. A common carrier is produced from a plastic embedding compound on the carrier plate, with the semiconductor chips being embedded in the plastic embedding compound. The carrier plate is removed by heating the thermosensitive adhesive to a predetermined, defined temperature at which the thermosensitive adhesive loses its adhesive action.
    Type: Application
    Filed: January 30, 2006
    Publication date: August 17, 2006
    Inventors: Edward Fuergut, Thomas Kalin, Holger Woerner, Carsten Koblinski
  • Patent number: 7091595
    Abstract: The invention relates to a semiconductor device with a semiconductor chip and a rewiring layer, the semiconductor chip being embedded in a housing plastics composition by its rear side contact. The active top side of the semiconductor chip forms a coplanar overall top side with the top side of the housing plastics composition. The rear side contact is led to the overall top side via a flat conductor sheet tape, so that the rear side contact of the semiconductor chip can be accessed from the overall top side.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: August 15, 2006
    Assignee: Infineon Technologies, AG
    Inventors: Edward Fuergut, Hermann Vilsmeier, Holger Woerner