Abstract: Multilayer circuit boards composed primarily of silicon and containing buried ground planes and buried conducting runs are fabricated in one embodiment by positioning conductive patterns (12) on the surfaces of silicon substrates and melting a solder component of the conductive patterns (12) and allowing it to flow together with solder from the conductive patterns (12) on a stacked, adjacent silicon substrate (10). When the solder cools, a single conductive pathway (18) exists between adjacent silicon substrates (10) and bonds the adjacent substrates. If the substrates are coated with SiO.sub.2 (20), a multilayer structure with buried microwave strip lines (22) is formed in the bonding process. Alternatively, highly resistive silicon substrates (26) are used as a dielectric for microwave strip lines (24) on a top surface thereof and a conductive sheet (28) on the bottom surface thereof acts as a ground plane for microwave energy propagating along strip line (24).

Abstract: A hermetically sealed package for a power semiconductor wafer is provided comprising substantially entirely silicon materials selected to have coefficients of thermal expansion closely matching that of the power semiconductor wafer. A semiconductor wafer such as a power diode comprises a layer of silicon material having first and second device regions on respective sides thereof. An electrically conductive cap and base, each including a layer of silicon material, are disposed in electrical contact with the first and second regions of the semiconductor device, respectively. An electrically insulative sidewall of silicon material surrounds the semiconductor wafer, is spaced from an edge thereof, and is bonded to the cap and base for hermetically sealing the package. An electrical passivant is disposed on an edge of the semiconductor wafer adjoining the first and second device regions for preventing electrical breakdown between the cap and base.

Abstract: A thyristor packaging system utilizes structured metal, strain buffers to provide paths of high electrical and thermal conductivity from the anode and cathode of a thyristor to power conductors connected to the anode and the cathode, such strain buffers each comprising a bundle of substantially parallel, closely packed strands of metal wire.

Abstract: A silicon circuit board incorporates multiple levels of patterned conductors. First level upper and lower patterned conductors are situated on an insulation-coated, monocrystalline silicon substrate. Upper and lower, high resistivity, polycrystalline silicon layers, in turn, are situated on the first level upper and lower patterned conductors, respectively. Second level upper and lower patterned conductors are situated over the upper and lower polycrystalline silicon layers. Further levels of patterned conductors in the circuit board may be provided by iteratively forming on the board polycrystalline silicon layers and patterned conductors. Conducting feedthroughs in the circuit board provide electrical communication between various patterened conductors.

Abstract: A first metal surface of a first article of metal, such as the metalization layer on a silicon semiconductor device, is bonded to an opposing or second metal surface of a second article of metal, such as a "structured copper" strain buffer, using an improved method of thermo-compression diffusion bonding that involves temperature control independent of compressional force control, whereby a superior bond is obtained.

Abstract: A semiconductor electronic device operates at high power levels using structured copper to reduce generation of stress between the elements of the device during thermal cycling in the course of normal operation. Structured copper strain buffers are used to attach each side of a silicon wafer to fluid cooled heat sinks to provide efficient removal of heat generated by the device and good electrical connection to the silicon wafer.

Abstract: The bond between a structured copper heat sink member and a semiconductor wafer is inspected for voids and unbonds by a focused ultrasonic pulse transmission method. The small focused spot of ultrasound is transmitted along the structured copper strands and is attenuated in the lateral direction. The absence of a received pulse or a significantly reduced amplitude signal, as the assembled device is scanned with acoustic pulses, indicate flaws in the bond.

Abstract: Concentrated sunlight impinges on a large area photovoltaic device which is bonded to a highly pliable and thermally and electrically conductive structured copper strain relieving member; the lower face of the structured copper is sealed to a fluid cooled metal heat sink. Large power densities of sunlight are absorbed without appreciable temperature rise. The structured copper accommodates to the difference in expansion between the metal heat sink and the semiconductor wafer. Three embodiments utilize a single planar junction diode, an interdigitated diode, and series connected isolated junction diodes.