Patents by Inventor Hong Chen
Hong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240429340Abstract: The present application relates a solar cell, a photovoltaic device and a photovoltaic system. The solar cell includes a substrate, a first passivation layer, and a second passivation layer. The substrate includes a first surface and a second surface opposite to each other along a thickness direction of the substrate. The first passivation layer is disposed on the first surface of the substrate. The second passivation layer is disposed on a side of the first passivation layer away from the substrate. A material of the first passivation layer is the same as that of the second passivation layer. An atomic packing density of the first passivation layer is higher than that of the second passivation layer. An average thickness of the first passivation layer is smaller than that of the second passivation layer.Type: ApplicationFiled: October 24, 2023Publication date: December 26, 2024Applicant: TRINA SOLAR CO., LTD.Inventors: Chengfa LIU, Shuai ZHANG, Hong CHEN, Yugang LU, Wanli LI, Yang ZOU
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Publication number: 20240429327Abstract: A solar cell comprises a substrate having a first surface and a second surface opposite to each other in a first direction, wherein the first direction is a thickness direction of the substrate; a tunnel oxide layer located on the first surface and/or the second surface; a doped polysilicon layer located on a surface of the tunnel oxide layer away from the substrate; a barrier layer located in an electrode region of the solar cell and in contact with the doped polysilicon layer, wherein a doping type of the barrier layer is the same as the doped polysilicon layer; an electrode located in the electrode region and in contact with the barrier layer; characterized in that wherein a method of forming the barrier layer includes etching the doped polysilicon layer in the electrode region in the first direction to form a groove with a predetermined depth, and forming the barrier layer in the groove, wherein the predetermined depth is equal to or less than a thickness of the doped polysilicon layer, a material of theType: ApplicationFiled: November 30, 2023Publication date: December 26, 2024Inventors: Chengfa Liu, Hong Chen, Daming Chen, Yifeng Chen
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Publication number: 20240421165Abstract: A display panel and a display device are provided. The display panel includes: a display region, a non-display region, and multiple drive signal lines. A fanout region and a connection terminal region are disposed in the non-display region. Multiple fanout wires are arranged in the fanout region. Multiple connection terminals are arranged in the connection terminal region. The fanout wires include a first fanout wire and a second fanout wire. The first fanout wire includes a first wire segment. The first wire segment has a width different from the width of the second fanout wire. The length of the first wire segment is equal to at least a portion of the length of the first fanout wire.Type: ApplicationFiled: June 21, 2024Publication date: December 19, 2024Applicant: Xiamen Tianma Optoelectronics Co., Ltd.Inventors: Xuyang WENG, Xiaoxia HONG, Xuhui PENG, Zhe PIAO, Jiaqi KANG, Jinmei CHEN, Chenpeng WANG, Meiqi ZHAO, Pan JIN, Hong CHEN
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Patent number: 12170874Abstract: According to an embodiment, a digital microphone includes an analog-to-digital converter (ADC) for receiving an analog input signal; a DC blocker component coupled to the ADC; a digital low pass filter coupled to the DC block component; and a nonlinear compensation component coupled to the digital low pass filter for providing a digital output signal.Type: GrantFiled: February 18, 2022Date of Patent: December 17, 2024Assignee: INFINEON TECHNOLOGIES AGInventors: Dietmar Straeussnigg, Niccoló De Milleri, Hong Chen, Simon Gruenberger, Andreas Wiesbauer
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Publication number: 20240413277Abstract: A micro light-emitting device includes an epitaxial structure, a first electrode, a second electrode, a first contact layer and a diffusion structure. The epitaxial structure includes a first-type semiconductor layer, an active layer and a second-type semiconductor layer stacked in sequence. The second-type semiconductor layer has an outer surface relatively away from the first-type semiconductor layer. The first and second electrodes are respectively disposed on the epitaxial structure and electrically connected to the first-type and the second-type semiconductor layers. The first contact layer is disposed between the first electrode and the first-type semiconductor layer. The diffusion structure is disposed on a side of the second-type semiconductor layer away from the first-type semiconductor layer. A conductivity of the diffusion structure is less than that of the second-type semiconductor layer.Type: ApplicationFiled: July 17, 2023Publication date: December 12, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: BOON KHOON TEE, You-Lin Peng, Chee-Yun Low, Wan-Jung Peng, Pai-Yang Tsai, Ching-Liang Lin, Fei-Hong Chen
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Publication number: 20240413255Abstract: A solar cell and a manufacturing method thereof, and a photovoltaic system. The solar cell includes: a substrate layer including a first surface and a second surface arranged oppositely along a thickness direction thereof; a tunnel oxide layer, a first doped polysilicon layer, and a first passivation layer sequentially arranged on the first surface of the substrate layer in a direction gradually away from the substrate layer; and a first finger electrode layer, at least one of the first fingers being arranged in first connection holes, bottoms of the first connection holes being located in the first doped polysilicon layer, and the first fingers passing through the first connection holes corresponding thereto to be electrically connected to the first doped polysilicon layer; and in the first direction, widths of the first connection holes being all less than widths of the first fingers corresponding to the first connection holes.Type: ApplicationFiled: June 28, 2024Publication date: December 12, 2024Inventors: Chengfa Liu, Yang Zou, Kunzhou Wang, Wanli Li, Yaqian Zhang, Xiaopeng Wu, Shuai Zhang, Yugang Lu, Hong Chen
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Patent number: 12162472Abstract: The present disclosure relates to a real-time control method for an additional yaw moment of a distributed drive electric vehicle, including the following steps: acquiring and inputting a real-time motion state of the distributed drive electric vehicle into a vehicle dynamics model, using a yaw rate and a sideslip angle of the distributed drive electric vehicle as tracking targets to suppress actuation energy, and performing optimization calculation on an additional yaw moment to acquire an amount of the additional yaw moment distributed for each tire; and in the optimization calculation process, a linear expression of the sideslip angle with respect to the additional yaw moment and a linear expression of the yaw rate with respect to the additional yaw moment are constructed, so as to perform search calculation on the additional yaw moment.Type: GrantFiled: December 14, 2023Date of Patent: December 10, 2024Assignee: TONGJI UNIVERSITYInventors: Hong Chen, Lin Zhang, Haobo Sun, Hanghang Liu, Wei Pan
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Patent number: 12165973Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.Type: GrantFiled: June 10, 2021Date of Patent: December 10, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Chung Chien, Chao-Hong Chen, Ming-Feng Shieh
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Publication number: 20240407195Abstract: The present disclosure relates to a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a flexible substrate, and a TFT driver circuit on the flexible substrate. The TFT driver circuit includes a patterned semiconductor layer on the flexible substrate. The display substrate further includes a shielding layer configured to shield fluoride ions from entering the flexible substrate. The shielding layer is arranged at a same layer as the semiconductor layer, and/or the shielding layer is located between the semiconductor layer and the flexible substrate.Type: ApplicationFiled: August 9, 2023Publication date: December 5, 2024Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ge Wang, Ming Hu, Zhiliang Jiang, Hong Chen, Yonglin Guo, Xiangnan Pan, Xiaomin Yuan, Chi Yu, Qingqing Yan, Qing He, Min Chen
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Publication number: 20240405081Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a gate structure. The gate structure is disposed in the substrate and includes a shielded gate, a control gate, and a plurality of insulating layers. The shielded gate includes a bottom gate and a top gate. The bottom gate includes a step structure consisting of a plurality of electrodes. A width of the electrode is smaller as the electrode is farther away from the top gate, and a width of the top gate is smaller than a width of the electrode closest to the top gate. The control gate is disposed on the shielded gate. A first insulating layer is disposed between the shielded gate and the substrate. A second insulating layer is disposed on the shielded gate. A third insulating layer is disposed between the control gate and the substrate.Type: ApplicationFiled: August 6, 2024Publication date: December 5, 2024Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Ying-Chi Cheng, Yu-Jen Huang, Shin-Hong Chen
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Publication number: 20240395491Abstract: In some embodiments, an apparatus for generating a radiation, such as X-rays, includes an emitter, such as an electron gun, of a beam of charged particles; a target, such as an anode, extending a length along a target trajectory that includes at least a curved segment and including a material adapted to emit a radiation, such as X-rays, upon the charged particles impinging on the target; and a scan tube attached to the emitter and enclosing the target. The target has multiple portions, some of which being disposed closer to the emitter than other portions. The apparatus may further include two control components. The first component includes one or more magnets for guiding the charged particle along the target without impinging on it; the second component includes one or more magnets for deflecting the guided charged particles to impinge upon the target at different locations over time.Type: ApplicationFiled: May 22, 2023Publication date: November 28, 2024Inventors: Vitaliy ZISKIN, Hong CHEN, Andrew G. CROSS, Hui HU
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Publication number: 20240395954Abstract: A solar cell and a manufacturing method thereof, a photovoltaic module, and a photovoltaic system. A doped layer of the solar cell includes a lightly doped region and a heavily doped region, the heavily doped region includes a body region, connecting regions, and edge regions, and an electrode includes an electrode body, connecting electrodes and edge electrodes. The body region substantially corresponds to the electrode body, and the connecting regions and the edge regions can provide spaces more than spaces corresponding to the connecting electrodes and the edge electrodes.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Yang Zou, Chengfa Liu, Hong Chen
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Patent number: 12153003Abstract: A method and system for determining a mass of an absorbed gas and a mass of a pore gas in a sample using NMR spectroscopy is provided. The method includes acquiring a baseline NMR spectrum of a pressure cell containing the sample, saturating the sample with a gas, acquiring a saturated NMR spectrum and determining a differential NMR spectrum of the sample by subtracting the baseline NMR spectrum from the saturated NMR spectrum. The method also includes separating the differential NMR spectrum into an absorbed gas NMR spectrum to determine an absorbed gas NMR signal and a pore gas NMR spectrum to determine a pore gas NMR signal by performing a spectral deconvolution. The method further includes acquiring a normalization NMR spectrum of the pressure cell containing a gas to determine a gas calibration NMR signal and determining the mass of the absorbed gas and pore gas.Type: GrantFiled: September 30, 2022Date of Patent: November 26, 2024Assignee: SAUDI ARABIAN OIL COMPANYInventors: Jin-Hong Chen, Stacey M. Althaus, Mohammed Boudjatit, Houzhu Zhang
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Patent number: 12153450Abstract: A method, system, self-moving robot, and/or readable storage medium can be used to generate a virtual boundary of a working region for a self-moving robot. A mobile positioning module circles for a predetermined number of loops along a patrol path formed by the boundary of the working region to acquire recording points which are stored and then retrieved in groups to acquire boundary fitting points forming a boundary fitting point sequence, from which boundary points are acquired. Successively connecting the boundary points generates the virtual boundary of the working region.Type: GrantFiled: September 17, 2020Date of Patent: November 26, 2024Assignee: Suzhou Cleva Precision Machinery & Technology Co., Ltd.Inventors: Hong Chen, Xiangyang Gao, Shaoming Zhu
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Patent number: 12155522Abstract: A transmitter includes a first digital-to-analog converter (DAC) circuit consisting of a first set of unary cells to mix a first set of digital input data with a first clock signal. A second DAC circuit includes a second set of unary cells to mix a second set of digital input data with a second clock signal. A third circuit provides signals to the first DAC circuit and the second DAC circuit to implement an assignment scheme to assign either an in-phase (I) component or a quadrature (Q) component to the first set of unary cells and the second set of unary cells. Based on the assignment scheme, the first set of digital input data include I-data and Q-data, and the second set of digital input data include I-data and Q-data.Type: GrantFiled: April 10, 2023Date of Patent: November 26, 2024Assignee: Avago Technologies International Sales Pte. LimitedInventors: Mohyee Mikhemar, Alvin Lai Lin, Andrew J. Blanksby, Sudharshan Srinivasan, Ahmed Sayed, Wei-Hong Chen, Arya Behzad
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Publication number: 20240385353Abstract: The present disclosure provides a display panel, a metasurface lens, and a manufacturing method thereof. The metasurface lens includes: a first substrate and a second substrate disposed opposite to each other; multiple first micro nanostructures arranged at intervals on one side of the first substrate facing the second substrate; multiple second micro nanostructures arranged at intervals on one side of the second substrate facing the first substrate; wherein at least one of the first micro nanostructures is located in gaps between multiple of the second micro nanostructures, and at least one of the second micro nanostructures is located in gaps between multiple of the first micro nanostructures. The present disclosure can reduce the difficulty of the manufacturing process.Type: ApplicationFiled: June 14, 2022Publication date: November 21, 2024Inventors: Duohui LI, Kang GUO, Mengya SONG, Dongliang ZHANG, Hong CHEN, Xiang LI, Dongfei HOU
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Publication number: 20240387768Abstract: The present application relates to a solar cell and a method for manufacturing same, a photovoltaic module, and a photovoltaic system. The solar cell includes a substrate, a doped conducting layer, a first passivation layer, a passivating contact layer, and a second passivation layer. At least a first surface and a portion of a first side surface of the substrate include a textured structure. The doped conducting layer is disposed at least on the first surface and the first side surface to cover the textured structure. The first passivation layer is stacked on the doped conducting layer and covers the first surface and the first side surface to cover the doped conducting layer. The passivating contact layer is disposed on a second surface of the substrate. The second passivation layer is stacked on the passivating contact layer and covers the second surface to cover the passivating contact layer.Type: ApplicationFiled: May 3, 2024Publication date: November 21, 2024Applicant: TRINA SOLAR CO., LTD.Inventors: Chengfa LIU, Hong CHEN, Daming CHEN, Yifeng CHEN
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Publication number: 20240386723Abstract: A method for vehicle motion forecasting includes the following steps. A lane graph structure is generated according to a raw map data. Multiple occupancy flow graphs which are homogeneous to data format of the lane graph structure are established according to trajectory data of a plurality of vehicles in multiple consecutive frames and the lane graph structure. Multiple temporal edges between the occupancy flow graphs are established according to the trajectory data of the vehicles in the consecutive frames to construct a temporal occupancy flow graph. Feature aggregation is performed on the temporal occupancy flow graph to generate multiple updated node features, and a motion forecasting of an ego-vehicle is generated according to the updated node features.Type: ApplicationFiled: May 17, 2024Publication date: November 21, 2024Inventors: Zi-Hao WEN, Yi-Fan ZHANG, Xin-Hong CHEN, Jian-Ping WANG, Yung-Hui LI
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Publication number: 20240384757Abstract: The present invention relates to a flow control method for a high-accuracy and high-stiffness hydrostatic device, comprising: a main body and an auxiliary body; the upper surface of the main body forms a first flow channel, and a lug boss is formed on the first flow channel; the upper surface of the main body forms a second flow channel; the middle of the main body is concave down to form a pressure stabilizing cavity; the end of the first flow channel is provided with first throttling holes; the second flow channel is provided with a main oil hole; the first flow channel is provided with an oil distribution channel; the lug boss is provided with a second throttling hole; a bump matched with a bearing platform is formed on the bottom of the auxiliary body; a film sheet is arranged between the bump and the bearing platform; and the surface of the bump is provided with a groove.Type: ApplicationFiled: April 2, 2022Publication date: November 21, 2024Applicant: Haixi (Fujian) Institute,China Academy of Machinery Science&Technology GroupInventors: WENZHI LIU, CHAO JIANG, HONG CHEN, LONG PAN, HENGFENG ZHU, FUHUA YU, HONGRONG LIN, XIUFANG ZHENG, JIAJING LIN, YUAN GAO
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Publication number: 20240387657Abstract: Semiconductor devices and methods of forming the same are provided. A method includes providing a workpiece having a semiconductor structure; depositing a two-dimensional (2D) material layer over the semiconductor structure; forming a source feature and a drain feature electrically connected to the semiconductor structure and the 2D material layer, wherein the source feature and drain feature include a semiconductor material; and forming a gate structure over the two-dimensional material layer and interposed between the source feature and the drain feature. The gate structure, the source feature, the drain feature, the semiconductor structure and the 2D material layer are configured to form a field-effect transistor. The semiconductor structure and the 2D material layer function, respectively, as a first channel and a second channel between the source feature and the drain feature.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Cheng-Ting Chung, Chien-Hong Chen, Mahaveer Sathaiya Dhanyakumar, Hou-Yu Chen, Jin Cai, Kuan-Lun Cheng