Abstract: This invention provides an optical sheet for use in for example a liquid crystal display, which prevents scratching and wet-out due to contact between films and minimizes the drop in performance of the optical sheet due to adhesive stains when an additional protective film is adhered and then peeled off.

Abstract: Provided is a power amplifier including: a depletion mode high electron mobility transistor (D-mode HEMT) configured to amplify a signal inputted to a gate terminal and output the amplified signal through a drain terminal; an input matching circuit configured to serially ground the gate terminal; and a DC bias circuit connected between the drain terminal and a ground. Through the foregoing configuration, the HEMT may be biased only by a single DC bias circuit without any biasing means to provide a negative voltage. Also, superior matching characteristic may be provided in various operation frequency bands through a shunt inductor and a choke inductor.

Abstract: The present invention relates to a self-amplifying folded oligonucleotide structure for sensitive oligonucleotide sensing without polymerase chain reaction (PCR). A self-amplifying folded oligonucleotide structure comprise a target sensing sequence having stem loop structure, a signaling molecule and signal modifying molecule labeled two stems wherein the two stems include oligonucleotide sequence that is complementary to a target sensing sequence of another self-amplifying folded oligonucleotide structure.

Abstract: A method for fabricating a semiconductor device includes providing a substrate including first landing plugs and second landing plugs that are arrayed on a first line, forming a capping layer over the substrate, forming hole-type first trenches that expose the second landing plugs by selectively etching the capping layer, forming an insulation layer over the substrate including the first trenches, forming line-type second trenches that are stretched on the first line while overlapping with the first trenches by selectively etching the insulation layer, and forming a first conductive layer inside the second trenches.

Abstract: An earphone connector of a mobile terminal prevents noise from occurring when inserting and removing an earphone. The earphone connector of a mobile terminal includes a main body having a passage for inserting an earphone. Aground terminal, aright sound terminal, and a left sound terminal are disposed at a preset position of the main body to contact with a corresponding ground terminal, right sound terminal, and left sound terminal of the earphone, respectively, when the earphone is inserted into the passage. A microphone terminal contacts with a corresponding microphone terminal of the earphone when the earphone is fully inserted. And an elastic member applies an external force such that the microphone terminal does not contact with at least one of the corresponding right sound terminal and the left sound terminal of the earphone before the earphone is fully inserted.

Abstract: A portable device having a single unit antenna for various functions is provided. The device includes a main body configured to house a battery, a battery cover unit that is configured to be coupled with the main body and cover the battery, and a single unit antenna for various functions having a specified length, the antenna extending at least across a portion of the battery cover unit, and configured to support a plurality of functions.

Abstract: A method for fabricating a semiconductor device with a vertical channel includes providing a substrate over which a hard mask pattern is formed, forming pillars over the substrate using the hard mask pattern thereby forming a resultant structure, forming an insulation layer over the resultant structure, planarizing the hard mask pattern and the insulation layer until the pillars are exposed, and forming a storage electrode over the exposed pillars.

Abstract: The present invention generally relates to processes for preparing highly pure morphinan-6-one products. The processes involve reducing the concentration of ?,?-unsaturated ketone compounds present as impurities in morphinan 6 one products or reaction mixtures including morphinan 6 one compounds by treatment with a sulfur-containing compound.

Abstract: Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.

Abstract: The present invention relates to a polyether-based polyurethane foam with improved strength and uses thereof. Since a composition for improving strength is added in a liquid phase to a urethane reaction process which mixes and reacts with raw materials consisting of polyisocyanate and polyol having at least two —OH groups at a terminal of a molecule, the polyether-based polyurethane foam improves mixability (miscibility) between the composition and raw materials which react with each other, thereby maximizing functionality of the composition for improving strength. Furthermore, the polyether-based polyurethane foam with improved strength according to the present invention can be usefully utilized as soundproofing materials or heat insulating materials for building materials and automobiles.

Abstract: Provided are a semiconductor device with a T-gate electrode capable of improving stability and a high frequency characteristic of the semiconductor device by reducing source resistance, parasitic capacitance, and gate resistance and a method of fabricating the same. In the semiconductor device, in order to form source and drain electrodes and the T-gate electrode on a substrate, first and second protective layers constructed with silicon oxide layers or silicon nitride layers are formed on sides of a supporting part under a head part of the T-gate electrode, and the second protective layer constructed with a silicon oxide layer or silicon nitride layer is formed on sides of the source and drain electrodes. Accordingly, it is possible to protect an activated region of the semiconductor device and reduce gate-drain parasitic capacitance and gate-source parasitic capacitance.

Abstract: Provided are a transistor of a semiconductor device and a method of fabricating the same.

Abstract: A sub-harmonic mixer is provided, which includes: a mixer core having first and second transistors performing switching operations in response to a local oscillator (LO) signal and a radio frequency (RF) signal; a power source applying bias maximizing nonlinearity of a transistor included in the mixer core; an RF port applying an RF signal to the mixer core; an LO port applying an LO signal to the mixer core; and first and second phase delay circuits in which the RF signals applied to the first and second transistors have a 180-degree phase difference.

Abstract: A method for forming a contact hole in a semiconductor device includes forming an insulation layer over a substrate, forming a hard mask pattern over the insulation layer, forming a first contact hole by partially etching the insulation layer, forming a spacer on sidewalls of the first contact hole, forming a second contact hole to expose the substrate by etching the remaining insulation layer within the first contact hole, forming a third contact hole by horizontally etching the second contact hole, wherein a line width of the third contact hole is wider than that of the first contact hole, and removing the hard mask pattern and the spacer.

Abstract: A field effect transistor having a T- or ?-shaped fine gate electrode of which a head portion is wider than a foot portion, and a method for manufacturing the field effect transistor, are provided. A void is formed between the head portion of the gate electrode and a semiconductor substrate using an insulating layer having a multi-layer structure with different etch rates. Since parasitic capacitance between the gate electrode and the semiconductor substrate is reduced by the void, the head portion of the gate electrode can be made large so that gate resistance can be reduced. In addition, since the height of the gate electrode can be adjusted by adjusting the thickness of the insulating layer, device performance as well as process uniformity and repeatability can be improved.

Abstract: A dual-mode mobile terminal, which can access synchronous and asynchronous mobile communication systems, includes a key input panel and a controller. The key input panel includes a call switching key for switching between calls from the two systems and a call end key for ending calls from the two systems. While the terminal performs communication of one call received from one of the two systems in a general communication mode over a communication channel currently established by the one system, the controller determines whether an incoming call is received from the other system. If the incoming call is received, the controller notifies the user of receipt of the incoming call. If the call switching key is pressed, the controller prepares a communication environment for communication of the incoming call, allowing the user to perform the communication of the incoming call while maintaining the currently established communication channel.

Abstract: Provided is a power amplifier including: a depletion mode high electron mobility transistor (D-mode HEMT) configured to amplify a signal inputted to a gate terminal and output the amplified signal through a drain terminal; an input matching circuit configured to serially ground the gate terminal; and a DC bias circuit connected between the drain terminal and a ground. Through the foregoing configuration, the HEMT may be biased only by a single DC bias circuit without any biasing means to provide a negative voltage. Also, superior matching characteristic may be provided in various operation frequency bands through a shunt inductor and a choke inductor.

Abstract: Provided are a transistor of a semiconductor device and method of fabricating the same. The transistor includes: an epitaxy substrate disposed on a semi-insulating substrate and having a buffer layer, a first Si planar doping layer, a first conductive layer, a second Si planar doping layer, and a second conductive layer, which are sequentially stacked, the second Si planar doping layer having a doping concentration different from that of the first Si planar doping layer; a source electrode and a drain electrode diffusing into the first Si planar doping layer to a predetermined depth and disposed on both sides of the second conductive layer to form an ohmic contact; and a gate electrode disposed on the second conductive layer between the source and drain electrodes and being in contact with the second conductive layer. In this structure, both isolation and switching speed of the transistor can be increased.

Abstract: A method for fabricating a vertical channel transistor in a semiconductor device includes forming a plurality of pillars arranged in a first direction and a second direction crossing the first direction over a substrate, wherein each of the pillars includes a hard mask pattern thereon, forming a bit line region in the substrate between the pillars, forming a first sidewall insulation layer on a sidewall of each of the pillars, forming an insulation layer for filling a space between the pillars, forming a mask pattern for exposing the substrate between lines of the pillars arranged in the first direction over a resulting structure including the insulation layer, etching the insulation layer and the substrate using the mask pattern as an etch barrier to form a trench for defining a bit line in the substrate, and forming a second sidewall insulation layer over a resulting structure including the trench.

Abstract: Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.