Abstract: A semiconductor device includes: a plurality of repair fuse circuits configured to each program a repair target address; and an enable signal generation circuit configured to generate at least one enable signal in response to a source signal and provide the enable signal to each of the repair fuse circuits in common. Since the semiconductor device may iteratively generate a rupture enable signal through a feedback scheme, the area occupied by a circuit, such as a shift register or a D flip-flop may be saved.

Abstract: An anti-fuse circuit includes an anti-fuse coupled to a sensing node, a driving unit configured to rupture the anti-fuse in response to a rupture enable signal, an anti-fuse status detecting unit configured to output an anti-fuse status detecting signal in response to a voltage at the sensing node corresponding to a rupture status of the anti-fuse, and a sensing current supplying unit configured to supply sensing current to the sensing node in response to a rupture sensing signal.

Abstract: An anti-fuse circuit includes an anti-fuse coupled to a sensing node, a driving unit configured to rupture the anti-fuse in response to a rupture enable signal, an anti-fuse status detecting unit configured to output an anti-fuse status detecting signal in response to a voltage at the sensing node corresponding to a rupture status of the anti-fuse, and a sensing current supplying unit configured to supply sensing current to the sensing node in response to a rupture sensing signal.

Abstract: A data alignment circuit of a semiconductor memory apparatus includes: a data strobe clock phase control block configured to control a phase of a data strobe clock signal in response to a strobe delay code and generate a delayed strobe clock signal; a plurality of data phase control blocks configured to control phases of input data in response to data delay codes and generate delayed data; a plurality of data alignment blocks configured to latch the delayed data in response to the delayed strobe clock signal and generate latched data and aligned data; and a delay code generation block configured to perform an operation of determining phases of the latched data and generate the strobe delay code and the data delay codes.

Abstract: A data alignment circuit of a semiconductor memory apparatus includes: a data strobe clock phase control block configured to control a phase of a data strobe clock signal in response to a strobe delay code and generate a delayed strobe clock signal; a plurality of data phase control blocks configured to control phases of input data in response to data delay codes and generate delayed data; a plurality of data alignment blocks configured to latch the delayed data in response to the delayed strobe clock signal and generate latched data and aligned data; and a delay code generation block configured to perform an operation of determining phases of the latched data and generate the strobe delay code and the data delay codes.

Abstract: The motor includes a cylindrical rotor core, a plurality of magnets axially penetrated in the rotor core, a pair of separation-preventing plates installed at both ends of the rotor core, and at least one fixing member to fix the separation-preventing plates to the rotor core. The fixing member includes a rod portion extending in an axial direction of the rotor core to be disposed on an outer circumferential surface of the rotor core, and supporting portions bent from both ends of the rod portion and used to support the separation-preventing plates. The separation-preventing plates can be fixed to the rotor core by the fixing member disposed on the outer circumferential surface of the rotor core. The fixing member has no risk of hindering the flow of magnetic flux generated from the magnets, resulting in an improvement in the performance of the motor.

Abstract: The motor includes a cylindrical rotor core, a plurality of magnets axially penetrated in the rotor core, a pair of separation-preventing plates installed at both ends of the rotor core, and at least one fixing member to fix the separation-preventing plates to the rotor core. The fixing member includes a rod portion extending in an axial direction of the rotor core to be disposed on an outer circumferential surface of the rotor core, and supporting portions bent from both ends of the rod portion and used to support the separation-preventing plates. The separation-preventing plates can be fixed to the rotor core by the fixing member disposed on the outer circumferential surface of the rotor core. The fixing member has no risk of hindering the flow of magnetic flux generated from the magnets, resulting in an improvement in the performance of the motor.