Abstract: The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

Abstract: A method of manufacturing a thin film transistor substrate includes a first process in which a gate line pattern including a gate line and a gate electrode is formed with a first conductive material on a substrate using a first mask, a second process in which a first insulating layer is formed on the substrate and a data line pattern including a data line, a source electrode, and a drain electrode is formed with a second conductive material using a second mask, and a third process in which a second insulating layer is formed on the substrate and a pixel electrode connected to the drain electrode is formed on the second insulating layer with a third conductive material.

Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

Abstract: A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.

Abstract: After forming a signal line including aluminum, an upper layer of an oxide layer including aluminum that covers the signal line is formed in the same chamber and by using the same sputtering target as the signal line, or a buffer layer of an oxide layer including aluminum is formed in a contact hole exposing the signal line during the formation of the contact hole. Accordingly, the contact characteristic between an upper layer including indium tin oxide (“ITO”) or indium zinc oxide (“IZO”) and the signal line may be improved to enhance the adhesion therebetween while not increasing the production cost of the thin film transistor (“TFT”) array panel.

Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

Abstract: In a touch screen substrate and a method of manufacturing the same, the touch screen substrate includes a base substrate, a light blocking pattern, a first sensing element and a first switching element. The light blocking pattern includes an inorganic layer formed on the base substrate and a light blocking layer formed on the inorganic layer, the light blocking layer transmitting an infrared light and absorbing a visible light. The first sensing element is formed on the light blocking pattern and senses the infrared light. The first switching element is electrically connected to the first sensing element. Thus, an undercut may be prevented from being formed at a lower portion of the light blocking pattern, and an adhesive strength between the light blocking pattern and the base substrate may be enhanced.

Abstract: A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.

Abstract: In a display apparatus and a method of manufacturing the display apparatus, a first insulating layer having a trench and a second insulating layer having a via hole corresponding to the trench are formed on an array substrate. After forming a seed layer in the trench, a conductive layer is formed on the seed layer through a plating process, thereby forming the gate line, the gate electrode and the storage line accommodated in the trench and the via hole.

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract: A display substrate includes a gate line, a storage capacitor, a source line, a switching element, a pixel electrode, and a color filter. The gate line is formed on a base substrate. The storage capacitor has a storage line substantially parallel to the gate line. The source line crosses the gate line to define a pixel area. The switching element is connected to the gate line and the source line. The pixel electrode contacts the switching element. The color filter pattern is formed between the base substrate and the pixel electrode such that the color filter pattern contracts the base substrate and the pixel electrode. Thus, the color filter pattern is formed on the display substrate using a three-mask process.

Abstract: In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes.

Abstract: A method of manufacturing a thin film transistor substrate includes a first process in which a gate line pattern including a gate line and a gate electrode is formed with a first conductive material on a substrate using a first mask, a second process in which a first insulating layer is formed on the substrate and a data line pattern including a data line, a source electrode, and a drain electrode is formed with a second conductive material using a second mask, and a third process in which a second insulating layer is formed on the substrate and a pixel electrode connected to the drain electrode is formed on the second insulating layer with a third conductive material.

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract: A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask, Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern.

Abstract: In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.

Abstract: The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

Abstract: A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.

Abstract: A method for manufacturing a TFT array panel including forming a gate line having a gate electrode on a insulating layer, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, an ohmic contact on the semiconductor, a data line having a source electrode and a drain electrode apart form the source electrode on the ohmic contact, a passivation layer having a contact hole to expose the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole. The drain electrode and the source electrode are formed by a photolithography using a negative photoresist pattern. The negative photoresist pattern includes a first portion having a first thickness corresponding to a channel area, a second portion having a second thickness corresponding to a data line area, and a third portion having a third thickness corresponding to another area.