Abstract: A combined interposer (120) includes multiple constituent interposers (120.i), each with its own substrate (120.iS) and with a circuit layer (e.g. redistribution layer) on top and/or bottom of the substrate. The top circuit layers can be part of a common circuit layer (120R.T) which can interconnect different interposers. Likewise, the bottom circuit layers can be part of a common circuit layer (120R.B). The constituent interposer substrates (120.iS) are initially part of a common wafer, and the common top circuit layer is fabricated before separation of the constituent interposer substrates from the wafer. Use of separated substrates reduces stress compared to use of a single large substrate. Other features are also provided.

Abstract: In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114?) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.

Abstract: A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

Abstract: A system and method for enhanced viewing of rib metastasis in CT volume data is disclosed. The system and method receive input CT volume data and display slices of the CT volume data. Ribs are automatically segmented from the CT volume data, ordered and labeled. A 3D visualization of the ribs is generated and displayed. Alterations in the rib structure is automatically detected using shape based analysis of the ribs. The alterations are marked as candidate locations for rib metastasis in the displayed slices and 3D visualization in order to assist in the diagnosis of rib metastasis.

Abstract: Die (110) and/or undiced wafers and/or multichip modules (MCMs) are attached on top of an interposer (120) or some other structure (e.g. another integrated circuit) and are covered by an encapsulant (160). Then the interposer is thinned from below. Before encapsulation, a layer (410) more rigid than the encapsulant is formed on the interposer around the die to reduce or eliminate interposer dishing between the die when the interposer is thinned by a mechanical process (e.g. CMP). Other features are also provided.

Abstract: The electronic device of this invention is generally for an event alert and notification. The electronic device provides a new concept wherein the electronic device is light weight, wearable, attachable to other accessories such as a backpack, is specifically designed for calendaring, event viewing, graphical notification, and alarm. The general purpose of the present invention is to provide an electronic device for calendaring, alert, and event notification, that has many advantages and novel features over existing technology and devices. To attain this, the electronic device generally comprises an electronic screen, an optional memory storing an event, and a circuit connecting the display and the memory. A frame, made of a flexible material, has a means for attaching such a device to attach the device to typical accessories such as a handbag, a backpack, or a refrigerator.

Abstract: Stacked dies (110) are encapsulated in an interposer's cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 623) connect the dies to the cavity's bottom all (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.

Abstract: A computer-implemented technique includes receiving, at a computing device including one or more processors, a user input (i) identifying a portion of a media stream being output from the computing device and (ii) indicating a request to translate the portion of the media stream from a source language to a target language. The technique includes transmitting, from the computing device, the portion of the media stream to a translation server via a network in response to receiving the user input. The technique includes receiving, at the computing device, a translated portion of the media stream from the translation server via the network, the translated portion of the media stream having been translated from the source language to the target language by the translation server. The technique also includes outputting, at the computing device, the translated portion of the media stream.

Abstract: Semiconductor integrated circuits (110) or assemblies are disposed at least partially in cavities between two interposers (120). Conductive vias (204M) pass through at least one of the interposers or at least through the interposer's substrate, and reach a semiconductor integrated circuit or an assembly. Other conductive vias (204M.1) pass at least partially through multiple interposers and are connected to conductive vias that reach, or are capacitively coupled to, a semiconductor IC or an assembly. Other features are also provided.

Abstract: An interposer (110) has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs 112). The interposer includes a substrate made of multiple layers (110.i). Each layer can be a substrate (110S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure (310) made of vertical layers (310.i) corresponding to the interposers' layers. The structure is diced along horizontal planes (314) to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.

Abstract: The invention provides novel compounds having the general formula: wherein R1, R2, R3 and R4 are as defined in the description and in the claims, as well as or pharmaceutically acceptable salts, or tautomerism isomers, or enantiomers, or diastereomers thereof. The invention also contains compositions including the compounds and methods of using the compounds.

Abstract: A pixel arrangement of color display panel includes a plurality of first sub-pixels, second sub-pixels, third sub-pixels and fourth sub-pixels for respectively providing a first color light, a second color light, a third color light and a fourth color light. The first sub-pixels and the fourth sub-pixels respectively have the same first length and fourth length in a first direction. The second sub-pixels and the third sub-pixels respectively have the same second length and third length in the first direction, which are greater than the first length. The first and fourth sub-pixels are arranged along the first direction to form sub-pixel columns, wherein one of the first sub-pixels in one of the sub-pixel columns partially overlaps one of the first sub-pixels and one of the fourth sub-pixels in another sub-pixel column in a second direction perpendicular to the first direction.

Abstract: Stacked dies (110) are encapsulated in an interposer's cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 623) connect the dies to the cavity's bottom all (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.

Abstract: A pixel arrangement of color display panel includes a plurality of white sub-pixels extending along a first direction and forming a plurality of white sub-pixel columns and a plurality of first sub-pixels, second sub-pixels and third sub-pixels disposed between the white sub-pixel columns to respectively provide a first color light, a second color light and a third color light. The first, second, third and white sub-pixels respectively have a first length, a second length, a third length and a fourth length in the first direction. The first sub-pixels, the second sub-pixels and the third sub-pixels are arranged in a specific sequence. The first length is equal to the second length, the second length is equal to the third length, and the fourth length is greater than the first length.

Abstract: The invention provides novel compounds having the general formula: wherein R1, R2, R3, R4, R5, R6, X, Y, W and n are as described herein, compositions including the compounds and methods of using the compounds.

Abstract: The invention relates to compounds having the structure of Formula (I) and pharmaceutically acceptable salts thereof, which are soluble guanylate cyclase activators. The compounds are capable of modulating the body's production of cyclic guanosine monophosphate (“cGMP”) and are generally suitable for the therapy and prophylaxis of diseases which are associated with a disturbed cGMP balance. The compounds are useful for treatment or prevention of cardiovascular diseases, endothelial dysfunction, diastolic dysfunction, atherosclerosis, hypertension, pulmonary hypertension, angina pectoris, thromboses, restenosis, myocardial infarction, strokes, cardiac insufficiency, pulmonary hypertonia, erectile dysfunction, asthma bronchiale, chronic kidney insufficiency, diabetes, or cirrhosis of the liver.

Abstract: In a multi-chip module (MCM), a “super” chip (110N) is attached to multiple “plain” chips (110F? “super” and “plain” chips can be any chips). The super chip is positioned above the wiring board (WB) but below at least some of plain chips (110F). The plain chips overlap the super chip. Further, the plain chips' low speed IOs can be connected to the WB by long direct connections such as bond wires (e.g. BVAs) or solder stacks; such connections can be placed side by side with the super chip. Such connections can be long, so the super chip is not required to be thin. Also, if through-substrate vias (TSVs) are omitted, the manufacturing yield is high and the manufacturing cost is low. Other structures are provided that combine the short and long direct connections to obtain desired physical and electrical properties.

Abstract: A transistor device structure includes a substrate, a first transistor layer and a second transistor layer. The second transistor layer is disposed between the substrate and the first transistor layer. The first transistor layer includes an insulating structure and a first transistor unit. The insulating structure is disposed on the second transistor layer and has a protruding portion. The first transistor unit includes a gate structure, a source/drain structure, an embedded source/drain structure and a channel. The source/drain structure is disposed beside the gate structure and over the insulating structure. The embedded source/drain structure is disposed underneath the source/drain structure and in the insulating structure. The channel is defined between the protruding portion and the gate structure.

Abstract: The invention provides novel compounds having the general formula: wherein R1, R2, R3 and R4 are as defined in the description and in the claims, as well as or pharmaceutically acceptable salts, or tautomerism isomers, or enantiomers, or diastereomers thereof. The invention also contains compositions including the compounds and methods of using the compounds.

Abstract: A device and method for an integrated device includes a first redistribution layer comprising one or more first conductors, one or more first dies mounted to a first surface of the first redistribution layer and electrically coupled to the first conductors, one or more first posts having first ends attached to the first dies and second ends opposite the first ends, one or more second posts having third ends attached to the first surface of the first redistribution layer and fourth ends opposite the third ends, and a second redistribution layer comprising one or more second conductors, the second redistribution layer being attached to the second ends of the first posts and to the fourth ends of the second posts. In some embodiments, the integrated device further includes a heat spreader mounted to a second surface of the first redistribution layer. The second surface is opposite the first surface.