Abstract: The present invention relates to compounds of formula (X) or pharmaceutically acceptable salts thereof, wherein R1-R50, a, b, d, e, f, g, h, i, j, k, l, o, p, q, r, s, t, u, y, and z are defined herein. The novel dihydropyrrolopyrimidine derivatives are useful in the treatment of abnormal cell growth, such as cancer, in mammals. Additional embodiments relate to pharmaceutical compositions containing the compounds and to methods of using the compounds and compositions in the treatment of abnormal cell growth in mammals.

Abstract: A display device includes a rear bezel, a display panel and at least two heat dissipation sheets. The display panel is disposed on the rear bezel. The display panel includes at least one power line having an extension direction. The heat dissipation sheets are disposed between the rear bezel and the display panel. The heat dissipation sheets have at least one seam formed therebetween. The at least one seam is substantially parallel to the extension direction of the at least one power line.

Abstract: Semiconductor integrated circuits (110) or assemblies are disposed at least partially in cavities between two interposers (120). Conductive vias (204M) pass through at least one of the interposers or at least through the interposer's substrate, and reach a semiconductor integrated circuit or an assembly. Other conductive vias (204M.1) pass at least partially through multiple interposers and are connected to conductive vias that reach, or are capacitively coupled to, a semiconductor IC or an assembly. Other features are also provided.

Abstract: A wire organizer for use in an in-ear earphone set is disclosed to include a wire clip body made of an elastic plastic material and having a small through hole and a large through hole cut longitudinally through the wire clip body in a parallel manner, a side opening transversely cut through one sidewall of the wire clip body in communication with the small through hole, and a plurality of chamfered edges located at border areas of the wire clip body around the small through hole.

Abstract: An earphone includes an earphone body electrically connectable to sound source means, and a rubber plug member mounted at a front coupling rod of the earphone body and including a front end part adapted for insertion into the external auditory canal of the user's ear and a rear end part shaped like a set of petals or perforated flying disc and radially outwardly extended from the rear side of the front end part.

Abstract: Systems, apparatuses, and methods related to the design, fabrication, and manufacture of gallium arsenide (GaAs) integrated circuits are disclosed. Copper can be used as the contact material for a GaAs integrated circuit. Metallization of the wafer and through-wafer vias can be achieved through copper plating processes disclosed herein. Various protocols can be employed during processing to avoid cross-contamination between copper-plated and non-copper-plated wafers. GaAs integrated circuits can be singulated, packaged, and incorporated into various electronic devices.

Abstract: Semiconductor integrated circuits (110) or assemblies are disposed at least partially in cavities between two interposers (120). Conductive vias (204M) pass through at least one of the interposers or at least through the interposer's substrate, and reach a semiconductor integrated circuit or an assembly. Other conductive vias (204M.1) pass at least partially through multiple interposers and are connected to conductive vias that reach, or are capacitively coupled to, a semiconductor IC or an assembly. Other features are also provided.

Abstract: The invention provides novel compounds having the general formula: wherein R1, R2, R3, R4, R5, R6, X, Y, W and n are as described herein, compositions including the compounds and methods of using the compounds.

Abstract: Systems, apparatuses, and methods related to the design, fabrication, and manufacture of gallium arsenide (GaAs) integrated circuits are disclosed. Copper can be used as the contact material for a GaAs integrated circuit. Metallization of the wafer and through-wafer vias can be achieved through copper plating processes disclosed herein. To avoid warpage, the tensile stress of a conductive layer deposited onto a GaAs substrate can be offset by depositing a compensating layer having negative stress over the GaAs substrate. GaAs integrated circuits can be singulated, packaged, and incorporated into various electronic devices.

Abstract: Apparatus relating generally to a back-end-of-line (“BEOL”) stack. In this apparatus, the BEOL stack is configured to electrically couple at least one first electrical component to at least one second electrical component. First contacts are provided on a first side of the BEOL stack with a first pitch for providing a bondable surface for connection to the at least one first electrical component. Second contacts are provided on a second side of the BEOL stack with a second pitch for providing another bondable surface for connection to the at least one second electrical component. The second pitch may be larger than the first pitch.

Abstract: In one embodiment, a method for making a 3D Metal-Insulator-Metal (MIM) capacitor includes providing a substrate having a surface, forming an array of upstanding rods or ridges on the surface, depositing a first layer of an electroconductor on the surface and the array of rods or ridges, coating the first electroconductive layer with a layer of a dielectric, and depositing a second layer of an electroconductor on the dielectric layer. In some embodiments, the array of rods or ridges can be made of a photoresist material, and in others, can comprise bonded wires.

Abstract: Electronic devices, and methods of manufacturing the electronic devices, utilizing direct die soldering of GaAs integrated circuit dies. In some embodiments, the GaAs integrated circuit die can have a footprint approximately the same size as a die attach pad. Further, the GaAs integrated circuit die can self-align with the die attach pad after reflow of any solder layer used to attach the die.

Abstract: A display panel includes a plurality of pixels. Each of the pixels includes four sub-pixels. After the display panel receives luminance values of four sub-pixels of a pixel, the display panel compares a sub-pixel of the pixel with same color sub-pixels of neighboring pixels. If a luminance value of the same color sub-pixel of neighboring pixel is greater than the luminance value of the sub-pixel by a predetermined threshold, the luminance value of the sub-pixel of the pixel is reduced.

Abstract: An integrated circuit (IC) package includes a first substrate having a backside surface and a top surface with a cavity disposed therein. The cavity has a floor defining a front side surface. A plurality of first electroconductive contacts are disposed on the front side surface, and a plurality of second electroconductive contacts are disposed on the back side surface. A plurality of first electroconductive elements penetrate through the first substrate and couple selected ones of the first and second electroconductive contacts to each other. A first die containing an IC is electroconductively coupled to corresponding ones of the first electroconductive contacts. A second substrate has a bottom surface that is sealingly attached to the top surface of the first substrate, and a dielectric material is disposed in the cavity so as to encapsulate the first die.

Abstract: A display device includes a rear bezel, a display panel and at least two heat dissipation sheets. The display panel is disposed on the rear bezel. The display panel includes at least one power line having an extension direction. The heat dissipation sheets are disposed between the rear bezel and the display panel. The heat dissipation sheets have at least one seam formed therebetween. The at least one seam is substantially parallel to the extension direction of the at least one power line.

Abstract: The present invention is directed to compounds of the Formula (I) as well as pharmaceutically acceptable salts thereof, that are aldosterone receptor antagonists which might be useful for treating aldosterone-mediated diseases. The invention furthermore relates to processes for preparing compounds of the Formula (I), to their possible use for the treatment of the abovementioned diseases and for preparing pharmaceuticals for this purpose, and to pharmaceutical compositions which comprise compounds of the Formula (I).

Abstract: One aspect of this disclosure is a power amplifier module that includes a power amplifier die including a power amplifier configured to amplify a radio frequency (RF) signal, the power amplifier including a heterojunction bipolar transistor (HBT) and a p-type field effect transistor (PFET), the PFET including a semiconductor segment that includes substantially the same material as a layer of a collector of the HBT, the semiconductor segment corresponding to a channel of the PFET; a load line electrically connected to an output of the power amplifier and configured to provide impedance matching at a fundamental frequency of the RF signal; and a harmonic termination circuit electrically connected to the output of the power amplifier and configured to terminate at a phase corresponding to a harmonic frequency of the RF signal. Other embodiments of the module are provided along with related methods and components thereof.

Abstract: A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHz. Other embodiments of the module are provided along with related methods and components thereof.

Abstract: A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm?3 at a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHz. Other embodiments of the module are provided along with related methods and components thereof.

Abstract: A combined interposer (120) includes multiple constituent interposers (120.i), each with its own substrate (120.iS) and with a circuit layer (e.g. redistribution layer) on top and/or bottom of the substrate. The top circuit layers can be part of a common circuit layer (120R.T) which can interconnect different interposers. Likewise, the bottom circuit layers can be part of a common circuit layer (120R.B). The constituent interposer substrates (120.iS) are initially part of a common wafer, and the common top circuit layer is fabricated before separation of the constituent interposer substrates from the wafer. Use of separated substrates reduces stress compared to use of a single large substrate. Other features are also provided.