Abstract: A histogram-augmented dynamic sampling approach is provided for determining cardinality of a two-table join. The approach has a pre-processing phase in which data structures are created that will be used during a compilation phase for cardinality estimation. These data structures include a row histogram and a key histogram, which are created for selected columns of a first table. A cardinality estimation phase uses the data structures to estimate the cardinality of various joins at the time of query compilation. In this phase, the system executes queries that join the histograms with a second table, to perform the cardinality estimation.

Abstract: A light emitting diode package structure includes one or more lead frame units, a light emitting element, and an encapsulation unit that completely covers the light emitting element and partially covers the lead frame units. Each lead frame unit includes a chip-mounted portion, a first electrode portion, and a second electrode portion. The first and the second electrode portion extend along a first direction, and are disposed on two sides of the chip-mounted portion. Each lead frame unit further includes multiple first connecting portions extending from the chip-mounted portion along the first direction, and multiple second connecting portions formed by extension of the first and the second electrode portion along a second direction. The light emitting element is fixed to the chip-mounted portion and electrically connected to the electrode portions. A lead frame that includes the at least one lead frame unit is also provided.

Abstract: An image sensor structure and methods of forming the same are provided. An image sensor structure according to the present disclosure includes a semiconductor substrate including a photodiode, a transfer gate transistor disposed over the semiconductor substrate and having a first channel area, a first dielectric layer disposed over the semiconductor substrate, a semiconductor layer disposed over the first dielectric layer, a source follower transistor disposed over the semiconductor layer and having a second channel area, a row select transistor disposed over the semiconductor layer and having a third channel area, and a reset transistor disposed over the semiconductor layer and having a fourth channel area. The second channel area is greater than the first channel area, the third channel area or the fourth channel area.

Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.

Abstract: Coronavirus spike protein, for example, SARS-CoV-2 spike (S) protein, expressed by an avian paramyxovirus type 3 (APMV3) as a vaccine vector for prevention and treatment against infection, such as SARS-CoV-2.

Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting diode, a reflective structure, and a package structure. The reflective structure includes a bottom surface and a lateral part. The light-emitting diode is disposed on the bottom surface. The lateral part is disposed surrounding the bottom surface and disposed on the bottom surface. The package structure is configured to package the light-emitting diode and the reflective structure. The package structure includes a first package part and a second package part. The first package part has a phosphorescent powder. An interface is between the first package part and the second package part. The interface is disposed below a top surface of the lateral part.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure. The first terminal comprises a tunneling layer formed on the substrate, a first conductive structure formed on the tunneling layer, and a dielectric structure formed on a top surface and on a first curved side surface of the first conductive structure. The semiconductor structure includes a second terminal coupled to the substrate. The second terminal comprises a second conductive structure formed on an isolation structure. The second conductive structure has a second curved side surface, and the dielectric structure is disposed between the first curved side surface and the second curved side surface.

Abstract: Techniques are provided for gathering statistics in a database system. The techniques involve gathering some statistics using an “on-the-fly” technique, some statistics through a “high-frequency” technique, and yet other statistics using a “prediction” technique. The technique used to gather each statistic is based, at least in part, on the overhead required to gather the statistic. For example, low-overhead statistics may be gathered “on-the-fly” using the same process that is performing the operation that affects the statistic, while statistics whose gathering incurs greater overhead may be gathered in the background, while the database is live, using the high-frequency technique. The prediction technique may be used for relatively-high overhead statistics that can be predicted based on historical data and the current value of predictor statistics.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure, with the first terminal including a first portion of a tunneling layer formed on the substrate, and a first gate formed on the first portion of the tunneling layer. The semiconductor structure includes a second terminal coupled to the substrate and adjacent to the first terminal, with the second terminal including a second portion of the tunneling layer formed on the substrate, a second gate formed on the second portion of the tunneling layer, and a dielectric structure formed on a top surface and side surfaces of the second gate. The semiconductor structure includes a third terminal coupled to an insulating structure and adjacent to the second terminal, with the third terminal including, a third gate formed on the insulating structure.

Abstract: Disclosed is an approach for applying fine-grained hints to obtain optimal control over error handling during query compilation. Using fine-grained hints causes less disruption to the query plans generated by the optimizer as they constrain specific features while retaining scope for the rest of the optimizer functionality. This approach provides a query plan of better quality that avoid errors, particularly in comparison to coarse-grained approaches that restrict processing to earlier database versions or which disables cost-based processing.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure. The first terminal comprises a tunneling layer formed on the substrate, a first conductive structure formed on the tunneling layer, and a dielectric structure formed on a top surface and on a first curved side surface of the first conductive structure. The semiconductor structure includes a second terminal coupled to the substrate. The second terminal comprises a second conductive structure formed on an isolation structure. The second conductive structure has a second curved side surface, and the dielectric structure is disposed between the first curved side surface and the second curved side surface.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure, with the first terminal including a first portion of a tunneling layer formed on the substrate, and a first gate formed on the first portion of the tunneling layer. The semiconductor structure includes a second terminal coupled to the substrate and adjacent to the first terminal, with the second terminal including a second portion of the tunneling layer formed on the substrate, a second gate formed on the second portion of the tunneling layer, and a dielectric structure formed on a top surface and side surfaces of the second gate. The semiconductor structure includes a third terminal coupled to an insulating structure and adjacent to the second terminal, with the third terminal including, a third gate formed on the insulating structure.

Abstract: In a method for acquiring image using an image acquiring system, a first image data at a first position is acquired in a first direction of the image acquiring system, wherein the first image data corresponds to a plurality of pixel positions and includes a plurality of first sub-image data; a second image data at a second position is acquired in the first direction, wherein the second image data corresponds to the plurality of pixel positions and includes a plurality of second sub-image data; a larger value among values of the first sub-image data and the second sub-image data corresponding to one of the plurality of pixel positions is selected as a combination sub-image data of a combination image data.

Abstract: An imaging system and an imaging method are provided for photographing samples in a non-complete plane arrangement. With using the imaging system and the imaging method, a clear image of each point of the sample can be obtained under a high-magnification microscope lens, and the steps of fixing and embedding the sample in advance can be simplified.

Abstract: A light-emitting package includes a light-transmitting carrier and a light-emitting element. The light-transmitting carrier has a carrying surface, and the light-transmitting carrier contains a base resin and a first phosphorescent powder. The light-emitting element is disposed on the carrying surface. A light-emitting module that contains a phosphorescent powder is also provided.

Abstract: Disclosed is a small animal intraventricular injection compensator for injecting a drug into a desired location through a syringe, the compensator including: a guide part provided with a guide hole into which a needle of a syringe is inserted; a body comprising an upper cavity provided inside thereof and a cradle provided to seat the guide part on an upper side thereof; and a fixation part integrally provided with the body or separately provided, and comprising a lower cavity provided to allow a head accommodation space, which a head of a small animal may enter into or exit from, to be provided inside thereof by corresponding to the upper cavity.

Abstract: Techniques for automatic error mitigation in database systems using alternate plans are provided. After receiving a database statement, an error is detected as a result of compiling the database statement. In response to detecting the error, one or more alternate plans that were used to process the database statement or another database statement that is similar to the database statement are identified. A particular alternate plan of the one or more alternate plans is selected. A result of the database statement is generated based on processing the particular alternate plan.

Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.

Abstract: A motor controller comprises a switch circuit and a control unit. The switch circuit is coupled to a motor for driving the motor. The control unit is configured to generate a control signal to control the switch circuit. The motor controller is configured to generate a current signal and a voltage signal. When a current phase of the current signal is at a predetermined crossing phase, the motor controller calculates a difference value between the current phase of the current signal and a voltage phase of the voltage signal, where the motor controller is configured to control the difference value. The motor controller may stabilize the motor and avoid noise by modulating the difference value. The motor controller may modulate the difference value, such that the difference value is equal to a predetermined phase difference.

Abstract: A motor controller comprises a switch circuit and a driving circuit. The switch circuit is coupled to a motor for driving the motor. The driving circuit generates a plurality of control signals to control the switch circuit. The motor controller is configured to crop a first waveform into a second waveform, where the first waveform is transformed into the second waveform gradually. Moreover, the motor controller is configured to transform the second waveform into the first waveform, where the second waveform is transformed into the first waveform gradually. The first waveform may be an M-shaped waveform, a W-shaped waveform, or a sinusoidal waveform. The second waveform may be a trapezoidal waveform.